公开(公告)号：US07087938B2

公开(公告)日：2006-08-08

申请号：US11070824

申请日：2005-03-01

申请人： Martin Streibl ,  Kai Esmark ,  Christian Russ ,  Martin Wendel ,  Harald Gossner

发明人： Martin Streibl ,  Kai Esmark ,  Christian Russ ,  Martin Wendel ,  Harald Gossner

IPC分类号： H01L29/72 ,  H02H3/00

CPC分类号： H01L27/0262 ,  H01L27/0259

摘要： An ESD protective circuit protects an input or output of a monolithically integrated circuit. The ESD protective circuit has at least one bipolar transistor structure and one ESD protective element between two supply networks. The emitter of the bipolar transistor structure is electrically connected to the input or output, while the base is electrically connected to one of the two supply networks. The collector produces a current signal, which is used for triggering of the ESD protective element, when an ESD load occurs at the input or output.

摘要翻译： ESD保护电路保护单片集成电路的输入或输出。 ESD保护电路在两个供电网络之间具有至少一个双极晶体管结构和一个ESD保护元件。 双极晶体管结构的发射极电连接到输入或输出，而基极电连接到两个供电网络之一。 当输入或输出发生ESD负载时，集电极产生电流信号，用于触发ESD保护元件。

公开(公告)号：US20140097465A1

公开(公告)日：2014-04-10

申请号：US13646799

申请日：2012-10-08

申请人： Mayank Shrivastava ,  Harald Gossner

发明人： Mayank Shrivastava ,  Harald Gossner

IPC分类号： H01L29/74 ,  H01L21/332

CPC分类号： H01L27/0817 ,  H01L21/845 ,  H01L27/1211

摘要： Some aspects relate to a semiconductor device disposed on a semiconductor substrate. The device includes an STI region that laterally surrounds a base portion of a semiconductor fin. An anode region, which has a first conductivity type, and a cathode region, which has a second conductivity type, are arranged in an upper portion of the semiconductor fin. A first doped base region, which has the second conductivity type, is arranged in the base of the fin underneath the anode region. A second doped base region, which has the first conductivity type, is arranged in the base of the fin underneath the cathode region. A current control unit is arranged between the anode region and the cathode region. The current control unit is arranged to selectively enable and disable current flow in the upper portion of the fin based on a trigger signal. Other devices and methods are also disclosed.

摘要翻译： 一些方面涉及设置在半导体衬底上的半导体器件。 该器件包括横向围绕半导体鳍片的基底部分的STI区域。 具有第一导电类型的阳极区域和具有第二导电类型的阴极区域布置在半导体鳍片的上部。 具有第二导电类型的第一掺杂基极区布置在阳极区域下方的翅片的底部。 具有第一导电类型的第二掺杂基区布置在阴极区下方的鳍的底部。 电流控制单元设置在阳极区域和阴极区域之间。 电流控制单元被布置为基于触发信号来选择性地启用和禁止鳍的上部中的电流。 还公开了其它装置和方法。

公开(公告)号：US08643090B2

公开(公告)日：2014-02-04

申请号：US12408839

申请日：2009-03-23

申请人： Mayank Shrivastava ,  Harald Gossner ,  Ramgopal Rao ,  Maryam Shojaei Baghini

发明人： Mayank Shrivastava ,  Harald Gossner ,  Ramgopal Rao ,  Maryam Shojaei Baghini

IPC分类号： H01L29/66

CPC分类号： H01L29/0653 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/66659 ,  H01L29/7835

摘要： In various embodiments, a semiconductor device is provided. The semiconductor device may include a first source/drain region, a second source/drain region, an active region electrically coupled between the first source/drain region and the second source/drain region, a trench disposed between the second source/drain region and at least a portion of the active region, a first isolation layer disposed over the bottom and the sidewalls of the trench, electrically conductive material disposed over the isolation layer in the trench, a second isolation layer disposed over the active region, and a gate region disposed over the second isolation layer. The electrically conductive material may be coupled to an electrical contact.

摘要翻译： 在各种实施例中，提供半导体器件。 半导体器件可以包括第一源极/漏极区域，第二源极/漏极区域，电耦合在第一源极/漏极区域和第二源极/漏极区域之间的有源区域，设置在第二源极/漏极区域和第二源极/ 所述有源区的至少一部分，设置在所述沟槽的底部和所述侧壁上的第一隔离层，设置在所述沟槽中的所述隔离层上的导电材料，设置在所述有源区上的第二隔离层和栅极区 设置在第二隔离层上。 导电材料可以耦合到电接触。

公开(公告)号：US08390970B2

公开(公告)日：2013-03-05

申请号：US12912781

申请日：2010-10-27

申请人： Harald Gossner ,  David Johnsson ,  Wolfgang Soldner

发明人： Harald Gossner ,  David Johnsson ,  Wolfgang Soldner

IPC分类号： H02H9/00

CPC分类号： H02H9/046

摘要： A method and a system for ESD protection are provided. In one embodiment, the system comprises a circuit comprising at least one non-linear element, an application module configured to apply a set of current pulses to the circuit, a determination module configured to determine at least one frequency-dependent and amplitude-dependent transfer function of the circuit based on the set of applied current pulses, a modeling module configured to model at least one frequency-dependent and current-dependent impedance of the at least one non-linear element, and a simulation module to simulate a transmission to the circuit based on the model.

摘要翻译： 提供了ESD保护的方法和系统。 在一个实施例中，系统包括包括至少一个非线性元件的电路，被配置为将一组电流脉冲施加到电路的应用模块，被配置为确定至少一个频率相关和幅度相关的转移 基于所施加的电流脉冲集合的电路的功能，被配置为对所述至少一个非线性元件的至少一个频率相关和依赖于电流的阻抗建模的建模模块，以及模拟模块，用于模拟到 电路基于模型。

公开(公告)号：US08093689B2

公开(公告)日：2012-01-10

申请号：US11772272

申请日：2007-07-02

申请人： Wolfgang Stadler ,  Harald Gossner ,  Reinhold Gaertner

发明人： Wolfgang Stadler ,  Harald Gossner ,  Reinhold Gaertner

IPC分类号： H01L23/58

CPC分类号： H01L23/60 ,  H01L2223/6677 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00

摘要： A semiconductor sensor device is electrically coupled to an object. An attachment member attaches the semiconductor sensor device to the object. The attachment member comprises a first conductive contact region and a second conductive contact region. An insulating portion is electrically isolates the semiconductor sensor device from the first conductive contact region and second conductive contact region.

摘要翻译： 半导体传感器装置电耦合到物体。 附接构件将半导体传感器装置附接到物体。 附接构件包括第一导电接触区域和第二导电接触区域。 绝缘部分将半导体传感器装置与第一导电接触区域和第二导电接触区域电隔离。

公开(公告)号：US07838948B2

公开(公告)日：2010-11-23

申请号：US11668916

申请日：2007-01-30

申请人： Harald Gossner

发明人： Harald Gossner

IPC分类号： H01L27/112

CPC分类号： H01L29/41758 ,  H01L29/41791 ,  H01L29/4238 ,  H01L29/7831 ,  H01L29/785

摘要： In an embodiment, an apparatus includes a first field effect transistor including a first source contact region, a first drain contact region and a first plurality of fins overlying a substrate, a first gate overlying the first plurality of fins, the first source contact region coupled to first ends of the first plurality of fins, and a second field effect transistor including a second source contact region, a second drain contact region, and a second plurality of fins overlying the substrate, a second gate overlying the second plurality of fins, and an interconnection contact region overlying the substrate, electrically coupling the first drain contact region and the second source contact region and abutting the first and the second pluralities of fins.

摘要翻译： 在一个实施例中，装置包括第一场效应晶体管，其包括第一源极接触区域，第一漏极接触区域和覆盖衬底的第一多个鳍片，覆盖第一多个鳍片的第一栅极，第一源极接触区域耦合 到第一多个散热片的第一端，以及第二场效应晶体管，包括第二源极接触区域，第二漏极接触区域和覆盖在衬底上的第二多个鳍片，覆盖第二多个鳍片的第二栅极，以及 覆盖所述衬底的互连接触区域，电耦合所述第一漏极接触区域和所述第二源极接触区域并且邻接所述第一和第二多个鳍片。

公开(公告)号：US20100200916A1

公开(公告)日：2010-08-12

申请号：US12369821

申请日：2009-02-12

申请人： Harald Gossner ,  Ramgopal Rao ,  Angada Sachid ,  Ashish Pal ,  Ram Asra

发明人： Harald Gossner ,  Ramgopal Rao ,  Angada Sachid ,  Ashish Pal ,  Ram Asra

IPC分类号： H01L29/78

CPC分类号： H01L29/165 ,  H01L21/26586 ,  H01L29/0657 ,  H01L29/083 ,  H01L29/0834 ,  H01L29/66356 ,  H01L29/7391

摘要： In an embodiment, a semiconductor device is provided. The semiconductor device may include a substrate having a main processing surface, a first source/drain region comprising a first material of a first conductivity type, a second source/drain region comprising a second material of a second conductivity type, wherein the second conductivity type is different from the first conductivity type, a body region electrically coupled between the first source/drain region and the second source/drain region, wherein the body region extends deeper into the substrate than the first source/drain region in a first direction that is perpendicular to the main processing surface of the substrate, a gate dielectric disposed over the body region, and a gate region disposed over the gate dielectric, wherein the gate region overlaps with at least a part of the first source/drain region and with a part of the body region in the first direction.

摘要翻译： 在一个实施例中，提供了半导体器件。 半导体器件可以包括具有主处理表面的衬底，包括第一导电类型的第一材料的第一源极/漏极区域，包括第二导电类型的第二材料的第二源极/漏极区域，其中第二导电类型 不同于第一导电类型，电耦合在第一源极/漏极区域和第二源极/漏极区域之间的主体区域，其中主体区域在第一方向上比第一源极/漏极区域在第一方向 垂直于基板的主处理表面，设置在主体区域上的栅极电介质和设置在栅极电介质上的栅极区域，其中栅极区域与第一源极/漏极区域的至少一部分重叠， 的身体区域在第一个方向。

公开(公告)号：US07694247B2

公开(公告)日：2010-04-06

申请号：US10569986

申请日：2005-03-17

申请人： Kai Esmark ,  Harald Gossner ,  Wolfgang Stadler ,  Marin Streibl

发明人： Kai Esmark ,  Harald Gossner ,  Wolfgang Stadler ,  Marin Streibl

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： A program-controlled arrangement for the identification of ESD and/or latch-up weak points in the design or in the concept of an integrated circuit comprises a pre-processor, which processes first data about the description of the integrated circuit, second data about already ESD-characterized circuit parts of the integrated circuit, and third data which contain information about ESD test standards. A simulator device is connected downstream of the pre-processor which has a simulator which, by using the fourth and fifth data generated by the pre-processor, performs an ESD simulation of the integrated circuit, which has a monitoring controller for controlling the ESD simulation sequence in the simulator. An analysis device is connected downstream of the simulator device, which performs an evaluation of the sixth data generated in the simulator device with regard to their physical validity and meaningfulness, and marks the simulation runs having physically relevant ESD failure events.

摘要翻译： 用于在设计中或集成电路的概念中识别ESD和/或闭锁弱点的程序控制布置包括预处理器，其处理关于集成电路的描述的第一数据，关于 集成电路已经具有ESD特征的电路部件，以及包含有关ESD测试标准信息的第三个数据。 模拟器装置连接在预处理器的下游，其具有模拟器，通过使用由预处理器生成的第四和第五数据执行集成电路的ESD模拟，其具有用于控制ESD模拟的监视控制器 序列在模拟器中。 分析装置连接在模拟器装置的下游，对其模拟装置的物理有效性和有意义性进行评估，并对具有物理上相关的ESD故障事件的模拟运行进行标记。

公开(公告)号：US07470957B2

公开(公告)日：2008-12-30

申请号：US11324995

申请日：2006-01-03

申请人： Harald Gossner

发明人： Harald Gossner

IPC分类号： H01L27/12 ,  H01L31/0392

CPC分类号： H01L27/0262

摘要： An electrostatic discharge (“ESD”) protection device, which includes a thyristor circuit, in the ESD case increases a resistance of the ESD protection device in comparison with a non-ESD case, by means of a switch. An ESD protection arrangement may include a ESD protection device to protects circuits with multiple voltage potentials. An ESD protection system may also include an ESD protection arrangement, to which an ESD signal is fed via a bus of the ESD protection system. The ESD protection device and ESD protection arrangement, and thus the ESD protection system, can be provided in a compact semiconductor arrangement.

摘要翻译： ESD保护装置中包括晶闸管电路的静电放电（“ESD”）保护装置通过开关增加了与非ESD情况相比的ESD保护装置的电阻。 ESD保护装置可以包括用于保护具有多个电压电位的电路的ESD保护装置。 ESD保护系统还可以包括ESD保护装置，ESD信号经由ESD保护系统的总线馈送到ESD保护装置。 ESD保护装置和ESD保护装置以及因此的ESD保护系统可以以紧凑的半导体布置提供。

公开(公告)号：US07450358B2

公开(公告)日：2008-11-11

申请号：US11046295

申请日：2005-01-27

申请人： Harald Gossner

发明人： Harald Gossner

IPC分类号： H02H9/00 ,  H02H1/00

CPC分类号： H01L27/0292 ,  H01L27/0251

摘要： The ESD protective circuit according to the invention is designed for an electronic circuit which uses at least one first and one second supply voltage. This ESD protective circuit has a first and a second ESD protective element which can be activated via a control input and are electrically connected to the first and second supply voltage nodes, respectively, and has a control bus which electrically connects the control inputs of the ESD protective elements and, furthermore, has an overvoltage detector, which drives the control bus as a function of the potential at the first supply voltage node.

摘要翻译： 根据本发明的ESD保护电路被设计用于使用至少一个第一和第二电源电压的电子电路。 该ESD保护电路具有第一和第二ESD保护元件，其可以通过控制输入被激活，并且分别电连接到第一和第二电源电压节点，并且具有控制总线，其将ESD的控制输入电连接 保护元件，此外，具有过电压检测器，其驱动控制总线作为第一电源电压节点处的电位的函数。