Method for diagnosis of a volume flow control valve in an internal combustion engine comprising a high-pressure accumulator injection system
    2.
    发明申请
    Method for diagnosis of a volume flow control valve in an internal combustion engine comprising a high-pressure accumulator injection system 有权
    用于诊断包括高压蓄能器注射系统的内燃机中的体积流量控制阀的方法

    公开(公告)号:US20060243244A1

    公开(公告)日:2006-11-02

    申请号:US10527976

    申请日:2004-05-13

    摘要: The invention relates to an internal combustion engine comprising a high-pressure accumulator injection system wherein the swept volume and the pressure are regulated by means of a volume flow control valve (VCV) and a pressure control valve (PCV). The inventive method consists in checking, during the overrun condition of the internal combustion engine, whether predetermined release conditions for carrying out the diagnosis are fulfilled, and in the event of a positive result, the control valve (VCV) is closed for a predetermined period of time (t1). During said period (t1), values relating to fuel pressure (FUP) are detected by means of the pressure sensor (21) and compared with a predetermined threshold value (FUP-SW), the control valve (VCV) being deemed faultless if said fuel pressure (FUP) values are sufficiently often below the threshold value (FUP_SW) during the cited period of time (t1).

    摘要翻译: 本发明涉及一种内燃机,其包括高压蓄能器喷射系统,其中扫气体积和压力通过体积流量控制阀(VCV)和压力控制阀(PCV)来调节。 本发明的方法在于,在内燃机的超速状态期间,检查是否满足了用于执行诊断的预定释放条件,并且在积极结果的情况下,控制阀(VCV)关闭预定时段 的时间(t 1)。 在所述时段(t 1)期间,通过压力传感器(21)检测与燃料压力(FUP)相关的值,并与预定的阀值(FUP-SW)进行比较,如果控制阀(VCV) 所述燃料压力(FUP)值在引用的时间段(t 1)期间足够经常低于阈值(FUP_SW)。

    Operating method for a semiconductor component
    4.
    发明授权
    Operating method for a semiconductor component 有权
    半导体元件的操作方法

    公开(公告)号:US06905892B2

    公开(公告)日:2005-06-14

    申请号:US10200067

    申请日:2002-07-19

    摘要: The present invention creates an operating method for a semiconductor component having a substrate; having a conductive polysilicon strip which is applied to the substrate; having a first and a second electrical contact which are connected to the conductive polysilicon strip such that this forms an electrical resistance in between them; with the semiconductor component being operated reversibly in a current/voltage range in which it has a first differential resistance (Rdiff1) up to a current limit value (It) corresponding to an upper voltage limit value (Vt) and, at current values greater than this, has a second differential resistance (Rdiff2), which is less than the first differential resistance (Rdiff1).

    摘要翻译: 本发明创造了具有基板的半导体部件的操作方法; 具有施加到衬底的导电多晶硅条; 具有连接到导电多晶硅条的第一和第二电接触,使得它们之间形成电阻; 半导体部件在其具有第一差分电阻(Rdiff 1)的电流/电压范围内可逆地操作,直到对应于上限电压限制值(Vt)的电流限制值(It),并且在当前值更大 具有小于第一差分电阻(Rdiff 1)的第二差分电阻(Rdiff 2)。

    Circuit for protecting integrated circuits against electrostatic discharges
    5.
    发明授权
    Circuit for protecting integrated circuits against electrostatic discharges 有权
    保护集成电路免受静电放电的电路

    公开(公告)号:US07359169B2

    公开(公告)日:2008-04-15

    申请号:US10536176

    申请日:2003-11-24

    CPC分类号: H02H9/046

    摘要: A circuit is described that protects an integrated circuit from electrostatic discharges or electrical over-stress. The circuit arrangement has first and second protective elements connected in series between a connection of the integrated circuit and a supply voltage. When electrostatic discharges or electrical over-stress occurs, current flows through the conductive path formed through the first and second protective elements. A current path that contains a circuit element limits current through the first protective element is connected in parallel with the first protective element. The first protective element has blocking behavior when no electrostatic discharges or electrical over-stress occurs, a limited current flows through the current path and the second protective element.

    摘要翻译: 描述了保护集成电路免受静电放电或电过压的电路。 电路装置具有在集成电路的连接和电源电压之间串联连接的第一和第二保护元件。 当发生静电放电或电过压时,电流流过形成在第一和第二保护元件上的导电路径。 包含电路元件的电流路径限制通过第一保护元件的电流与第一保护元件并联连接。 当不产生静电放电或电过度应力时,第一保护元件具有阻塞行为,有限的电流流过电流通路和第二保护元件。

    Method for determining an estimated value of a mass flow in the intake channel of an internal combustion engine
    6.
    发明授权
    Method for determining an estimated value of a mass flow in the intake channel of an internal combustion engine 失效
    用于确定内燃机的进气通道中的质量流量的估计值的方法

    公开(公告)号:US06985806B2

    公开(公告)日:2006-01-10

    申请号:US10624416

    申请日:2003-07-22

    申请人: Wolfgang Stadler

    发明人: Wolfgang Stadler

    IPC分类号: F02D41/02

    摘要: A measured value (MAP_MES) of the pressure in a suction pipe is the command variable of a control loop. The regulating variable is an estimated value (MAP_EST) of the pressure in the suction pipe, the estimated value being determined according to the manipulated variable of the control loop. The manipulated variable is calculated according to the difference between the estimated value (MAP_EST) and a measured value (MAP_MES) of the pressure in the suction pipe and according to the temporal change of the measured value (MAP_MES) of the pressure in the suction pipe. An estimated value (MAF_EST) of the mass flow in the intake passage (1) is calculated according to the manipulated variable.

    摘要翻译: 吸入管中的压力的​​测量值(MAP_MES)是控制回路的指令变量。 调节变量是吸入管中的压力的​​估计值(MAP_EST),该估计值根据控制回路的操作变量来确定。 根据估计值(MAP_EST)与吸入管内压力的测量值(MAP_MES)之间的差值,根据吸入管内压力的测量值(MAP_MES)的时间变化计算操纵变量 。 根据操作量计算进气通道(1)中的质量流量的估计值(MAF_EST)。

    Electrostatic discharge test system and electrostatic discharge test method
    9.
    发明授权
    Electrostatic discharge test system and electrostatic discharge test method 有权
    静电放电试验系统和静电放电试验方法

    公开(公告)号:US07863920B2

    公开(公告)日:2011-01-04

    申请号:US11854275

    申请日:2007-09-12

    IPC分类号: G01R31/26

    CPC分类号: G01R31/002

    摘要: A method of conducting an electrostatic discharge test on an integrated circuit is described. The method comprises configuring a test board assembly to emulate characteristics of a system in which the integrated circuit is to be used, coupling the integrated circuit to the test board assembly, and applying an electrostatic discharge test signal of system-level type to the test board assembly.

    摘要翻译: 对集成电路进行静电放电试验的方法进行说明。 该方法包括配置测试板组件以仿真其中使用集成电路的系统的特性,将集成电路耦合到测试板组件,以及将系统级类型的静电放电测试信号施加到测试板 部件。

    Method and device for testing the ESD resistance of a semiconductor component
    10.
    发明授权
    Method and device for testing the ESD resistance of a semiconductor component 有权
    用于测试半导体部件的ESD电阻的方法和装置

    公开(公告)号:US07009404B2

    公开(公告)日:2006-03-07

    申请号:US10160740

    申请日:2002-05-31

    IPC分类号: G01R31/08 G01R27/08

    CPC分类号: G01R31/002 G01R31/129

    摘要: To test the ESD resistance of a semiconductor component, for example of a NOS transistor, which can be used as a PSD protective element in a chip, a direct current characteristic of the semiconductor component is monitored and the ESD resistance of the respective semiconductor component is inferred depending on this. In particular, the direct current failure threshold of the semiconductor component at which an increased leakage current occurs in the non-conducting direction of the semiconductor component can be monitored in operation of the semiconductor component using an applied direct current and the ESD resistance of the semiconductor component inferred depending on a change in this direct current failure threshold.

    摘要翻译: 为了测试可用作芯片中的PSD保护元件的例如可用作PSD保护元件的NOS晶体管的半导体部件的ESD电阻,监视半导体部件的直流特性,并且各半导体部件的ESD电阻为 据此推断。 特别地,可以在使用所施加的直流电流和半导体的ESD电阻的半导体组件的操作中监视在半导体组件的非导通方向上发生增加的漏电流的半导体组件的直流故障阈值 根据该直流故障阈值的变化推断分量。