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    Flash memory device with write driver and bit line detecting driving circuits
    41.
    发明授权
    Flash memory device with write driver and bit line detecting driving circuits 失效
    具有写驱动器和位线检测驱动电路的闪存器件

    公开(公告)号：US07768837B2

    公开(公告)日：2010-08-03

    申请号：US11871371

    申请日：2007-10-12

    申请人： Jong-In Choi ,  Dong-Woo Lee

    发明人： Jong-In Choi ,  Dong-Woo Lee

    IPC分类号： G11C16/06

    CPC分类号： G11C16/24 ,  G11C16/10

    摘要： A flash memory device and a method of programming a flash memory device include selecting bit lines connected to program cells of multiple memory cells coupled to a selected word line. The selected bit lines are driven to a bit line program voltage through a write driver circuit connected to first ends of the selected bit lines. The selected bit lines are also driven to the bit line program voltage through a bit line detecting/driving circuit connected to second ends of the selected bit lines. The bit line detecting/driving circuit activates the selected bit lines synchronously with voltage variations of the selected bit lines.

    摘要翻译： 快闪存储器件和闪速存储器件的编程方法包括：选择连接到与选定字线耦合的多个存储器单元的编程单元的位线。 所选择的位线通过连接到所选位线的第一端的写入驱动器电路被驱动到位线编程电压。 所选择的位线也通过与选定位线的第二端连接的位线检测/驱动电路驱动到位线编程电压。 位线检测/驱动电路与所选位线的电压变化同步地激活所选择的位线。

    Apparatus and method for producing 3D sound
    42.
    发明授权
    Apparatus and method for producing 3D sound 有权
    用于产生3D声音的装置和方法

    公开(公告)号：US07599498B2

    公开(公告)日：2009-10-06

    申请号：US11175326

    申请日：2005-07-07

    申请人： Poong-Min Kim ,  Hyun-Suk Kim ,  Jin-Wook Kim ,  Dong-Woo Lee ,  In-Ho Lee ,  Yong-Suk Choi ,  Jeong-Mo Koo ,  Myung-Cheol Lee ,  Dong-Sun Shin ,  Jong-Woo Kim

    发明人： Poong-Min Kim ,  Hyun-Suk Kim ,  Jin-Wook Kim ,  Dong-Woo Lee ,  In-Ho Lee ,  Yong-Suk Choi ,  Jeong-Mo Koo ,  Myung-Cheol Lee ,  Dong-Sun Shin ,  Jong-Woo Kim

    IPC分类号： H04R5/00

    CPC分类号： H04S5/02 ,  H04R2499/11 ,  H04S5/00

    摘要： Disclosed herein is an apparatus for producing 3D sound. The apparatus includes a determination unit, a mono sound spreading unit, a stereo sound spreading unit, a selection unit, and a 3D sound accelerator. The determination unit receives a source sound file and determines whether the source sound file is mono or stereo. The mono sound spreading unit converts the source sound into pseudo-stereo sound and performs sound spreading on the pseudo-stereo sound, if the source sound is determined to be mono. The stereo sound spreading unit performs sound spreading on the source sound, if the source sound is determined to be stereo. The selection unit receives the output of the mono sound spreading unit or stereo sound spreading unit, and transfers the output to headphones if the headphone reproduction has been selected. The 3D sound accelerator receives the output from the selection unit if speaker reproduction has been selected, removes crosstalk from the output, and transfers the crosstalk-free output to speakers.

    摘要翻译： 本文公开了一种用于产生3D声音的装置。 该装置包括确定单元，单声道扩散单元，立体声扩声单元，选择单元和3D声音加速器。 确定单元接收源声音文件并确定源声音文件是单声道还是立体声。 如果源声音被确定为单声道，则单声道扩散单元将源声音转换为伪立体声，并对伪立体声进行声音扩展。 如果源声音被确定为立体声，则立体声扩散单元对源声音进行声音扩展。 选择单元接收单声道扩声单元或立体声声音扩展单元的输出，并且如果已经选择了耳机再现，则将输出传送到耳机。 如果选择了扬声器再现，则3D声音加速器从选择单元接收输出，从输出中消除串扰，并将无串扰输出传送给扬声器。

    HEAT TREATMENT APPARATUS
    43.
    发明申请
    HEAT TREATMENT APPARATUS 审中-公开
    热处理设备

    公开(公告)号：US20090013698A1

    公开(公告)日：2009-01-15

    申请号：US12236014

    申请日：2008-09-23

    申请人： Tae-gyu Kim ,  Dong-Woo Lee ,  Jin-Sung Lee ,  Tae-Sang Park ,  Bang-Weon Lee

    发明人： Tae-gyu Kim ,  Dong-Woo Lee ,  Jin-Sung Lee ,  Tae-Sang Park ,  Bang-Weon Lee

    IPC分类号： F25D31/00

    CPC分类号： H01L21/67109 ,  B05B7/0441

    摘要： Provided is a heat treatment apparatus. The heat treatment apparatus includes a heating plate including a heater; a chamber case including a cooling chamber, and coupled to a lower portion of the heating plate; and at least one atomizing unit installed on the chamber case to generate liquid droplet aerosol by mixing a cooling liquid and a gas, and at the same time, to inject the liquid droplet aerosol into the cooling chamber.

    摘要翻译： 提供一种热处理装置。 热处理装置包括：加热板，包括加热器; 包括冷却室的室壳体，并且联接到所述加热板的下部; 以及至少一个雾化单元，其安装在所述室壳体上以通过混合冷却液体和气体而产生液滴气溶胶，同时将所述液滴气溶胶喷射到所述冷却室中。

    Multi-path accessible semiconductor memory device with prevention of pre-charge skip
    44.
    发明申请
    Multi-path accessible semiconductor memory device with prevention of pre-charge skip 失效
    具有防止预充电跳跃的多路径可访问半导体存储器件

    公开(公告)号：US20080282042A1

    公开(公告)日：2008-11-13

    申请号：US12151946

    申请日：2008-05-09

    申请人： Jin-Hyoung Kwon ,  Han-Gu Sohn ,  Dong-Woo Lee

    发明人： Jin-Hyoung Kwon ,  Han-Gu Sohn ,  Dong-Woo Lee

    IPC分类号： G06F12/00

    CPC分类号： G06F13/1663 ,  G11C7/1075 ,  G11C11/4094

    摘要： A multiprocessor system includes first and second processors and a multi-path accessible semiconductor memory device including a shared memory area and a pseudo operation execution unit. The shared memory area is accessible by the first and second processors according to a page open policy. The pseudo operation execution unit responds to a virtual active command from one of the first and second processors to close a last-opened page. The virtual active command is generated with a row address not corresponding to any row of the shared memory area. For example, bit-lines of a last accessed row are pre-charged for closing the last-opened page.

    摘要翻译： 多处理器系统包括第一和第二处理器以及包括共享存储器区域和伪操作执行单元的多路径可访问半导体存储器件。 根据页面打开策略，共享存储器区域可由第一和第二处理器访问。 伪操作执行单元响应来自第一和第二处理器之一的虚拟活动命令以关闭最后打开的页面。 生成虚拟活动命令，其中行地址不对应于共享存储器区域的任何行。 例如，最后访问的行的位线是预先关闭最后打开的页面的。

    HYDROGEN GENERATOR AND METHOD OF OPERATING THE SAME
    45.
    发明申请
    HYDROGEN GENERATOR AND METHOD OF OPERATING THE SAME 有权
    氢发生器及其运行方法

    公开(公告)号：US20080090112A1

    公开(公告)日：2008-04-17

    申请号：US11692533

    申请日：2007-03-28

    申请人： Dong-Woo Lee ,  Tae-Sang Park

    发明人： Dong-Woo Lee ,  Tae-Sang Park

    IPC分类号： H01M8/18 ,  H01M8/04

    CPC分类号： B01J8/0496 ,  B01J8/0411 ,  B01J2208/00504 ,  C01B3/384 ,  C01B3/48 ,  C01B2203/0233 ,  C01B2203/0283 ,  C01B2203/066 ,  C01B2203/0816 ,  C01B2203/1005 ,  C01B2203/1241 ,  H01M8/0618 ,  H01M8/0631

    摘要： A hydrogen generator and a method of operating the hydrogen generator. The hydrogen generator includes: a cylindrical reformer catalyst; and a cylindrical shift catalyst disposed inside of the reformer catalyst; a separation wall provided between the reformer catalyst and the shift catalyst; a cylinder that is disposed inside of the reformer catalyst, and comprises, on an outer surface thereof, a plurality of first nozzles to direct a plurality of flames to the reformer catalyst and a plurality of second nozzles to direct a plurality of flames to the shift catalyst; and a combustion fuel supply valve that selectively guides a combustion fuel to the first nozzles and or the second nozzles. The method includes heating the shift catalyst by supplying a combustion fuel to the second nozzles, making flames by igniting the combustion fuel that passes through the second nozzles, and directing the flames towards the shift catalyst, and stopping the heating of the shift catalyst by blocking the supply of the combustion fuel to the second nozzles when the temperature of the shift catalyst reaches the shift reaction temperature.

    摘要翻译： 氢发生器和操作氢发生器的方法。 氢气发生器包括：圆筒形重整器催化剂; 以及设置在所述重整器催化剂内部的圆筒形变速催化剂; 设置在重整器催化剂和变换催化剂之间的分隔壁; 设置在重整器催化剂内部的圆筒，在其外表面上包括多个第一喷嘴以将多个火焰引导至重整器催化剂，以及多个第二喷嘴将多个火焰引导到换挡 催化剂; 以及燃烧燃料供给阀，其选择性地将燃料燃料引导到第一喷嘴和/或第二喷嘴。 该方法包括通过向第二喷嘴提供燃烧燃料来加热变换催化剂，通过点燃通过第二喷嘴的燃烧燃料产生火焰，并将火焰引向变换催化剂，并通过阻塞来停止加热变换催化剂 当变换催化剂的温度达到转变反应温度时，向第二喷嘴供应燃烧燃料。

    Packet addressing programmable dual port memory devices and related methods
    48.
    发明申请
    Packet addressing programmable dual port memory devices and related methods 有权
    分组寻址可编程双端口存储器件及相关方法

    公开(公告)号：US20050122824A1

    公开(公告)日：2005-06-09

    申请号：US10937519

    申请日：2004-09-09

    申请人： Dong-Woo Lee

    发明人： Dong-Woo Lee

    IPC分类号： G11C8/06 ,  G11C11/34

    CPC分类号： G11C8/06

    摘要： In a packet addressing method, one or more memory blocks are selected from a plurality of memory blocks and one or more data I/O pads are selected from a plurality of data I/O pads via which data input or output to/from the selected memory blocks are loaded, memory cell data output from the selected memory blocks are sequentially output to the selected data I/O pads, and data input to the selected data I/O pads are sequentially input to the selected memory blocks, so that read and write operations are independently accomplished in each of data I/O pads. The data I/O width can be adjusted according to the word length which is selectively set up, and power consumption can be reduced due to partial activation of the memory block.

    摘要翻译： 在分组寻址方法中，从多个存储器块中选择一个或多个存储器块，并且从多个数据I / O焊盘中选择一个或多个数据I / O焊盘，通过该数据I / O焊盘输入或输出数据 存储器块被加载，从所选择的存储器块输出的存储单元数据被顺序地输出到选择的数据I / O焊盘，并且输入到所选择的数据I / O焊盘的数据被顺序地输入到所选择的存储器块， 在每个数据I / O焊盘中独立地实现写入操作。 数据I / O宽度可以根据有选择地设置的字长进行调整，由于存储块的部分激活，能够降低功耗。

    Sense amplifier circuit for use in a semiconductor memory device
    49.
    发明授权
    Sense amplifier circuit for use in a semiconductor memory device 有权
    用于半导体存储器件的感测放大器电路

    公开(公告)号：US06381187B1

    公开(公告)日：2002-04-30

    申请号：US09671465

    申请日：2000-09-27

    申请人： Dong-Woo Lee ,  Heung-Soo Im

    发明人： Dong-Woo Lee ,  Heung-Soo Im

    IPC分类号： G11C700

    CPC分类号： G11C7/062 ,  G11C7/067

    摘要： Disclosed herein is a sense amplifier circuit which includes a first, a second and a third similar load transistors. The first and second load transistors supply a dummy data line with a current of the same amount to one another. Acting in a current mirror configuration, the third load transistor supplies a data line with a current equaling the total current supplied by the first and second load transistors. A dummy memory cell is composed of the same transistor as an on-state memory cell. According to this sense amplifier structure, it is very easy to obtain a dummy cell current which has an intermediate value consistently between an on cell current and an off cell current of the memory cell, which are supplied from the third load transistor to the data line. The improved intermediate value yields a reliable readout of the memory cell.

    摘要翻译： 这里公开了一种读出放大器电路，其包括第一，第二和第三类似的负载晶体管。 第一和第二负载晶体管提供具有彼此相同量的电流的虚拟数据线。 作为电流镜配置，第三负载晶体管以等于由第一和第二负载晶体管提供的总电流的电流提供数据线。 虚拟存储单元由与状态存储单元相同的晶体管组成。 根据这种感测放大器结构，很容易获得在从第三负载晶体管提供到数据线的存储单元的导通单元电流和截止单元电流之间具有一致的中间值的虚设单元电流 。 改进的中间值产生可靠的存储单元的读出。

    Device and method for controlling distortion characteristic of predistorter
    50.
    发明授权
    Device and method for controlling distortion characteristic of predistorter 失效
    用于控制预失真器失真特性的装置和方法

    公开(公告)号：US06246865B1

    公开(公告)日：2001-06-12

    申请号：US08789232

    申请日：1997-02-04

    申请人： Dong-Woo Lee

    发明人： Dong-Woo Lee

    IPC分类号： H03C162

    CPC分类号： H04B1/62 ,  H01Q11/12 ,  H03D7/00

    摘要： A device and a method for meeting the distortion characteristic of a predistorter in accordance with the distortion characteristic of an output amplifier in a transmitter. The device controls the non-linear distortion characteristic of a predistorter in a radio communication transmitter which includes the predistorter for beforehand generating the non-linear distortion characteristic in opposition to non-linear distortion characteristics arising in an output amplifier, and up-converter for converting an output frequency of the predistorter into a radio frequency bandpass and outputting the converted frequency to the output amplifier. The device includes: a monitoring unit for monitoring the output level of the output amplifier; a storing unit for beforehand storing the non-linear distortion characteristics of the predistorter as digital data; a distortion controller for outputting and controlling given non-linear distortion characteristic digital data stored in the storing unit in correspondence with the output level of the monitoring unit; and a digital/analog converter for converting the non-linear distortion characteristic digital data outputted by the distortion controller into an analog signal and providing the converted data to the predistorter.

    摘要翻译： 根据发射机中的输出放大器的失真特性来满足预失真器的失真特性的装置和方法。 该装置控制无线电通信发射机中的预失真器的非线性失真特性，该无线通信发射机包括用于与输出放大器中产生的非线性失真特性相反的事先产生非线性失真特性的预失真器，以及用于转换的上变频器 将预失真器的输出频率转换成射频带通，并将转换的频率输出到输出放大器。 该装置包括：监控单元，用于监视输出放大器的输出电平; 存储单元，用于预先将所述预失真器的非线性失真特性存储为数字数据; 失真控制器，用于根据监视单元的输出电平输出和控制存储在存储单元中的给定非线性失真特性数字数据; 以及数字/模拟转换器，用于将由失真控制器输出的非线性失真特性数字数据转换为模拟信号，并将转换的数据提供给预失真器。