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    MRAM etching processes
    41.
    发明授权
    MRAM etching processes 有权

    公开(公告)号：US08536063B2

    公开(公告)日：2013-09-17

    申请号：US13199490

    申请日：2011-08-30

    Applicant: Kimihiro Satoh ,  Yiming Huai ,  Jing Zhang ,  Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger K. Malmhall

    Inventor： Kimihiro Satoh ,  Yiming Huai ,  Jing Zhang ,  Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger K. Malmhall

    IPC: H01L21/302 ,  H01L21/461

    CPC classification number: H01L43/12 ,  H01L29/00

    Abstract: Various embodiments of the invention relate to etching processes used in fabrication of MTJ cells in an MRAM device. The various embodiments can be used in combination with each other. The first embodiment adds a hard mask buffer layer between a hard mask and a top electrode. The second embodiment uses a multilayered etching hard mask. The third embodiment uses a multilayered top electrode structure including a first Cu layer under a second layer such as Ta. The fourth embodiment is a two-phase etching process used for the bottom electrode to remove re-deposited material while maintaining a more vertical sidewall etching profile. In the first phase the bottom electrode layer is removed using carbonaceous reactive ion etching until the endpoint. In the second phase an inert gas and/or oxygen plasma is used to remove the polymer that was deposited during the previous etching processes.

    Method for manufacturing non-volatile magnetic memory
    42.
    发明授权
    Method for manufacturing non-volatile magnetic memory 有权
    制造非易失性磁记忆体的方法

    公开(公告)号：US08535952B2

    公开(公告)日：2013-09-17

    申请号：US12040827

    申请日：2008-02-29

    Applicant: Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger Klas Malmhall

    Inventor： Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger Klas Malmhall

    IPC: H01L21/00

    CPC classification number: H01L43/12 ,  B82Y10/00 ,  B82Y25/00 ,  G11C11/16 ,  H01L27/228

    Abstract: In accordance with a method of the present invention, a method of manufacturing a magnetic random access memory (MRAM) cell and a corresponding structure thereof are disclosed to include a multi-stage manufacturing process. The multi-stage manufacturing process includes performing a front end on-line (FEOL) stage to manufacture logic and non-magnetic portions of the memory cell by forming an intermediate interlayer dielectric (ILD) layer, forming intermediate metal pillars embedded in the intermediate ILD layer, depositing a conductive metal cap on top of the intermediate ILD layer and the metal pillars, performing magnetic fabrication stage to make a magnetic material portion of the memory cell being manufactured, and performing back end on-line (BEOL) stage to make metal and contacts of the memory cell being manufactured.

    Abstract translation: 根据本发明的方法，公开了一种制造磁随机存取存储器（MRAM）单元及其相应结构的方法，以包括多级制造工艺。 多级制造过程包括通过形成中间层间电介质（ILD）层来形成前端在线（FEOL）级来制造存储单元的逻辑和非磁性部分，形成嵌入在中间ILD中的中间金属柱 层，在中间ILD层和金属柱的顶部上沉积导电金属帽，进行磁性制造阶段以制造存储单元的磁性材料部分，并执行后端在线（BEOL）阶段以制造金属 和正在制造的存储单元的触点。

    Non-volatile perpendicular magnetic memory with low switching current and high thermal stability
    45.
    发明授权
    Non-volatile perpendicular magnetic memory with low switching current and high thermal stability 有权
    具有低开关电流和高热稳定性的非易失性垂直磁存储器

    公开(公告)号：US08493777B2

    公开(公告)日：2013-07-23

    申请号：US13453940

    申请日：2012-04-23

    Applicant: Rajiv Yadav Ranjan ,  Parviz Keshtbod

    Inventor： Rajiv Yadav Ranjan ,  Parviz Keshtbod

    IPC: G11C11/14

    CPC classification number: H01L43/10 ,  B82Y10/00 ,  G11C11/161 ,  G11C11/1675 ,  H01L27/228

    Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The non-volatile current-switching magnetic memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer with a perpendicular anisotropy that is formed on top of the tunnel layer, a granular film layer formed on top of the free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second layer, and a top electrode formed on top of the cap layer.

    Abstract translation: 非易失性电流切换磁存储元件包括底电极，形成在底电极顶部的钉扎层和形成在钉扎层顶部上的固定层。 非易失性电流切换磁存储元件还包括形成在钉扎层顶部的隧道层，形成在隧道层顶部上的具有垂直各向异性的第一自由层，形成在隧道层顶部的粒状膜层 自由层，形成在所述粒状膜层的顶部上的第二自由层，形成在所述第二层的顶部上的盖层，以及形成在所述盖层的顶部上的顶部电极。

    Low cost multi-state magnetic memory
    47.
    发明授权
    Low cost multi-state magnetic memory 有权
    低成本多状态磁存储器

    公开(公告)号：US08456897B2

    公开(公告)日：2013-06-04

    申请号：US13216997

    申请日：2011-08-24

    Applicant: Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger Klas Malmhall

    Inventor： Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger Klas Malmhall

    IPC: G11C11/00

    CPC classification number: H01L43/08 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/5607

    Abstract: A multi-state current-switching magnetic memory element has a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer.

    Abstract translation: 多状态电流切换磁存储元件具有磁隧道结（MTJ），用于存储多于一位的信息。 MTJ包括固定层，阻挡层和不均匀的自由层。 在一个实施例中，当每个单元具有2位时，当四个不同电平的电流之一被施加到存储元件时，所施加的电流使MTJ的非均匀自由层切换到四个不同的磁状态之一。 MTJ的宽开关电流分布是非均匀自由层的宽晶粒尺寸分布的结果。

    Non-volatile magnetic memory with low switching current and high thermal stability
    49.
    发明授权
    Non-volatile magnetic memory with low switching current and high thermal stability 有权
    具有低开关电流和高热稳定性的非易失性磁存储器

    公开(公告)号：US08405174B2

    公开(公告)日：2013-03-26

    申请号：US13453928

    申请日：2012-04-23

    Applicant: Rajiv Yadav Ranjan ,  Parviz Keshtbod

    Inventor： Rajiv Yadav Ranjan ,  Parviz Keshtbod

    IPC: H01L29/82 ,  G11C11/00

    CPC classification number: H01L43/10 ,  B82Y10/00 ,  G11C11/161 ,  G11C11/1675 ,  H01L27/228

    Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer formed on top of the tunnel layer, a granular film layer formed on top of the free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second layer and a top electrode formed on top of the cap layer.

    Abstract translation: 非易失性电流切换磁存储元件包括底电极，形成在底电极顶部的钉扎层和形成在钉扎层顶部上的固定层。 存储元件还包括形成在钉扎层顶部的隧道层，形成在隧道层顶部上的第一自由层，形成在自由层顶部上的颗粒膜层，形成在颗粒状的顶部上的第二自由层 膜层，形成在第二层的顶部上的盖层和形成在盖层的顶部上的顶部电极。

    Low-cost non-volatile flash-RAM memory
    50.
    发明授权
    Low-cost non-volatile flash-RAM memory 有权
    低成本的非易失性闪存 - RAM内存

    公开(公告)号：US08391058B2

    公开(公告)日：2013-03-05

    申请号：US13345600

    申请日：2012-01-06

    Applicant: Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Mahmud Assar

    Inventor： Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Mahmud Assar

    IPC: G11C11/14

    CPC classification number: G06F12/0246 ,  G11C11/15 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  G11C14/00 ,  H01L27/105 ,  H01L27/224

    Abstract: A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.

    Abstract translation: 闪存RAM存储器包括形成在单片模块上的非易失性随机存取存储器（RAM）和形成在非易失性RAM，非易失性页面模式存储器和非易失性页面模式存储器之上的非易失性页面模式存储器， 易失性RAM驻留在单片模具上。 非易失性RAM由以三维形式布置的磁存储单元堆叠形成，用于更高密度和更低成本。

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