公开(公告)号：US20070048975A1

公开(公告)日：2007-03-01

申请号：US11218198

申请日：2005-09-01

申请人： Howard Chen ,  Louis Hsu ,  Jack Mandelman

发明人： Howard Chen ,  Louis Hsu ,  Jack Mandelman

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/76254 ,  H01L21/823807 ,  H01L21/823878 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1207

摘要： A semiconductor processing method includes providing a substrate, forming a plurality of semiconductor layers in the substrate, each of the semiconductor layers being distinct and selected from different groups of semiconductor element types, the semiconductor layers comprising first, second, and third semiconductor layers. The method further includes forming a nitride cap layer on the second semiconductor layer prior to forming the third semiconductor layer. Semiconductor structure formed by the above method is also described.

摘要翻译： 半导体处理方法包括提供衬底，在衬底中形成多个半导体层，每个半导体层是不同的并且选自不同的半导体元件组，半导体层包括第一，第二和第三半导体层。 该方法还包括在形成第三半导体层之前在第二半导体层上形成氮化物覆盖层。 还描述了通过上述方法形成的半导体结构。

公开(公告)号：US20070046392A1

公开(公告)日：2007-03-01

申请号：US11217163

申请日：2005-09-01

申请人： Louis Hsu ,  Lowrence Clevenger ,  Timothy Dalton ,  Carl Radens ,  Keith Hon Wong ,  Chih-Chao Yang

发明人： Louis Hsu ,  Lowrence Clevenger ,  Timothy Dalton ,  Carl Radens ,  Keith Hon Wong ,  Chih-Chao Yang

IPC分类号： H01P1/10

CPC分类号： H01H50/005 ,  H01H2050/007 ,  Y10T29/4902 ,  Y10T29/49105 ,  Y10T29/49147

摘要： A MEM switch is described having a free moving element within in micro-cavity, and guided by at least one inductive element. The switch consists of an upper inductive coil; an optional lower inductive coil, each having a metallic core preferably made of permalloy; a micro-cavity; and a free-moving switching element preferably also made of magnetic material. Switching is achieved by passing a current through the upper coil, inducing a magnetic field in the coil element. The magnetic field attracts the free-moving magnetic element upwards, shorting two open wires and thus, closing the switch. When the current flow stops or is reversed, the free-moving magnetic element drops back by gravity to the bottom of the micro-cavity and the wires open. When the chip is not mounted with the correct orientation, gravity cannot be used. In such an instance, a lower coil becomes necessary to pull the free-moving switching element back and holding it at its original position.

摘要翻译： 描述了一种MEM开关，其具有在微腔内的自由移动元件，并由至少一个电感元件引导。 开关由上感应线圈组成; 可选的下感应线圈，每个具有优选由坡莫合金制成的金属芯; 微腔; 以及优选也由磁性材料制成的自由移动的开关元件。 通过使电流通过上部线圈来实现切换，从而在线圈元件中产生磁场。 磁场向上吸引自由移动的磁性元件，短路两根开放的电线，从而闭合开关。 当电流停止或反转时，自由移动的磁性元件通过重力返回到微腔的底部并且电线打开。 当芯片未正确安装时，重力不能使用。 在这种情况下，需要下部线圈将自由移动的开关元件拉回并将其保持在其原始位置。

公开(公告)号：US20070045686A1

公开(公告)日：2007-03-01

申请号：US11216387

申请日：2005-08-31

申请人： Kangguo Cheng ,  Herbert Ho ,  Louis Hsu ,  Jack Mandelman

发明人： Kangguo Cheng ,  Herbert Ho ,  Louis Hsu ,  Jack Mandelman

IPC分类号： H01L29/94

CPC分类号： G11C11/15 ,  H01L27/1203 ,  H01L43/065

摘要： In a first aspect, a first apparatus is provided. The first apparatus is a memory cell that includes (1) a semiconductor fin enclosure formed on an insulating layer of a substrate; and (2) a ferromagnetic material within the semiconductor fin enclosure. A top surface of the ferromagnetic material is below a top surface of the semiconductor fin enclosure. Numerous other aspects are provided.

摘要翻译： 在第一方面中，提供了一种第一装置。 第一装置是存储单元，其包括：（1）形成在基板的绝缘层上的半导体翅片外壳; 和（2）半导体翅片外壳内的铁磁材料。 铁磁材料的顶表面位于半导体翅片外壳的顶表面之下。 提供了许多其他方面。

公开(公告)号：US20070040276A1

公开(公告)日：2007-02-22

申请号：US11207218

申请日：2005-08-19

申请人： Chih-Chao Yang ,  Lawrence Clevenger ,  Timothy Dalton ,  Nicholas Fuller ,  Louis Hsu

发明人： Chih-Chao Yang ,  Lawrence Clevenger ,  Timothy Dalton ,  Nicholas Fuller ,  Louis Hsu

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L23/5252 ,  H01L21/76843 ,  H01L21/76844 ,  H01L2924/0002 ,  H01L2924/00

摘要： An anti-fuse structure that included a buried electrically conductive, e.g., metallic layer as an anti-fuse material as well as a method of forming such an anti-fuse structure are provided. According to the present invention, the inventive anti-fuse structure comprises regions of leaky dielectric between interconnects. The resistance between these original interconnects starts decreasing when two adjacent interconnects are biased and causes a time-dependent dielectric breakdown, TDDB, phenomenon to occur. Decreasing of the resistance between adjacent interconnects can also be expedited via increasing the local temperature.

摘要翻译： 提供了一种抗熔丝结构，其包括掩埋的导电的，例如作为反熔丝材料的金属层以及形成这种抗熔丝结构的方法。 根据本发明，本发明的抗熔丝结构包括互连之间的漏电介质区域。 当两个相邻的互连被偏置时，这些原始互连之间的电阻开始减小，并且引起时间依赖介质击穿TDDB现象。 也可以通过增加局部温度来加速相邻互连之间的电阻的降低。

公开(公告)号：US20070023806A1

公开(公告)日：2007-02-01

申请号：US11193660

申请日：2005-07-29

申请人： Michael Gaidis ,  Carl Radens ,  Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Keith Hon Wong ,  Chih-Chao Yang

发明人： Michael Gaidis ,  Carl Radens ,  Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Keith Hon Wong ,  Chih-Chao Yang

IPC分类号： H01L29/94

CPC分类号： B82Y10/00 ,  H01L27/222 ,  H01L43/12

摘要： A magnetic random access memory (MRAM) device includes a magnetic tunnel junction (MTJ) stack formed over a lower wiring level, a hardmask formed on the MTJ stack, and an upper wiring level formed over the hardmask. The upper wiring level includes a slot via bitline formed therein, the slot via bitline in contact with the hardmask and in contact with an etch stop layer partially surrounding sidewalls of the hardmask.

摘要翻译： 磁性随机存取存储器（MRAM）器件包括形成在下布线层上的磁隧道结（MTJ）堆叠，形成在MTJ堆叠上的硬掩模和形成在硬掩模上的上布线层。 上布线层包括经由位于其中的位线的槽，槽经由与硬掩模接触的位线并与部分地围绕硬掩模的侧壁的蚀刻停止层接触。

公开(公告)号：US20070001736A1

公开(公告)日：2007-01-04

申请号：US11155848

申请日：2005-06-17

申请人： Herschel Ainspan ,  Gautam Gangasani ,  Louis Hsu ,  Jack Mandelman

发明人： Herschel Ainspan ,  Gautam Gangasani ,  Louis Hsu ,  Jack Mandelman

IPC分类号： G06F1/04

CPC分类号： G06F1/04

摘要： An apparatus and method for generating high-speed clock signals using a voltage-controlled-oscillator (VCO) device. The apparatus implements a linear variable gain amplifier rather than a non-linear hard limiter to remove unwanted signal modulation in VCO output signals. Implementation of the linear variable gain amplifier leads to the generation of amplitude modulation-free oscillation leading to the generation of jitter free high frequency clock signals.

公开(公告)号：US20060234443A1

公开(公告)日：2006-10-19

申请号：US11106887

申请日：2005-04-15

申请人： Chih-Chao Yang ,  Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu

发明人： Chih-Chao Yang ,  Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu

IPC分类号： H01L21/8242 ,  H01L21/20

CPC分类号： H01L23/5223 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A damascene MIM capacitor and a method of fabricating the MIM capacitor. The MIN capacitor includes a dielectric layer having top and bottom surfaces; a trench in the dielectric layer, the trench extending from the top surface to the bottom surface of the dielectric layer; a first plate of a MIM capacitor comprising a conformal conductive liner formed on all sidewalls and extending along a bottom of the trench, the bottom of the trench coplanar with the bottom surface of the dielectric layer; an insulating layer formed over a top surface of the conformal conductive liner; and a second plate of the MIM capacitor comprising a core conductor in direct physical contact with the insulating layer, the core conductor filling spaces in the trench not filled by the conformal conductive liner and the insulating layer. The method includes forming portions of the MIM capacitor simultaneously with damascene interconnection wires.

摘要翻译： 一种镶嵌MIM电容器和一种制造MIM电容器的方法。 MIN电容器包括具有顶表面和底表面的电介质层; 电介质层中的沟槽，沟槽从电介质层的顶表面延伸到底表面; MIM电容器的第一板包括形成在所有侧壁上并沿着沟槽的底部延伸的共形导电衬垫，沟槽的底部与电介质层的底表面共面; 绝缘层，形成在所述共形导电衬垫的顶表面上; 以及MIM电容器的第二板，其包括与所述绝缘层直接物理接触的芯导体，所述芯导体填充所述沟槽中的未被所述共形导电衬垫和所述绝缘层填充的空间。 该方法包括与镶嵌互连线同时形成MIM电容器的部分。

公开(公告)号：US20060220688A1

公开(公告)日：2006-10-05

申请号：US11098078

申请日：2005-04-04

申请人： Louis Hsu ,  Brian Ji ,  Chung Lam

发明人： Louis Hsu ,  Brian Ji ,  Chung Lam

IPC分类号： H03K5/22

CPC分类号： G11C13/0069 ,  G11C13/0004 ,  G11C13/0064 ,  G11C2013/0054

摘要： The present invention comprises a method and structure for programming an on-chip phase-change resistor to a target resistance. Using an off-chip precision resistor as a reference, a state-machine determines a difference between the resistance of an on-chip resistor and the target resistance. Based upon this difference, the state machine directs a pulse generator to apply set or reset pulses to the on-chip resistor in order to decrease or increase, respectively, the resistance of the resistor, as necessary. In order to program the resistance of the phase-change resistor to a tight tolerance, it is successively reset and set by applying progressively decreasing numbers of reset pulses and set pulses, respectively, until the number of set pulses is equal to one and the target resistance of the on-chip resistor is reached.

摘要翻译： 本发明包括用于将片上相变电阻器编程为目标电阻的方法和结构。 使用片外精密电阻器作为参考，状态机确定片上电阻器的电阻与目标电阻之间的差。 基于这种差异，状态机引导脉冲发生器将片上电阻器设置或复位脉冲施加到片上电阻器，以便根据需要分别降低或增加电阻器的电阻。 为了将相变电阻器的电阻编程为严格的公差，通过分别逐渐递减的复位脉冲数和设定脉冲数来连续复位和设置，直到设定脉冲数等于1，目标值 达到片上电阻的电阻。

公开(公告)号：US20060159200A1

公开(公告)日：2006-07-20

申请号：US10905705

申请日：2005-01-18

申请人： Louis Hsu ,  Matt Cordrey-Gale ,  James Mason ,  Phillip Murfet ,  Karl Selander ,  Michael Sorna ,  Huihao Xu

发明人： Louis Hsu ,  Matt Cordrey-Gale ,  James Mason ,  Phillip Murfet ,  Karl Selander ,  Michael Sorna ,  Huihao Xu

IPC分类号： H04L27/22

CPC分类号： H04L25/0274 ,  H04L25/0296

摘要： A data receiver is provided which includes a front end interface circuit having an alternating current (AC) transmission receiving mode and a direct current (DC) transmission receiving mode. The front end interface circuit includes an offset compensation circuit operable to compensate a DC voltage offset between a pair of differential signals input to the data receiver. The front end interface circuit further includes an AC/DC selection unit operable to switch between (a) the DC transmission receiving mode, and (b) the AC transmission receiving mode, such that the data receiver is operable in (i) the DC transmission mode in which the offset compensation circuit is disabled, (ii) the DC transmission mode in which the offset compensation circuit is enabled, (iii) the AC transmission mode in which the offset compensation circuit is disabled, and (iv) the AC transmission receiving mode in which the offset compensation circuit is enabled.

摘要翻译： 提供一种数据接收器，其包括具有交流（AC）发送接收模式和直流（DC）发送接收模式的前端接口电路。 前端接口电路包括偏移补偿电路，其可操作以补偿输入到数据接收器的一对差分信号之间的直流电压偏移。 前端接口电路还包括可操作以在（a）直流发送接收模式和（b）交流发送接收模式之间切换的AC / DC选择单元，使得数据接收器可操作于（i）直流传输 偏移补偿电路被禁用的模式，（ii）使能偏移补偿电路的直流传输模式，（iii）偏移补偿电路被禁用的AC传输模式，以及（iv）AC传输接收 偏移补偿电路使能的模式。

公开(公告)号：US20060158229A1

公开(公告)日：2006-07-20

申请号：US10905704

申请日：2005-01-18

申请人： Louis Hsu ,  Karl Selander ,  Michael Sorna

发明人： Louis Hsu ,  Karl Selander ,  Michael Sorna

IPC分类号： H03K5/19

CPC分类号： H03K5/19 ,  G01R19/165

摘要： An improved signal detector system implementable in a high-speed SerDes receiver core that is able to detect valid signals from noise signals with a much tighter tolerance. The signal detector system improves upon the prior art designs by implementing modifications including: (1) the use of two peaking amplifiers for both (differential) input signals and reference to track and cancel gain variation; and, (2) the reduction of current mirroring stages to cut down current mapping error.

摘要翻译： 改进的信号检测器系统可实现在高速SerDes接收机核心中，能够以更严格的公差检测来自噪声信号的有效信号。 信号检测器系统通过实施修改来改进现有技术的设计，包括：（1）使用两个峰值放大器用于（差分）输入信号和参考跟踪和消除增益变化; 和（2）减少当前镜像阶段以减少当前的映射误差。