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    Method for the manufacture of electromagnetic radiation reflecting devices
    42.
    发明授权
    Method for the manufacture of electromagnetic radiation reflecting devices 有权
    制造电磁辐射反射装置的方法

    公开(公告)号：US06759132B2

    公开(公告)日：2004-07-06

    申请号：US10295767

    申请日：2002-11-14

    申请人： Ubaldo Mastromatteo ,  Pietro Corona ,  Flavio Villa ,  Gabriele Barlocchi

    发明人： Ubaldo Mastromatteo ,  Pietro Corona ,  Flavio Villa ,  Gabriele Barlocchi

    IPC分类号： B32B900

    CPC分类号： G11B7/1362 ,  G02B5/08 ,  G02B6/4214 ,  G11B7/123 ,  Y10T428/12528

    摘要： Method for manufacturing electromagnetic radiation reflecting devices, said method comprising the steps of: a) providing a silicon substrate defined by at least one first free surface, b) forming on said first surface a layer of protective material provided with an opening which exposes a region of the first free surface, and c)etching the region of the free surface by means of an anisotropic agent to remove at least one portion of the substrate and define a second free surface of the substrate inclined in relation to said first surface. Furthermore, said first free surface is parallel to the crystalline planes {110} of silicon substrate and said step (c) comprises a progressing step of the anisotropic agent such that the second free surface resulting from the etching step is parallel to the planes {100} of said substrate.

    摘要翻译： 用于制造电磁辐射反射装置的方法，所述方法包括以下步骤：a）提供由至少一个第一自由表面限定的硅衬底，b）在所述第一表面上形成一层保护材料，所述保护材料层具有暴露区域 的第一自由表面，以及c）借助于各向异性剂蚀刻所述自由表面的区域以去除所述衬底的至少一部分并且限定所述衬底相对于所述第一表面倾斜的第二自由表面。 此外，所述第一自由表面平行于硅衬底的晶面{110}，并且所述步骤（c）包括各向异性剂的进行步骤，使得由蚀刻步骤产生的第二自由表面平行于平面{100 }。

    Process for manufacturing a high-quality SOI wafer
    44.
    发明申请
    Process for manufacturing a high-quality SOI wafer 有权
    用于制造高质量SOI晶片的工艺

    公开(公告)号：US20070042558A1

    公开(公告)日：2007-02-22

    申请号：US11448589

    申请日：2006-06-06

    申请人： Flavio Villa ,  Pietro Corona ,  Gabriele Barlocchi

    发明人： Flavio Villa ,  Pietro Corona ,  Gabriele Barlocchi

    IPC分类号： H01L21/8222 ,  H01L21/331

    CPC分类号： H01L21/76264 ,  H01L21/3247

    摘要： In a process for manufacturing a SOI wafer, the following steps are envisaged: forming, in a monolithic body of semiconductor material having a front face, a buried cavity, which extends at a distance from the front face and delimits, with the front face, a surface region of the monolithic body, the surface region being surrounded by a bulk region and forming a flexible membrane suspended above the buried cavity; forming, through the monolithic body, at least one access passage, which reaches the buried cavity; and filling the buried cavity uniformly with an insulating region. The surface region is continuous and formed by a single portion of semiconductor material, and the buried cavity is contained and completely insulated within the monolithic body; the step of forming at least one access passage is performed after the step of forming a buried cavity.

    摘要翻译： 在制造SOI晶片的工艺中，设想以下步骤：在具有前表面的半导体材料的整体式中，与前表面相距一定距离地延伸的掩埋腔， 所述整体体的表面区域，所述表面区域被块体区域包围并形成悬浮在所述掩埋空腔上方的柔性膜; 通过整体式的主体形成至少一个到达埋入腔的进入通道; 并且用绝缘区域均匀地填充掩埋腔。 表面区域是连续的，由半导体材料的单一部分形成，并且掩埋腔被包含并在整体体内完全绝缘; 在形成掩埋腔的步骤之后，进行形成至少一个进入通道的步骤。

    Process for forming a buried cavity in a semiconductor material wafer and a buried cavity
    45.
    发明授权
    Process for forming a buried cavity in a semiconductor material wafer and a buried cavity 有权
    在半导体材料晶片和掩埋腔中形成掩埋腔的工艺

    公开(公告)号：US06992367B2

    公开(公告)日：2006-01-31

    申请号：US10712211

    申请日：2003-11-12

    申请人： Pietro Erratico ,  Enrico Sacchi ,  Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

    发明人： Pietro Erratico ,  Enrico Sacchi ,  Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

    IPC分类号： H01L29/00

    CPC分类号： B81C1/00404

    摘要： The process comprises the steps of forming, on top of a semiconductor material wafer, a holed mask having a lattice structure and comprising a plurality of openings each having a substantially square shape and a side with an inclination of 45° with respect to the flat of the wafer; carrying out an anisotropic etch in TMAH of the wafer, using said holed mask, thus forming a cavity, the cross section of which has the shape of an upside-down isosceles trapezium; and carrying out a chemical vapor deposition using TEOS, thus forming a TEOS layer which completely closes the openings of the holed mask and defines a diaphragm overlying the cavity and on which a suspended integrated structure can subsequently be manufactured.

    摘要翻译： 该方法包括以下步骤：在半导体材料晶片的顶部上形成具有格子结构的孔掩模，并且包括多个开口，每个开口具有大致正方形的形状，并且相对于平面的平面倾斜45° 晶圆; 在晶片的TMAH中进行各向异性蚀刻，使用所述带孔掩模，从而形成空腔，其横截面具有倒立的等腰梯形的形状; 并且使用TEOS进行化学气相沉积，由此形成TEOS层，其完全封闭了孔罩的开口，并且限定了覆盖在空腔上的隔膜，并且随后可以制造悬浮的一体结构。

    Process for manufacturing buried channels and cavities in semiconductor material wafers
    46.
    发明授权
    Process for manufacturing buried channels and cavities in semiconductor material wafers 有权
    用于在半导体材料晶片中制造掩埋沟道和空腔的工艺

    公开(公告)号：US06376291B1

    公开(公告)日：2002-04-23

    申请号：US09558959

    申请日：2000-04-25

    申请人： Gabriele Barlocchi ,  Flavio Villa ,  Pietro Corona

    发明人： Gabriele Barlocchi ,  Flavio Villa ,  Pietro Corona

    IPC分类号： H01L21338

    CPC分类号： B81C1/00047 ,  B01L3/5027 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C2201/0177 ,  H01L21/764

    摘要： A process of forming on a monocrystalline-silicon body an etching-aid region of polycrystalline silicon; forming, on the etching-aid region a nucleus region of polycrystalline silicon surrounded by a protective structure having an opening extending as far as the etching-aid region; TMAH-etching the etching-aid region and the monocrystalline body to form a tub-shaped cavity; removing the top layer of the protective structure; and growing an epitaxial layer on the monocrystalline body and the nucleus region. The epitaxial layer, of monocrystalline type on the monocrystalline body and of polycrystalline type on the nucleus region, closes upwardly the etching opening, and the cavity is thus completely embedded in the resulting wafer.

    摘要翻译： 在单晶硅体上形成多晶硅的蚀刻助剂区域的工艺; 在所述蚀刻助剂区域上形成由保护结构包围的多晶硅的核区域，所述保护结构具有延伸到所述蚀刻助剂区域的开口; TMAH蚀刻蚀刻助剂区域和单晶体体以形成桶形空腔; 去除保护结构的顶层; 并在单晶体和核区域上生长外延层。 在单晶体上的单晶型的外延层和在核区上的多晶型的外延层向上封闭蚀刻开口，并且因此该空腔完全嵌入所得的晶片中。

    Method for forming buried cavities within a semiconductor body, and semiconductor body thus made
    49.
    发明申请
    Method for forming buried cavities within a semiconductor body, and semiconductor body thus made 有权
    在半导体本体内形成掩埋空穴的方法以及由此制成的半导体本体

    公开(公告)号：US20070057355A1

    公开(公告)日：2007-03-15

    申请号：US11486387

    申请日：2006-07-12

    申请人： Gabriele Barlocchi ,  Pietro Corona ,  Dino Faralli ,  Flavio Villa

    发明人： Gabriele Barlocchi ,  Pietro Corona ,  Dino Faralli ,  Flavio Villa

    IPC分类号： H01L21/324 ,  H01L23/16

    CPC分类号： B81C1/00047 ,  B01L3/502707 ,  B01L7/52 ,  B01L2200/12 ,  B01L2300/0636 ,  B01L2300/0645 ,  B01L2300/0816 ,  B01L2300/1827 ,  B81B2201/0264 ,  B81B2203/0315

    摘要： A method for the formation of buried cavities within a semiconductor body envisages the steps of: providing a wafer having a bulk region made of semiconductor material; digging, in the bulk region, trenches delimiting between them walls of semiconductor material; forming a closing layer for closing the trenches in the presence of a deoxidizing atmosphere so as to englobe the deoxidizing atmosphere within the trenches; and carrying out a thermal treatment such as to cause migration of the semiconductor material of the walls and to form a buried cavity. Furthermore, before the thermal treatment is carried out, a barrier layer that is substantially impermeable to hydrogen is formed on the closing layer on top of the trenches.

    摘要翻译： 一种用于在半导体主体内形成掩埋空腔的方法，设想了以下步骤：提供具有由半导体材料制成的体区的晶片; 在本体区域中挖掘在它们的半导体材料壁之间划定的沟槽; 形成用于在脱氧气氛存在下关闭所述沟槽的闭合层，以便使所述沟槽内的脱氧气氛充满; 进行热处理，使壁的半导体材料迁移并形成掩埋腔。 此外，在进行热处理之前，在沟槽顶部的闭合层上形成基本上不透氢的阻挡层。