Semiconductor device with trench transistors and method for manufacturing such a device
    41.
    发明授权
    Semiconductor device with trench transistors and method for manufacturing such a device 有权
    具有沟槽晶体管的半导体器件及其制造方法

    公开(公告)号:US07601596B2

    公开(公告)日:2009-10-13

    申请号:US11600422

    申请日:2006-11-16

    IPC分类号: H01L21/336

    摘要: According to one embodiment, a method for manufacturing a semiconductor device includes forming trenches in a first side of a semiconductor material and forming a thick oxide layer on the trenches and on the first side. A part of the first side and the trenches is masked using a first mask, and the semiconductor material is doped by implantation through the thick oxide layer while the first mask is present. At least part of the thick oxide layer is removed while the first mask remains.

    摘要翻译: 根据一个实施例,一种用于制造半导体器件的方法包括:在半导体材料的第一侧形成沟槽,并在沟槽和第一侧上形成厚的氧化物层。 使用第一掩模掩模第一侧面和沟槽的一部分,并且通过在第一掩模存在的情况下通过厚氧化物层的注入来掺杂半导体材料。 当第一掩模残留时,去除厚氧化物层的至少一部分。

    SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT
    44.
    发明申请
    SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT 有权
    半导体元件和半导体元件的制造方法

    公开(公告)号:US20080230833A1

    公开(公告)日:2008-09-25

    申请号:US11690494

    申请日:2007-03-23

    IPC分类号: H01L29/78 H01L21/336

    摘要: A semiconductor component having a semiconductor body having first and second semiconductor regions of a first conduction type, and a third semiconductor region of a second conduction type, which is complementary to the first conduction type. The second semiconductor region is arranged between the first and third semiconductor region and together with the first semiconductor region forms a first junction region and together with the third semiconductor region forms a second junction region. In the second semiconductor region the dopant concentration is lower than the dopant concentration in the first semiconductor region. The dopant concentration in the second semiconductor region along a straight connecting line between the first and third semiconductor regions is inhomogeneous and has at least one minimum between the first and second junction regions, wherein the minimum is at a distance from the first and second junction regions.

    摘要翻译: 一种半导体元件,具有半导体本体,该半导体本体具有第一导电类型的第一和第二半导体区域以及与第一导电类型互补的第二导电类型的第三半导体区域。 第二半导体区域布置在第一和第三半导体区域之间并与第一半导体区域一起形成第一结区域,并与第三半导体区域一起形成第二结区域。 在第二半导体区域中,掺杂剂浓度低于第一半导体区域中的掺杂剂浓度。 沿着第一和第三半导体区域之间的直连接线的第二半导体区域中的掺杂剂浓度是不均匀的,并且在第一和第二结区域之间具有至少一个最小值,其中最小值距离第一和第二接合区域 。

    ELECTRONIC DEVICE WITH CONNECTING STRUCTURE
    45.
    发明申请
    ELECTRONIC DEVICE WITH CONNECTING STRUCTURE 有权
    具有连接结构的电子设备

    公开(公告)号:US20080128803A1

    公开(公告)日:2008-06-05

    申请号:US11947552

    申请日:2007-11-29

    IPC分类号: H01L29/78

    摘要: A connecting structure for an electronic device includes an edge region of the device, a first trench and a second trench running toward the edge region, a first electrode within the first trench, and a second electrode within the second trench, the first and second electrodes being arranged in a same electrode plane with regard to a main surface of a substrate of the electronic device within the trenches, and the first electrode extending, at an edge region side end of the first trench, farther toward the edge region than the second electrode extends, at an edge region side end of the second trench, toward the edge region.

    摘要翻译: 电子设备的连接结构包括器件的边缘区域,朝向边缘区域延伸的第一沟槽和第二沟槽,第一沟槽内的第一电极和第二沟槽内的第二电极,第一和第二电极 相对于沟槽内的电子器件的基板的主表面而布置在相同的电极平面中,并且在第一沟槽的边缘区域侧端部延伸的第一电极比第二电极更向边缘区域延伸 在第二沟槽的边缘区域侧端部延伸到边缘区域。

    MOS field plate trench transistor device
    46.
    发明授权
    MOS field plate trench transistor device 有权
    MOS场板沟槽晶体管器件

    公开(公告)号:US07372103B2

    公开(公告)日:2008-05-13

    申请号:US11395103

    申请日:2006-03-31

    IPC分类号: H01L29/76

    摘要: A MOS field plate trench transistor device is disclosed. In one embodiment, in order to obtain a lowest possible on resistance, in the case of a MOS field plate trench transistor device having a body contact hole, it is proposed to form the avalanche breakdown region preferably in an end region of a provided trench structure by virtue of the fact that a mesa region with the body contact region in the semiconductor region as intermediate region in a direction running perpendicular to the first direction and with respect to an adjacent MOS transistor device has a width DMesa, the value of which corresponds to the value of the width DTrench of the trench structure in this direction or exceeds said value and does not go beyond 1.5 times said value, so that the following holds true: DTrench≦DMesa≦1.5·DTrench. As an alternative, the width DMesa is chosen such that the body contact hole precisely still has space, but the breakdown region is in any event shifted into the end region.

    摘要翻译: 公开了一种MOS场板沟槽晶体管器件。 在一个实施例中,为了获得最低可能的导通电阻,在具有体接触孔的MOS场板沟槽晶体管器件的情况下,优选地在所提供的沟槽结构的端部区域中形成雪崩击穿区域 由于在半导体区域中具有与第一方向垂直的方向作为中间区域并且相对于相邻的MOS晶体管器件的半导体区域的台面区域具有宽度D Sub Mesa ,其值对应于该方向上的沟槽结构的宽度D <沟槽的值或超过所述值,并且不超过所述值的1.5倍,使得以下是正确的: 作为替代方案,选择宽度D Mesa 使得身体接触孔精确地仍然具有空间,但击穿区域在任何情况下都移入端部区域。

    Semiconductor component arrangement comprising a trench transistor
    47.
    发明申请
    Semiconductor component arrangement comprising a trench transistor 有权
    半导体元件布置包括沟槽晶体管

    公开(公告)号:US20070215920A1

    公开(公告)日:2007-09-20

    申请号:US11715275

    申请日:2007-03-07

    IPC分类号: H01L29/76

    摘要: Disclosed is a semiconductor component arrangement and a method for producing a semiconductor component arrangement. The method comprises producing a trench transistor structure with at least one trench disposed in the semiconductor body and with at least a gate electrode disposed in the at least one trench. An electrode structure is disposed in at least one further trench and comprises an at least one electrode. The at least one trench of the transistor structure and the at least one further trench are produced by common process steps. Furthermore, the at least one electrode of the electrode structure and the gate electrode are produced by common process steps.

    摘要翻译: 公开了一种用于制造半导体元件布置的半导体元件布置和方法。 该方法包括产生沟槽晶体管结构,其中至少一个沟槽设置在半导体本体中,并且至少一个栅电极设置在该至少一个沟槽中。 电极结构设置在至少一个另外的沟槽中,并且包括至少一个电极。 晶体管结构的至少一个沟槽和至少一个另外的沟槽通过公共工艺步骤产生。 此外,电极结构的至少一个电极和栅电极通过常规的工艺步骤制造。

    MOS field plate trench transistor device
    48.
    发明申请
    MOS field plate trench transistor device 有权
    MOS场板沟槽晶体管器件

    公开(公告)号:US20060258105A1

    公开(公告)日:2006-11-16

    申请号:US11395103

    申请日:2006-03-31

    IPC分类号: H01L27/10 H01L21/336

    摘要: A MOS field plate trench transistor device is disclosed. In one embodiment, in order to obtain a lowest possible on resistance, in the case of a MOS field plate trench transistor device having a body contact hole, it is proposed to form the avalanche breakdown region preferably in an end region of a provided trench structure by virtue of the fact that a mesa region with the body contact region in the semiconductor region as intermediate region in a direction running perpendicular to the first direction and with respect to an adjacent MOS transistor device has a width DMesa, the value of which corresponds to the value of the width DTrench of the trench structure in this direction or exceeds said value and does not go beyond 1.5 times said value, so that the following holds true: DTrench≦DMesa≦1.5·DTrench. As an alternative, the width DMesa is chosen such that the body contact hole precisely still has space, but the breakdown region is in any event shifted into the end region.

    摘要翻译: 公开了一种MOS场板沟槽晶体管器件。 在一个实施例中,为了获得最低可能的导通电阻,在具有体接触孔的MOS场板沟槽晶体管器件的情况下,优选地在所提供的沟槽结构的端部区域中形成雪崩击穿区域 由于在半导体区域中具有与第一方向垂直的方向作为中间区域并且相对于相邻的MOS晶体管器件的半导体区域的台面区域具有宽度D Sub Mesa ,其值对应于该方向上的沟槽结构的宽度D <沟槽的值,或者超过所述值,并且不超过所述值的1.5倍,使得以下情况成立: 作为替代方案,选择宽度D Mesa 使得身体接触孔精确地仍然具有空间,但击穿区域在任何情况下都移入端部区域。

    Method for fabricating a semiconductor component
    49.
    发明申请
    Method for fabricating a semiconductor component 审中-公开
    半导体部件的制造方法

    公开(公告)号:US20050118816A1

    公开(公告)日:2005-06-02

    申请号:US10955392

    申请日:2004-09-30

    摘要: A method for fabricating a semiconductor power component is disclosed. In one embodiment, the method for fabricating a semiconductor power component includes formation of a semiconductor structure in/on a substrate, a semiconductor region serving as a stop layer being formed at the level of a target thickness of the semiconductor power component through the semiconductor structure in the semiconductor structure or in the substrate, the doping concentration of said semiconductor region being increased/reduced with respect to that of the substrate, and/or the doping type of said semiconductor region being inverted with respect to that of the substrate. At least one part of the substrate is thinned to the target thickness using an etchant whose etching rate is dependent on the concentration and/or the type of the doping, the etchant being chosen such that the thinning process is stopped or slowed down by the semiconductor region serving as a stop layer.

    摘要翻译: 公开了一种制造半导体功率元件的方法。 在一个实施例中,制造半导体功率部件的方法包括在衬底中/在衬底中形成半导体结构,通过半导体结构在半导体功率部件的目标厚度的水平上形成用作停止层的半导体区域 在半导体结构中或在衬底中,所述半导体区域的掺杂浓度相对于衬底的掺杂浓度增加/减少,和/或所述半导体区域的掺杂类型相对于衬底的掺杂类型被反转。 使用蚀刻剂蚀刻速率取决于浓度和/或掺杂类型的蚀刻剂将衬底的至少一部分变薄到目标厚度,蚀刻剂被选择为使得稀化处理被半导体停止或减慢 作为停止层的区域。