公开(公告)号：US08907408B2

公开(公告)日：2014-12-09

申请号：US13429525

申请日：2012-03-26

申请人： Stefan Sedlmaier ,  Markus Zundel ,  Franz Hirler ,  Johannes Baumgartl ,  Anton Mauder ,  Ralf Siemieniec ,  Oliver Blank ,  Michael Hutzler

发明人： Stefan Sedlmaier ,  Markus Zundel ,  Franz Hirler ,  Johannes Baumgartl ,  Anton Mauder ,  Ralf Siemieniec ,  Oliver Blank ,  Michael Hutzler

IPC分类号： H01L29/66

CPC分类号： H01L29/407 ,  H01L21/765 ,  H01L29/0653 ,  H01L29/401 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/515 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7804 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7843

摘要： A field-effect semiconductor device is provided. The field-effect semiconductor device includes a semiconductor body with a first surface defining a vertical direction. In a vertical cross-section the field-effect semiconductor device further includes a vertical trench extending from the first surface into the semiconductor body. The vertical trench includes a field electrode, a cavity at least partly surrounded by the field electrode, and an insulation structure substantially surrounding at least the field electrode. Further, a method for producing a field-effect semiconductor device is provided.

摘要翻译： 提供场效应半导体器件。 场效应半导体器件包括具有限定垂直方向的第一表面的半导体本体。 在垂直截面中，场效应半导体器件还包括从第一表面延伸到半导体本体中的垂直沟槽。 垂直沟槽包括场电极，至少部分地被场电极包围的空腔以及至少基本上围绕场电极的绝缘结构。 此外，提供了一种用于制造场效应半导体器件的方法。

公开(公告)号：US20130248993A1

公开(公告)日：2013-09-26

申请号：US13429525

申请日：2012-03-26

申请人： Stefan Sedlmaier ,  Markus Zundel ,  Franz Hirler ,  Johannes Baumgartl ,  Anton Mauder ,  Ralf Siemieniec ,  Oliver Blank ,  Michael Hutzler

发明人： Stefan Sedlmaier ,  Markus Zundel ,  Franz Hirler ,  Johannes Baumgartl ,  Anton Mauder ,  Ralf Siemieniec ,  Oliver Blank ,  Michael Hutzler

IPC分类号： H01L27/088 ,  H01L21/283 ,  H01L29/78

CPC分类号： H01L29/407 ,  H01L21/765 ,  H01L29/0653 ,  H01L29/401 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/515 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7804 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7843

摘要： A field-effect semiconductor device is provided. The field-effect semiconductor device includes a semiconductor body with a first surface defining a vertical direction. In a vertical cross-section the field-effect semiconductor device further includes a vertical trench extending from the first surface into the semiconductor body. The vertical trench includes a field electrode, a cavity at least partly surrounded by the field electrode, and an insulation structure substantially surrounding at least the field electrode. Further, a method for producing a field-effect semiconductor device is provided.

摘要翻译： 提供场效应半导体器件。 场效应半导体器件包括具有限定垂直方向的第一表面的半导体本体。 在垂直截面中，场效应半导体器件还包括从第一表面延伸到半导体本体中的垂直沟槽。 垂直沟槽包括场电极，至少部分地被场电极包围的空腔以及至少基本上围绕场电极的绝缘结构。 此外，提供了一种用于制造场效应半导体器件的方法。

公开(公告)号：US07615847B2

公开(公告)日：2009-11-10

申请号：US11690494

申请日：2007-03-23

申请人： Markus Zundel ,  Franz Hirler ,  Ralf Siemieniec

发明人： Markus Zundel ,  Franz Hirler ,  Ralf Siemieniec

IPC分类号： H01L29/861

CPC分类号： H01L29/7802 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/66734 ,  H01L29/7809 ,  H01L29/7813

摘要： A semiconductor component having a semiconductor body having first and second semiconductor regions of a first conduction type, and a third semiconductor region of a second conduction type, which is complementary to the first conduction type. The second semiconductor region is arranged between the first and third semiconductor region and together with the first semiconductor region forms a first junction region and together with the third semiconductor region forms a second junction region. In the second semiconductor region the dopant concentration is lower than the dopant concentration in the first semiconductor region. The dopant concentration in the second semiconductor region along a straight connecting line between the first and third semiconductor regions is inhomogeneous and has at least one minimum between the first and second junction regions, wherein the minimum is at a distance from the first and second junction regions.

摘要翻译： 一种半导体元件，具有半导体本体，该半导体本体具有第一导电类型的第一和第二半导体区域以及与第一导电类型互补的第二导电类型的第三半导体区域。 第二半导体区域布置在第一和第三半导体区域之间并与第一半导体区域一起形成第一结区域，并与第三半导体区域一起形成第二结区域。 在第二半导体区域中，掺杂剂浓度低于第一半导体区域中的掺杂剂浓度。 沿着第一和第三半导体区域之间的直连接线的第二半导体区域中的掺杂剂浓度是不均匀的，并且在第一和第二结区域之间具有至少一个最小值，其中最小值距离第一和第二接合区域 。

公开(公告)号：US20080230833A1

公开(公告)日：2008-09-25

申请号：US11690494

申请日：2007-03-23

申请人： Markus Zundel ,  Franz Hirler ,  Ralf Siemieniec

发明人： Markus Zundel ,  Franz Hirler ,  Ralf Siemieniec

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7802 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/66734 ,  H01L29/7809 ,  H01L29/7813

摘要： A semiconductor component having a semiconductor body having first and second semiconductor regions of a first conduction type, and a third semiconductor region of a second conduction type, which is complementary to the first conduction type. The second semiconductor region is arranged between the first and third semiconductor region and together with the first semiconductor region forms a first junction region and together with the third semiconductor region forms a second junction region. In the second semiconductor region the dopant concentration is lower than the dopant concentration in the first semiconductor region. The dopant concentration in the second semiconductor region along a straight connecting line between the first and third semiconductor regions is inhomogeneous and has at least one minimum between the first and second junction regions, wherein the minimum is at a distance from the first and second junction regions.

摘要翻译： 一种半导体元件，具有半导体本体，该半导体本体具有第一导电类型的第一和第二半导体区域以及与第一导电类型互补的第二导电类型的第三半导体区域。 第二半导体区域布置在第一和第三半导体区域之间并与第一半导体区域一起形成第一结区域，并与第三半导体区域一起形成第二结区域。 在第二半导体区域中，掺杂剂浓度低于第一半导体区域中的掺杂剂浓度。 沿着第一和第三半导体区域之间的直连接线的第二半导体区域中的掺杂剂浓度是不均匀的，并且在第一和第二结区域之间具有至少一个最小值，其中最小值距离第一和第二接合区域 。

公开(公告)号：US08823087B2

公开(公告)日：2014-09-02

申请号：US13420768

申请日：2012-03-15

申请人： Franz Hirler ,  Markus Zundel

发明人： Franz Hirler ,  Markus Zundel

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7813 ,  H01L21/2255 ,  H01L21/2257 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66734

摘要： A semiconductor device includes a trench region extending into a drift zone of a semiconductor body from a surface. The semiconductor device further includes a dielectric structure including a first step and a second step along a lateral side of the trench region. The semiconductor device further includes an auxiliary structure of a first conductivity type between the first step and the second step, a gate electrode in the trench region and a body region of a second conductivity type other than the first conductivity type of the drift zone. The auxiliary structure adjoins each one of the drift zone, the body region and the dielectric structure.

摘要翻译： 半导体器件包括从表面延伸到半导体本体的漂移区的沟槽区域。 半导体器件还包括电介质结构，其包括沿沟槽区域的横向侧的第一步骤和第二步骤。 半导体器件还包括在第一步骤和第二步骤之间的第一导电类型的辅助结构，沟槽区域中的栅极电极和除漂移区域的第一导电类型之外的第二导电类型的体区域。 辅助结构邻接漂移区，体区和电介质结构中的每一个。

公开(公告)号：US08501561B2

公开(公告)日：2013-08-06

申请号：US12987847

申请日：2011-01-10

申请人： Markus Zundel ,  Franz Hirler ,  Norbert Krischke

发明人： Markus Zundel ,  Franz Hirler ,  Norbert Krischke

IPC分类号： H01L29/768

CPC分类号： H01L29/7827 ,  H01L21/743 ,  H01L27/0733 ,  H01L28/40 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66734 ,  H01L29/7803 ,  H01L29/7804 ,  H01L29/7809 ,  H01L29/7813 ,  H01L29/7816 ,  H01L29/945

摘要： Disclosed is a semiconductor component arrangement and a method for producing a semiconductor component arrangement. The method comprises producing a trench transistor structure with at least one trench disposed in the semiconductor body and with at least an gate electrode disposed in the at least one trench. An electrode structure is disposed in at least one further trench and comprises at least one electrode. The at least one trench of the transistor structure and the at least one further trench are produced by common process steps. Furthermore, the at least one electrode of the electrode structure and the gate electrode are produced by common process steps.

摘要翻译： 公开了一种用于制造半导体元件布置的半导体元件布置和方法。 该方法包括产生沟槽晶体管结构，其中至少一个沟槽设置在半导体本体中，并且至少一个栅电极设置在至少一个沟槽中。 电极结构设置在至少一个另外的沟槽中并且包括至少一个电极。 晶体管结构的至少一个沟槽和至少一个另外的沟槽通过公共工艺步骤产生。 此外，电极结构的至少一个电极和栅电极通过常规的工艺步骤制造。

公开(公告)号：US08461648B2

公开(公告)日：2013-06-11

申请号：US11996906

申请日：2006-07-27

申请人： Frank Pfirsch ,  Anton Mauder ,  Armin Willmeroth ,  Hans-Joachim Schulze ,  Stefan Sedlmaier ,  Markus Zundel ,  Franz Hirler ,  Arunjai Mittal

发明人： Frank Pfirsch ,  Anton Mauder ,  Armin Willmeroth ,  Hans-Joachim Schulze ,  Stefan Sedlmaier ,  Markus Zundel ,  Franz Hirler ,  Arunjai Mittal

IPC分类号： H01L29/732

CPC分类号： H01L29/7803 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4916 ,  H01L29/66734 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A semiconductor component with a drift region and a drift control region. One embodiment includes a semiconductor body having a drift region of a first conduction type in the semiconductor body. A drift control region composed of a semiconductor material, which is arranged, at least in sections, is adjacent to the drift region in the semiconductor body. An accumulation dielectric is arranged between the drift region and the drift control region.

公开(公告)号：US08084865B2

公开(公告)日：2011-12-27

申请号：US12112588

申请日：2008-04-30

申请人： Franz Hirler ,  Walter Rieger ,  Uwe Schmalzbauer ,  Rudolf Zelsacher ,  Markus Zundel

发明人： Franz Hirler ,  Walter Rieger ,  Uwe Schmalzbauer ,  Rudolf Zelsacher ,  Markus Zundel

IPC分类号： H01L23/528 ,  H01L21/768

CPC分类号： H01L29/7813 ,  H01L21/743 ,  H01L23/535 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/7811 ,  H01L2924/0002 ,  H01L2924/00

摘要： An anchoring structure for a metal structure of a semiconductor device includes an anchoring recess structure having at least one overhanging side wall, the metal structure being at least partly arranged within the anchoring recess structure.

摘要翻译： 用于半导体器件的金属结构的锚定结构包括具有至少一个悬垂侧壁的锚固凹槽结构，金属结构至少部分地布置在锚定凹槽结构内。

公开(公告)号：US20110095336A1

公开(公告)日：2011-04-28

申请号：US12605751

申请日：2009-10-26

申请人： Markus Zundel ,  Franz Hirler ,  Walter Rieger

发明人： Markus Zundel ,  Franz Hirler ,  Walter Rieger

IPC分类号： H01L29/778 ,  H01L29/205

CPC分类号： H01L29/404 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7786

摘要： In one embodiment a lateral HEMT has a first layer, the first layer including a semiconducting material, and a second layer, the second layer including a semiconducting material and being at least partially arranged on the first layer. The lateral HEMT further has a passivation layer and a drift region, the drift region including a lateral width wd. The lateral HEMT further has at least one field plate, the at least one field plate being arranged at least partially on the passivation layer in a region of the drift region and including a lateral width wf, wherein wf

摘要翻译： 在一个实施例中，横向HEMT具有第一层，第一层包括半导体材料和第二层，第二层包括半导体材料并且至少部分地布置在第一层上。 横向HEMT还具有钝化层和漂移区域，漂移区域包括横向宽度wd。 横向HEMT还具有至少一个场板，所述至少一个场板至少部分地布置在所述漂移区域的区域中的钝化层上，并且包括横向宽度wf，其中wf

公开(公告)号：US20100264462A1

公开(公告)日：2010-10-21

申请号：US12764669

申请日：2010-04-21

申请人： Franz Hirler ,  Walter Rieger ,  Markus Zundel

发明人： Franz Hirler ,  Walter Rieger ,  Markus Zundel

IPC分类号： H01L29/778 ,  H01L21/335

CPC分类号： H01L29/778 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0653 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/66462 ,  H01L29/7786

摘要： A semiconductor including a lateral HEMT and to a method for production of a lateral HEMT is disclosed. In one embodiment, the lateral HEMT has a substrate and a first layer, wherein the first layer has a semiconductor material of a first conduction type and is arranged at least partially on the substrate. Furthermore, the lateral HEMT has a second layer, wherein the second layer has a semiconductor material and is arranged at least partially on the first layer. In addition, the lateral HEMT has a third layer, wherein the third layer has a semiconductor material of a second conduction type, which is complementary to the first conduction type, and is arranged at least partially in the first layer.

摘要翻译： 公开了包括横向HEMT的半导体和用于制造横向HEMT的方法。 在一个实施例中，横向HEMT具有衬底和第一层，其中第一层具有第一导电类型的半导体材料并且至少部分地布置在衬底上。 此外，横向HEMT具有第二层，其中第二层具有半导体材料并且至少部分地布置在第一层上。 此外，横向HEMT具有第三层，其中第三层具有与第一导电类型互补的第二导电类型的半导体材料，并且至少部分地布置在第一层中。