公开(公告)号：US6011535A

公开(公告)日：2000-01-04

申请号：US744054

申请日：1996-11-05

申请人： Kenichi Katoh ,  Yasushi Kubota ,  Hidehiko Chimura ,  Jun Koyama

发明人： Kenichi Katoh ,  Yasushi Kubota ,  Hidehiko Chimura ,  Jun Koyama

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2310/0283

摘要： A scanning circuit for a display device having an array of pixels. One embodiment of the scanning circuit includes L scan control signal lines, first logic circuits to operate on signals from M of the L scan control signal lines, flip-flop circuits communicating with the first logic circuits, N timing control signal lines, and second logic circuits coupled to operate on signal from the N timing control signal lines and the flip-flop circuits.

摘要翻译： 一种具有像素阵列的显示装置的扫描电路。 扫描电路的一个实施例包括L扫描控制信号线，对来自L扫描控制信号线的M的信号进行操作的第一逻辑电路，与第一逻辑电路通信的触发电路，N个定时控制信号线和第二逻辑 耦合到来自N个定时控制信号线和触发器电路的信号的电路。

公开(公告)号：US5977941A

公开(公告)日：1999-11-02

申请号：US841811

申请日：1997-05-05

申请人： Ken-ichi Katoh ,  Yasushi Kubota

发明人： Ken-ichi Katoh ,  Yasushi Kubota

IPC分类号： G09G3/20 ,  G09G3/36 ,  H03K3/64 ,  H04N5/66

CPC分类号： G09G3/3674 ,  G09G3/20 ,  G09G2310/0267

摘要： A scanning circuit has L scan control signal lines to which scan control signals differing from each other are supplied, and x pulse generating circuits each of which outputs a pulse signal based on a logical computation on scan control signals supplied from m signal lines, combinations of the m signal lines differing from each other. The scan control signal lines are divided into m groups so that the m groups respectively correspond to m groups of signals supplied to the scan control signal lines. Each of at least m-1 groups among the m groups is composed of three to four scan control signals differing in phases. One scan control signal is selected from each of the m scan control signal line groups so as to constitute each combination of the m scan control signal lines for sending the scan control signals to each pulse generating circuit.

摘要翻译： 扫描电路具有提供彼此不同的扫描控制信号的L个扫描控制信号线，以及x个脉冲发生电路，每个脉冲发生电路基于从m条信号线提供的扫描控制信号的逻辑运算输出脉冲信号， m条信号线彼此不同。 扫描控制信号线被分成m组，使得m组分别对应于提供给扫描控制信号线的m组信号。 m组中的至少m-1组中的每一个由相位不同的三到四个扫描控制信号组成。 从每个m个扫描控制信号线组中选择一个扫描控制信号，以构成用于将扫描控制信号发送到每个脉冲发生电路的m个扫描控制信号线的组合。

公开(公告)号：US5712653A

公开(公告)日：1998-01-27

申请号：US363217

申请日：1994-12-23

申请人： Kenichi Katoh ,  Yasushi Kubota ,  Hiroshi Yoneda ,  Tamotsu Sakai

发明人： Kenichi Katoh ,  Yasushi Kubota ,  Hiroshi Yoneda ,  Tamotsu Sakai

IPC分类号： G09G3/20 ,  G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/3688 ,  G09G2310/0297 ,  G09G2330/08 ,  G09G3/2011

摘要： An active-matrix image display device which includes n shift registers, analog switches for sampling video input signals and a data-signal-line driving circuit to which n series of clock signals and n.times.m series of video input signals are input, and controls the analog switches according to the result of a logic operation of output pulses from successive l stages in the shift registers. A scanning circuit without using shift registers. Here, n is an integer not smaller than one, m and l are integers not smaller than two. With the image display device, sampling of video signals is surely executed without increasing the number of shift registers. It is thus possible to reduce the size and weight of the image display device and to decrease the defect rate thereof. Moreover, the scanning circuit achieves a higher yield compared with a conventional scanning circuit using a shift register.

公开(公告)号：US5592012A

公开(公告)日：1997-01-07

申请号：US558977

申请日：1995-11-13

申请人： Yasushi Kubota

发明人： Yasushi Kubota

IPC分类号： G11C11/56 ,  G11C17/12 ,  H01L27/06 ,  H01L27/112 ,  H01L29/76 ,  H01L29/94

CPC分类号： G11C16/0483 ,  G11C11/56 ,  G11C11/5692 ,  G11C17/123 ,  H01L27/0688 ,  H01L27/112

摘要： In a four-valued read only storage device, each of memory cells arrayed in matrix form at intersections of word lines and bit lines has four metal oxide semiconductor (MOS) transistors. The four MOS transistors have different combinations of two channel impurity profiles and two effective channel lengths in correspondence with storage data. Either data corresponding to the channel impurity profile or data corresponding to the effective channel length is read out from a memory cell by controlling a gate voltage and a drain voltage to be applied to a selected MOS transistor in the memory cell.

摘要翻译： 在四值只读存储装置中，在字线和位线的交叉处以矩阵形式排列的每个存储单元具有四个金属氧化物半导体（MOS）晶体管。 四个MOS晶体管具有与存储数据相对应的两个沟道杂质分布和两个有效沟道长度的不同组合。 通过控制要施加到存储单元中的选定MOS晶体管的栅极电压和漏极电压，从存储单元读出对应于沟道杂质分布的数据或对应于有效沟道长度的数据。

公开(公告)号：US5414654A

公开(公告)日：1995-05-09

申请号：US133253

申请日：1993-10-08

申请人： Yasushi Kubota ,  Shigeo Onishi

发明人： Yasushi Kubota ,  Shigeo Onishi

IPC分类号： G11C11/22 ,  G11C14/00 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/04 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108

CPC分类号： G11C11/22

摘要： A ferroelectric memory device according to the present invention comprises a plurality of bit lines carrying data signals and voltage signals, every adjacent two of the bit lines being paired to form a plurality of bit line pairs; sense amplifiers connected to each of the bit line pairs; a plurality of memory cells for storing data, each memory cell having a first capacitor and a first switching element, the first capacitor being connected to one of the bit lines via the first switching element, wherein the first capacitor includes a capacitor insulating film, at least one portion of the capacitor insulating film being formed of a ferroelectric material; a plurality of dummy cells for storing a reference voltage, each dummy cell having a second capacitor and a second switching element, the second capacitor being connected to one of the bit lines via the second switching element, wherein the second capacitor includes the capacitor insulating film at least one portion of the capacitor insulating film being formed of a ferroelectric material; a first common electrode line for controlling a voltage to be applied to the first capacitor; a second common electrode line for controlling a voltage to be applied to the second capacitor; a first word line for controlling the first switching element; and a second word line for controlling the second switching element, wherein a plurality of the memory cells and at least one of the dummy cells are connected to each bit line.

摘要翻译： 根据本发明的铁电存储器件包括承载数据信号和电压信号的多个位线，每个相邻的两个位线被配对以形成多个位线对; 连接到每个位线对的读出放大器; 用于存储数据的多个存储单元，每个存储单元具有第一电容器和第一开关元件，所述第一电容器经由所述第一开关元件连接到所述位线之一，其中所述第一电容器包括电容器绝缘膜， 所述电容绝缘膜的至少一部分由铁电体形成; 用于存储参考电压的多个虚拟单元，每个虚设单元具有第二电容器和第二开关元件，所述第二电容器经由所述第二开关元件连接到所述位线之一，其中所述第二电容器包括所述电容器绝缘膜 电容器绝缘膜的至少一部分由铁电材料形成; 用于控制施加到第一电容器的电压的第一公共电极线; 用于控制施加到第二电容器的电压的第二公共电极线; 用于控制第一开关元件的第一字线; 以及用于控制第二开关元件的第二字线，其中多个存储单元和至少一个虚设单元连接到每个位线。

公开(公告)号：US5383159A

公开(公告)日：1995-01-17

申请号：US120823

申请日：1993-09-15

申请人： Yasushi Kubota

发明人： Yasushi Kubota

IPC分类号： G11C11/401 ,  G11C7/18 ,  G11C11/4097 ,  H01L21/8242 ,  H01L27/108 ,  G11C7/00

CPC分类号： G11C11/4097 ,  G11C7/18

摘要： A semiconductor memory device of alternately-activated open bit-line architecture is provided wherein paired bit lines extend from opposite sides of sense amplifiers that are arranged in one direction and every other bit line is activated through activation of a word line intersecting the bit lines. The sense amplifiers in the neighboring first and second rows alternate with each other in a staggering manner. The bit lines extending from the sense amplifiers of the first row in a first direction and the bit lines extending from the sense amplifiers in the opposite, second direction constitute a bit line group between the first and second rows. Word lines and dummy word lines intersect the bit line group. In operation, signals opposite in phase to each other are applied to a selected word line and a corresponding dummy word line from a control section so that memory cells connected to the selected word line are electrically connected with the bit lines while the dummy cells connected with the same bit lines are electrically disconnected from these bit lines.

摘要翻译： 提供交替激活的开放位线架构的半导体存储器件，其中成对的位线从沿一个方向布置的读出放大器的相对侧延伸，并且通过激活与位线相交的字线来激活每隔一个位线。 相邻的第一和第二行中的读出放大器以交错的方式彼此交替。 从第一行的读出放大器沿第一方向延伸的位线和从相反的第二方向的读出放大器延伸的位线构成第一和第二行之间的位线组。 字线和虚拟字线与位线组相交。 在操作中，相互相反的信号被施加到来自控制部分的选定字线和对应的虚拟字线，使得连接到所选字线的存储器单元与位线电连接，而虚拟单元与 相同的位线与这些位线电断开。

公开(公告)号：US5245581A

公开(公告)日：1993-09-14

申请号：US668307

申请日：1991-03-13

申请人： Yasushi Kubota

发明人： Yasushi Kubota

IPC分类号： G11C11/409 ,  G11C11/401 ,  G11C11/4091 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

CPC分类号： G11C11/4091

摘要： In each of the sense amplifiers of a DRAM, the common source terminal of pull-down transistors which are connected to a bit line pair is connected to a discharge line through first and second current paths. One end of the discharge line is grounded. The first and second current paths are provided with first and second switches, respectively. The first and second switches are independently controlled by a different signal. The first current path is further provided with a third switch. The third switch is turned on when the potentials of both of the bit lines are greater than a threshold, and turned off when one of the potentials is not greater than the threshold.

公开(公告)号：US08283501B2

公开(公告)日：2012-10-09

申请号：US12811805

申请日：2009-01-06

申请人： Yoshikazu Ito ,  Yasushi Kubota ,  Tsutomu Inoue

发明人： Yoshikazu Ito ,  Yasushi Kubota ,  Tsutomu Inoue

IPC分类号： C07C39/15 ,  C07C37/68 ,  C07C37/86

CPC分类号： C07B57/00 ,  C07B2200/07 ,  C07C37/00 ,  C07C37/11 ,  C07C37/50 ,  C07C39/367 ,  C07C39/15

摘要： Disclosed herein are optically active biphenol derivatives represented by the following formulas (1) and (2), a method for optically resolving a biphenol derivative represented by formula (2′), a production method of an optically active biphenol derivative (1) comprising a step for reacting a Brønsted acid with a biphenol derivative (2), and a production method of an optically active biphenol derivative (3) comprising a step for reacting a Lewis acid with an optically active biphenol derivative (1) or an optically active biphenol derivative (2).

摘要翻译： 本文公开了由下式（1）和（2）表示的光学活性联苯酚衍生物，用于光学拆分由式（2'）表示的联苯酚衍生物的方法，光学活性联苯酚衍生物（1）的制备方法，其包含 使布朗斯台德酸与联苯酚衍生物（2）反应的步骤和光学活性联苯酚衍生物（3）的制备方法包括使路易斯酸与光学活性联苯酚衍生物（1）或光学活性联苯酚衍生物 （2）。

公开(公告)号：US08130216B2

公开(公告)日：2012-03-06

申请号：US11882533

申请日：2007-08-02

申请人： Hajime Washio ,  Yasuyoshi Kaise ,  Sachio Tsujino ,  Kazuhiro Maeda ,  Keiji Takahashi ,  Yasushi Kubota ,  Toshiya Aoki

发明人： Hajime Washio ,  Yasuyoshi Kaise ,  Sachio Tsujino ,  Kazuhiro Maeda ,  Keiji Takahashi ,  Yasushi Kubota ,  Toshiya Aoki

IPC分类号： G09G5/00

CPC分类号： G09G3/3688 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3666 ,  G09G3/3677 ,  G09G2310/0213 ,  G09G2310/0232 ,  G09G2310/027 ,  G09G2310/0283 ,  G09G2310/0297 ,  G09G2310/04 ,  G09G2320/0214 ,  G09G2320/10 ,  G09G2330/021

摘要： An example control signal generating circuit CTL for controlling the writing into pixels PIX instructs a data signal line drive circuit SD2, which is for driving pixels in a non-display area, to write a voltage VB or a voltage VW which are for non-displaying, not only in the first frame but also once in a predetermined number of frames. In other words, the pixels in the display area are refreshed at intervals longer than those in the case of refreshing the pixels in each frame. Thus, even if the mobility of an active element is high and the leak current on the occasion of OFF-state is large, or even if a large amount of electric charge is accumulated because of the photoelectric effect due to the use of a backlight, it is possible to prevent unnecessary displaying on the display area, which is caused because the writing into the pixels in the display area influences on the pixels in the non-display area, and hence it is possible to improve the quality of partial displaying, while restraining the power consumption.

摘要翻译： 用于控制写入像素PIX的示例性控制信号发生电路CTL指示用于驱动非显示区域中的像素的数据信号线驱动电路SD2写入用于不显示的电压VB或电压VW ，不仅在第一帧中，而且在预定数量的帧中也是一次。 换句话说，显示区域中的像素以比刷新每帧中的像素的情况更长的间隔更新。 因此，即使有源元件的迁移率高，关断状态下的漏电流大，或者即使由于使用背光导致的光电效应而累积大量的电荷， 可以防止由于对显示区域中的像素的写入而影响非显示区域中的像素而导致的显示区域的不必要的显示，因此可以提高部分显示的质量，同时 限制功耗。

公开(公告)号：US20110034688A1

公开(公告)日：2011-02-10

申请号：US12936415

申请日：2009-04-08

申请人： Yasushi Kubota ,  Tsutomu Inoue

发明人： Yasushi Kubota ,  Tsutomu Inoue

IPC分类号： C07D493/04

CPC分类号： C07D317/60 ,  C07D491/06 ,  C07D491/16 ,  C07D491/20

摘要： It is to provide a novel optically active dibenzazepine derivative having a high utility value as an asymmetric phase-transfer catalyst. It is an optically active 6,7-dihydro-5H-dibenzo[c,e]azepine derivative represented by the following formula (1′), (wherein R represents a divalent organic group for cross-linking the 1st position and the 11th position; R1 and R2 are the same or different, and represent a hydrogen atom, halogen atom, or organic group, or R1 and R2 together represent a divalent organic group; R3′and R4′ are the same or different and represent a monovalent organic group, or R3′ and R4′ together form an organic group that forms a cyclic structure comprising an onium nitrogen atom; Ar represents a monovalent organic group; * represents optical activity, i.e., that one axially asymmetric isomer is present in excess of the other axially asymmetric isomer with respect to a bond axis that constitutes the biphenyl structure of the compound; and X− represents a counter anion).

摘要翻译： 提供作为不对称相转移催化剂的具有高效用价值的新颖的光学活性二苯并氮杂衍生物。 它是由下式（1'）表示的光学活性的6,7-二氢-5H-二苯并[c，e]吖庚因衍生物，其中R表示用于交联第1位和第11位的二价有机基 R 1和R 2相同或不同，表示氢原子，卤素原子或有机基团，或者R 1和R 2一起表示二价有机基团; R 3'和R 4'相同或不同，表示一价有机基团 或R3'和R4'一起形成形成包含鎓氮原子的环状结构的有机基团; Ar表示一价有机基团; *表示光学活性，即一种轴向不对称异构体存在于另一种轴向 相对于构成化合物的联苯结构的键轴的不对称异构体; X-表示抗衡阴离子）。