Data Storage Method and Phase Change Memory

    公开(公告)号:US20170133089A1

    公开(公告)日:2017-05-11

    申请号:US15412509

    申请日:2017-01-23

    Abstract: A data storage method applying to the phase change memory and a phase change memory are provided. After obtaining to-be-stored data, the phase change memory generates an erase pulse signal and a write pulse signal according to the to-be-stored data. The to-be-stored data is multi-bit data. The write pulse signal is a signal including at least two consecutive pulses with a same amplitude. The amplitude of the at least two consecutive pulses is a value determined according to the to-be-stored data. Then, the phase change memory applies the erase pulse signal to a storage unit of the phase change memory to allow the storage unit to switch to a crystalline state. Further, the write pulse signal is applied to the storage unit to allow the storage unit to switch to an amorphous state corresponding to a first resistance value, where the amorphous state represents the to-be-stored data.

    Latch and D Flip-Flop
    42.
    发明申请
    Latch and D Flip-Flop 审中-公开
    锁扣和D触发器

    公开(公告)号:US20170040982A1

    公开(公告)日:2017-02-09

    申请号:US15331209

    申请日:2016-10-21

    CPC classification number: H03K3/35625 G11C13/0002 H03K3/0372

    Abstract: A latch and a D flip-flop, where the latch includes a switch, a resistive random-access memory, a bleeder circuit, and a voltage converter. The voltage converter is configured to output an output signal of the latch according to an input signal of the latch when the switch is in an on state, where the output signal remains consistent with the input signal. When the switch changes from the on state to an off state, the resistive random-access memory is configured to work together with the bleeder circuit to enable an output signal of the latch when the switch is in the off state to remain consistent with an output signal of the latch when the switch is in the on state, thereby implementing a nonvolatile latching function. A circuit structure of the latch is simple and integrity of an existing logic circuit can be improved.

    Abstract translation: 锁存器和D触发器,其中锁存器包括开关,电阻随机存取存储器,泄放电路和电压转换器。 电压转换器被配置为当开关处于导通状态时根据锁存器的输入信号输出锁存器的输出信号,其中输出信号与输入信号保持一致。 当开关从导通状态变为断开状态时,电阻随机存取存储器被配置为与泄放电路一起工作,以便当开关处于断开状态时使锁存器的输出信号保持与输出一致 当开关处于导通状态时锁存器的信号,从而实现非易失性锁存功能。 锁存器的电路结构简单,可以提高现有逻辑电路的完整性。

    Storage Unit, Memory, and Method for Controlling Storage Unit
    43.
    发明申请
    Storage Unit, Memory, and Method for Controlling Storage Unit 有权
    存储单元,存储器和存储单元控制方法

    公开(公告)号:US20160232984A1

    公开(公告)日:2016-08-11

    申请号:US15133452

    申请日:2016-04-20

    Abstract: A storage device, a memory, and a method for controlling a storage device, where the storage device includes a comb-shaped magnetic track, a first drive circuit, a second drive circuit, a first drive port, and a second drive port, where the comb-shaped magnetic track includes a first storage area, a second storage area, and a comb handle, and the first storage area and the second storage area include more than two memory bars.

    Abstract translation: 一种用于控制存储装置的存储装置,存储器和方法,其中存储装置包括梳状磁迹,第一驱动电路,第二驱动电路,第一驱动端口和第二驱动端口,其中 梳状磁道包括第一存储区域,第二存储区域和梳子手柄,并且第一存储区域和第二存储区域包括两个以上的存储器条。

    Positioning Method Based on Visible Light Source, Mobile Terminal, and Controller
    44.
    发明申请
    Positioning Method Based on Visible Light Source, Mobile Terminal, and Controller 有权
    基于可见光源,移动终端和控制器的定位方法

    公开(公告)号:US20160197676A1

    公开(公告)日:2016-07-07

    申请号:US15070212

    申请日:2016-03-15

    CPC classification number: H04B10/116 G01S11/12

    Abstract: A positioning method based on a visible light source, a mobile terminal, and a controller. The method includes acquiring, by a visible light source controller, geographical position attribute information of a position at which a visible light source array is located, determining, by the visible light source controller according to a preset correspondence between geographical position attribute information of a position at which a visible light source array is located and a visible light source array pattern, a visible light source array pattern corresponding to the acquired geographical position attribute information, and controlling, by the visible light source controller according to the determined visible light source array pattern, the luminance state of each visible light source included in the visible light source array. Hence the method reduces the complexity of a positioning process.

    Abstract translation: 基于可见光源,移动终端和控制器的定位方法。 该方法包括通过可见光源控制器获取可见光源阵列所在的位置的地理位置属性信息,由可见光源控制器根据位置的地理位置属性信息之间的预设对应关系确定 可见光源阵列和可见光源阵列图案,对应于获取的地理位置属性信息的可见光源阵列图案,并且通过可见光源控制器根据确定的可见光源阵列图案 ,包括在可见光源阵列中的每个可见光源的亮度状态。 因此,该方法降低了定位过程的复杂性。

    Method for switching a node controller link, processor system, and node
    45.
    发明授权
    Method for switching a node controller link, processor system, and node 有权
    用于切换节点控制器链路,处理器系统和节点的方法

    公开(公告)号:US09015521B2

    公开(公告)日:2015-04-21

    申请号:US13712588

    申请日:2012-12-12

    CPC classification number: G06F11/202 G06F11/2002 G06F11/2017 H04L43/0882

    Abstract: Embodiments of the present invention disclose a method for switching an NC link, a processor system, and a node, where the processor system includes more than two nodes capable of communicating with each other, each node includes a node controller NC chip, a host bus adapter HBA apparatus, and at least one CPU, the NC chip is connected to each CPU in a node where the NC chip is located, and the HBA apparatus is connected to each CPU in a node where the HBA apparatus is located; an NC link borne by the NC chip is corresponding to an HBA link borne by the HBA apparatus. By using an HBA apparatus to deploy a redundant link, the cost of deploying the redundant link is reduced effectively under a premise of ensuring the reliability of the processor system.

    Abstract translation: 本发明的实施例公开了一种用于切换NC链路,处理器系统和节点的方法,其中处理器系统包括能够彼此通信的多于两个的节点,每个节点包括节点控制器NC芯片,主机总线 适配器HBA装置和至少一个CPU,NC芯片连接到NC芯片所在的节点中的每个CPU,并且HBA装置连接到HBA装置所在的节点中的每个CPU; 由NC芯片承载的NC连接对应于由HBA设备承载的HBA链路。 通过使用HBA设备来部署冗余链路,在确保处理器系统的可靠性的前提下,有效地降低部署冗余链路的成本。

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