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Patent Agency Ranking
公开(公告)号：US09899084B2
公开(公告)日：2018-02-20
申请号：US15412509
申请日：2017-01-23
Applicant: Huawei Technologies Co., Ltd.
Inventor： Zhen Li , Qiang He , Xiangshui Miao , Ronggang Xu , Junfeng Zhao , Shujie Zhang
CPC classification number: G11C13/0069 , G11C11/5678 , G11C13/0004 , G11C13/0097 , G11C2013/0092 , G11C2213/79
Abstract: A data storage method applying to the phase change memory and a phase change memory are provided. After obtaining to-be-stored data, the phase change memory generates an erase pulse signal and a write pulse signal according to the to-be-stored data. The to-be-stored data is multi-bit data. The write pulse signal is a signal including at least two consecutive pulses with a same amplitude. The amplitude of the at least two consecutive pulses is a value determined according to the to-be-stored data. Then, the phase change memory applies the erase pulse signal to a storage unit of the phase change memory to allow the storage unit to switch to a crystalline state. Further, the write pulse signal is applied to the storage unit to allow the storage unit to switch to an amorphous state corresponding to a first resistance value, where the amorphous state represents the to-be-stored data.
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公开(公告)号：US20250021531A1
公开(公告)日：2025-01-16
申请号：US18900853
申请日：2024-09-29
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Ji Sun , Shifu Li , Shujie Zhang , Guoliang Li
Abstract: A cardinality estimation method and an apparatus are provided. The method includes: selecting a target model type from a plurality of model types based on a target distribution feature and mapping relationship information, where the mapping relationship information includes a mapping relationship between the plurality of model types and a predicted distribution feature, and the target distribution feature is extracted from sample data collected based on an analysis instruction; and obtaining, based on the target model type, a target model corresponding to the target model type, where the target model is used to perform cardinality estimation on a query instruction of a database.
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公开(公告)号：US20170133072A1
公开(公告)日：2017-05-11
申请号：US15402354
申请日：2017-01-10
Applicant: Huawei Technologies Co., Ltd.
Inventor： Yinyin Lin , Kai Yang , Shujie Zhang , Junfeng Zhao , Wei Yang , Yarong Fu
CPC classification number: G11C11/161 , G11C11/15 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1697 , H01L27/228 , H01L43/02
Abstract: A magnetic storage track and a magnetic memory are provided. The magnetic storage track includes multiple stacked storage track units. A transition layer is disposed between two neighboring storage track units. The transition layer is constituted by a semiconductor material deposited on an insulating material, and includes a gating circuit and a read/write apparatus. Because the magnetic storage track includes multiple stacked storage track units, a track length of the magnetic storage track is constituted by track lengths of the multiple storage track units. Therefore, when a storage capability of the magnetic storage track needs to be improved, the track length of the magnetic storage track may be increased by adding the storage track unit.
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公开(公告)号：US20170133089A1
公开(公告)日：2017-05-11
申请号：US15412509
申请日：2017-01-23
Applicant: Huawei Technologies Co., Ltd.
Inventor： Zhen Li , Qiang He , Xiangshui Miao , Ronggang Xu , Junfeng Zhao , Shujie Zhang
CPC classification number: G11C13/0069 , G11C11/5678 , G11C13/0004 , G11C13/0097 , G11C2013/0092 , G11C2213/79
Abstract: A data storage method applying to the phase change memory and a phase change memory are provided. After obtaining to-be-stored data, the phase change memory generates an erase pulse signal and a write pulse signal according to the to-be-stored data. The to-be-stored data is multi-bit data. The write pulse signal is a signal including at least two consecutive pulses with a same amplitude. The amplitude of the at least two consecutive pulses is a value determined according to the to-be-stored data. Then, the phase change memory applies the erase pulse signal to a storage unit of the phase change memory to allow the storage unit to switch to a crystalline state. Further, the write pulse signal is applied to the storage unit to allow the storage unit to switch to an amorphous state corresponding to a first resistance value, where the amorphous state represents the to-be-stored data.
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公开(公告)号：US20170040982A1
公开(公告)日：2017-02-09
申请号：US15331209
申请日：2016-10-21
Applicant: Huawei Technologies Co., Ltd.
Inventor： Xiangshui Miao , Yi Li , Yaxiong Zhou , Ronggang Xu , Junfeng Zhao , Shujie Zhang
IPC: H03K3/3562 , G11C13/00
CPC classification number: H03K3/35625 , G11C13/0002 , H03K3/0372
Abstract: A latch and a D flip-flop, where the latch includes a switch, a resistive random-access memory, a bleeder circuit, and a voltage converter. The voltage converter is configured to output an output signal of the latch according to an input signal of the latch when the switch is in an on state, where the output signal remains consistent with the input signal. When the switch changes from the on state to an off state, the resistive random-access memory is configured to work together with the bleeder circuit to enable an output signal of the latch when the switch is in the off state to remain consistent with an output signal of the latch when the switch is in the on state, thereby implementing a nonvolatile latching function. A circuit structure of the latch is simple and integrity of an existing logic circuit can be improved.
Abstract translation: 锁存器和D触发器，其中锁存器包括开关，电阻随机存取存储器，泄放电路和电压转换器。 电压转换器被配置为当开关处于导通状态时根据锁存器的输入信号输出锁存器的输出信号，其中输出信号与输入信号保持一致。 当开关从导通状态变为断开状态时，电阻随机存取存储器被配置为与泄放电路一起工作，以便当开关处于断开状态时使锁存器的输出信号保持与输出一致 当开关处于导通状态时锁存器的信号，从而实现非易失性锁存功能。 锁存器的电路结构简单，可以提高现有逻辑电路的完整性。
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