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    Multilevel cache hierarchy for finding a cache line on a remote node
    41.
    发明授权
    Multilevel cache hierarchy for finding a cache line on a remote node 有权
    用于在远程节点上查找缓存行的多级缓存层次结构

    公开(公告)号：US08972664B2

    公开(公告)日：2015-03-03

    申请号：US13793708

    申请日：2013-03-11

    申请人： International Business Machines Corporation

    发明人： Timothy C. Bronson ,  Garrett M. Drapala ,  Michael A. Blake ,  Craig R. Walters ,  Pak-Kin Mak

    IPC分类号： G06F12/06 ,  G06F12/08 ,  G06F12/12

    CPC分类号： G06F12/0811 ,  G06F12/0817 ,  G06F12/0884 ,  G06F12/123

    摘要： Embodiments relate to accessing a cache line on a multi-level cache system having a system memory. Based on a request for exclusive ownership of a specific cache line at the local node, requests are concurrently sent to the system memory and remote nodes of the plurality of nodes for the specific cache line by the local node. The specific cache line is found in a specific remote node. The specific remote node is one of the remote nodes. The specific cache line is removed from the specific remote node for exclusive ownership by another node. Based on the specified node having the specified cache line in ghost state, any subsequent fetch request is initiated for the specific cache line from the specific node encounters the ghost state. When the ghost state is encountered, the subsequent fetch request is directed only to nodes of the plurality of nodes.

    摘要翻译： 实施例涉及在具有系统存储器的多级缓存系统上访问高速缓存行。 基于本地节点对特定高速缓存线的独占所有权的请求，请求被本地节点同时发送到用于特定高速缓存行的多个节点的系统内存和远程节点。 在特定的远程节点中找到特定的高速缓存行。 特定的远程节点是远程节点之一。 从特定的远程节点中删除特定的高速缓存行以供另一个节点独占所有。 基于具有指定缓存行在幽灵状态的指定节点，任何后续的提取请求将针对具体的缓存行启动，特定的缓存行遇到幽灵状态。 当遇到鬼状态时，后续的提取请求仅被引导到多个节点的节点。

    MULTILEVEL CACHE HIERARCHY FOR FINDING A CACHE LINE ON A REMOTE NODE
    42.
    发明申请
    MULTILEVEL CACHE HIERARCHY FOR FINDING A CACHE LINE ON A REMOTE NODE 有权
    用于在远程节点上查找缓存行的多个缓存高速缓存

    公开(公告)号：US20130339609A1

    公开(公告)日：2013-12-19

    申请号：US13793708

    申请日：2013-03-11

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Timothy C. Bronson ,  Garrett M. Drapala ,  Michael A. Blake ,  Craig R. Walters ,  Pak-Kin Mak

    IPC分类号： G06F12/08

    CPC分类号： G06F12/0811 ,  G06F12/0817 ,  G06F12/0884 ,  G06F12/123

    摘要： Embodiments relate to accessing a cache line on a multi-level cache system having a system memory. Based on a request for exclusive ownership of a specific cache line at the local node, requests are concurrently sent to the system memory and remote nodes of the plurality of nodes for the specific cache line by the local node. The specific cache line is found in a specific remote node. The specific remote node is one of the remote nodes. The specific cache line is removed from the specific remote node for exclusive ownership by another node. Based on the specified node having the specified cache line in ghost state, any subsequent fetch request is initiated for the specific cache line from the specific node encounters the ghost state. When the ghost state is encountered, the subsequent fetch request is directed only to nodes of the plurality of nodes.

    摘要翻译： 实施例涉及在具有系统存储器的多级缓存系统上访问高速缓存行。 基于本地节点对特定高速缓存线的独占所有权的请求，请求被本地节点同时发送到用于特定高速缓存行的多个节点的系统内存和远程节点。 在特定的远程节点中找到特定的高速缓存行。 特定的远程节点是远程节点之一。 从特定的远程节点中删除特定的高速缓存行以供另一个节点独占所有。 基于具有指定缓存行在幽灵状态的指定节点，任何后续的提取请求将针对具体的缓存行启动，特定的缓存行遇到幽灵状态。 当遇到鬼状态时，后续的提取请求仅被引导到多个节点的节点。

    Multiple copy scoping bits for cache memory
    43.
    发明授权
    Multiple copy scoping bits for cache memory 有权

    公开(公告)号：US11487672B1

    公开(公告)日：2022-11-01

    申请号：US17407228

    申请日：2021-08-20

    申请人： International Business Machines Corporation

    发明人： Chunggeon Rhee ,  Craig R. Walters ,  Ram Sai Manoj Bamdhamravuri ,  Timothy Bronson ,  Gregory William Alexander

    IPC分类号： G06F12/0895 ,  G06F12/084 ,  G06F12/0891 ,  G06F12/0817

    摘要： Aspects of the invention include computer-implemented methods, systems, and computer program products that access a multi-copy scope directory state of a cache memory that indicates a scope of sharing of a cache line in a cache memory system and determine a scope of sharing of the cache line in the cache memory system based on the multi-copy scope directory state, where the multi-copy scope directory state enumerates a plurality of scopes within the cache memory system. The scope of sharing is used to reduce a number of queries to one or more cache memories having a larger scope than a shared scope identified in the scope of sharing. The multi-copy scope directory state of the cache memory is updated based on detecting a change in shared scope of the cache line within the cache memory system.

    Accuracy sensitive performance counters
    46.
    发明授权
    Accuracy sensitive performance counters 有权

    公开(公告)号：US10540251B2

    公开(公告)日：2020-01-21

    申请号：US15601272

    申请日：2017-05-22

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Ram Sai Manoj Bamdhamravuri ,  Deanna Postles Dunn Berger ,  Mark R. Hodges ,  Kenneth D. Klapproth ,  Guy G. Tracy ,  Craig R. Walters

    IPC分类号： G06F11/34 ,  G06F13/16 ,  G06F11/30 ,  G06F9/30

    摘要： Methods, systems and computer program products for measuring hardware performance are provided. Aspects include receiving an indication of a start to a hardware operation. A number of clock cycles are counted from the start of a hardware operation to the completion of the hardware operation. A first region comprising a first set of bit location is defined. A second and third region is defined each including a set of bit locations. Based on the first set of bit locations being equal to zero, a granularity flag is set to zero in the sample buffer and the second and third set of bit locations are written to the sample buffer. And based on the first set of bit locations being greater than zero, the granularity flag in the sample buffer is set to one and the first and second set of bit locations are written to the sample buffer.

    Dual/multi-mode processor pipeline sampling
    48.
    发明授权
    Dual/multi-mode processor pipeline sampling 有权

    公开(公告)号：US10176013B2

    公开(公告)日：2019-01-08

    申请号：US14208257

    申请日：2014-03-13

    申请人： International Business Machines Corporation

    发明人： Deanna Postles Dunn Berger ,  Kathryn M. Jackson ,  Joshua D. Massover ,  Gary E. Strait ,  Hanno Ulrich ,  Craig R. Walters

    IPC分类号： G06F11/30 ,  G06F9/48 ,  G06F11/34

    摘要： Embodiments are directed to systems and methodologies for efficiently sampling data for analysis by a pipeline analysis algorithm. The amount of sampled data is maximized without increasing sampling overhead by sampling “non-pipeline activity” data if the subject pipeline is inactive during the sampling time. The non-pipeline activity data is selected to include overall system information that is relevant to the subject pipeline's performance but is not necessarily dependent on whether the subject pipeline is active. In some embodiments, the non-pipeline activity data allows for confirmation of a pipeline performance characteristic that must otherwise be inferred by the subsequent pipeline analysis algorithm from data sampled while the pipeline was active. In some embodiments, the non-pipeline activity data allows the pipeline analysis algorithm to analyze additional performance characteristics that cannot otherwise be inferred from the data sampled while the pipeline was active.