公开(公告)号：US06706629B1

公开(公告)日：2004-03-16

申请号：US10338120

申请日：2003-01-07

Applicant: Jing-Cheng Lin ,  Cheng-Lin Huang ,  Winston Shue ,  Mong-Song Liang

Inventor： Jing-Cheng Lin ,  Cheng-Lin Huang ,  Winston Shue ,  Mong-Song Liang

IPC: H01L2144

CPC classification number: H01L21/76834 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76888 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A new method is provided is creating metal interconnect comprising copper. A first embodiment of the invention provides for the application of a doped layer of copper. A second embodiment of the invention provides for the deposition of a silicon nitride layer as an inter-barrier film over surfaces of an opening created in a layer of dielectric followed by removing the layer of silicon nitride from the bottom of the opening followed by depositing a doped copper-alloy seed layer over surfaces of the opening followed by plating a layer of copper over the copper-alloy seed layer.

Abstract translation: 提供了一种新的方法来产生包括铜的金属互连。 本发明的第一实施例提供了铜掺杂层的应用。 本发明的第二个实施例提供了在介质层中形成的开口的表面上沉积作为隔离膜的氮化硅层，然后从开口的底部去除氮化硅层，随后沉积 在该开口的表面上的铜掺杂合金种子层，然后在铜合金种子层上镀一层铜。

公开(公告)号：US20100171220A1

公开(公告)日：2010-07-08

申请号：US12690796

申请日：2010-01-20

Applicant: Cheng-Lin Huang

Inventor： Cheng-Lin Huang

IPC: H01L23/532

CPC classification number: H01L21/76834 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76856

Abstract: An integrated circuit structure having improved resistivity and a method for forming the same are provided. The integrated circuit structure includes a dielectric layer, an opening in the dielectric layer, an oxide-based barrier layer directly on sidewalls of the opening, and conductive materials filling the remaining portion of the opening.

Abstract translation: 提供了具有改进的电阻率的集成电路结构及其形成方法。 集成电路结构包括电介质层，电介质层中的开口，直接位于开口侧壁上的基于氧化物的阻挡层，以及填充开口的剩余部分的导电材料。

公开(公告)号：US20090258487A1

公开(公告)日：2009-10-15

申请号：US12102695

申请日：2008-04-14

Applicant: Keng-Chu Lin ,  Chia-Cheng Chou ,  Chung-Chi Ko ,  Ching-Hua Hsieh ,  Cheng-Lin Huang ,  Shwang-Ming Jeng

Inventor： Keng-Chu Lin ,  Chia-Cheng Chou ,  Chung-Chi Ko ,  Ching-Hua Hsieh ,  Cheng-Lin Huang ,  Shwang-Ming Jeng

IPC: H01L21/4763

CPC classification number: H01L21/76825 ,  H01L21/3105

Abstract: A method for forming an integrated circuit structure includes providing a semiconductor substrate; forming a low-k dielectric layer over the semiconductor substrate; generating hydrogen radicals using a remote plasma method; performing a first hydrogen radical treatment to the low-k dielectric layer using the hydrogen radicals; forming an opening in the low-k dielectric layer; filling the opening with a conductive material; and performing a planarization to remove excess conductive material on the low-k dielectric layer.

Abstract translation: 一种用于形成集成电路结构的方法包括提供半导体衬底; 在半导体衬底上形成低k电介质层; 使用远程等离子体法产生氢自由基; 使用氢自由基对低k电介质层进行第一次氢自由基处理; 在低k电介质层中形成开口; 用导电材料填充开口; 并执行平面化以去除低k电介质层上的过量导电材料。

公开(公告)号：US20090209098A1

公开(公告)日：2009-08-20

申请号：US12031280

申请日：2008-02-14

Applicant: Li-Lin Su ,  Shing-Chyang Pan ,  Cheng-Lin Huang ,  Ching-Hua Hsieh

Inventor： Li-Lin Su ,  Shing-Chyang Pan ,  Cheng-Lin Huang ,  Ching-Hua Hsieh

IPC: H01L21/44

CPC classification number: H01L21/76843 ,  H01L21/2855 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76865 ,  H01L21/76868 ,  H01L21/76873

Abstract: A method of forming an integrated circuit structure includes forming a dielectric layer; forming an opening in the dielectric layer; performing a first deposition step to form a seed layer in a first chamber; and performing a first etch step to remove a portion of the seed layer. The method may further include performing a second deposition step to increase the thickness of the seed layer. At least one of the first etch step and the second deposition step is performed in a second chamber different from the first chamber.

Abstract translation: 形成集成电路结构的方法包括形成电介质层; 在介电层中形成开口; 执行第一沉积步骤以在第一室中形成种子层; 以及执行第一蚀刻步骤以去除种子层的一部分。 该方法还可以包括执行第二沉积步骤以增加种子层的厚度。 在与第一室不同的第二室中执行第一蚀刻步骤和第二沉积步骤中的至少一个。

公开(公告)号：US07071095B2

公开(公告)日：2006-07-04

申请号：US10850763

申请日：2004-05-20

Applicant: Cheng-Lin Huang ,  Ching-Hua Hsieh ,  Shau-Lin Shue

Inventor： Cheng-Lin Huang ,  Ching-Hua Hsieh ,  Shau-Lin Shue

IPC: H01L21/4763

CPC classification number: H01L21/76865 ,  H01L21/02046 ,  H01L21/2855 ,  H01L21/32131 ,  H01L21/76843 ,  H01L21/76862

Abstract: A novel process for re-distributing a barrier layer deposited on a single damascene, dual damascene or other contact opening structure. The process includes providing a substrate having a contact opening structure and a metal barrier layer deposited in the contact opening structure, re-sputtering the barrier layer by bombarding the barrier layer with argon ions and metal ions, and re-sputtering the barrier layer by bombarding the barrier layer with argon ions.

Abstract translation: 一种用于重新分布沉积在单个镶嵌，双镶嵌或其他接触开口结构上的阻挡层的新方法。 该方法包括提供具有接触开口结构的衬底和沉积在接触开口结构中的金属阻挡层，通过用氩离子和金属离子轰击阻挡层来重新溅射阻挡层，并通过轰击来重新溅射阻挡层 阻挡层具有氩离子。

公开(公告)号：US06949472B1

公开(公告)日：2005-09-27

申请号：US10838720

申请日：2004-05-03

Applicant: Cheng-Lin Huang ,  Ching-Hua Hsieh ,  Shau-Lin Shue

Inventor： Cheng-Lin Huang ,  Ching-Hua Hsieh ,  Shau-Lin Shue

IPC: H01L21/306 ,  H01L21/31 ,  H01L21/768

CPC classification number: H01L21/76843 ,  H01L21/02046 ,  H01L21/76862 ,  H01L21/76865

Abstract: A novel method for depositing a barrier layer on a single damascene, dual damascene or other contact opening structure. The method eliminates the need for pre-cleaning argon ion bombardment of the structure, thereby reducing or eliminating damage to the surface of the underlying conductive layer and sputtering of copper particles to the via or other contact opening sidewall. The process includes fabrication of a single damascene, dual damascene or other contact opening structure on a substrate; optionally pre-cleaning the structure typically using nitrogen or hydrogen plasma; depositing a thin metal barrier layer on the sidewalls and bottom of the structure; and redistributing or re-sputtering the barrier layer on the bottom and sidewalls of the structure.

Abstract translation: 一种用于在单个镶嵌，双镶嵌或其他接触开口结构上沉积阻挡层的新方法。 该方法消除了对结构的氩离子轰击的预清洁的需要，从而减少或消除了下面的导电层的表面的损伤和铜颗粒溅射到通孔或其他接触开口侧壁。 该方法包括在基底上制造单个镶嵌，双镶嵌或其它接触开口结构; 可以任选地预先使用氮或氢等离子体对结构进行预清洗; 在结构的侧壁和底部上沉积薄金属阻挡层; 并且在结构的底部和侧壁上重新分布或重新溅射阻挡层。

公开(公告)号：US08252690B2

公开(公告)日：2012-08-28

申请号：US12031108

申请日：2008-02-14

Applicant: Li-Lin Su ,  Cheng-Lin Huang ,  Shing-Chyang Pan ,  Ching-Hua Hsieh

Inventor： Li-Lin Su ,  Cheng-Lin Huang ,  Shing-Chyang Pan ,  Ching-Hua Hsieh

IPC: H01L21/311

CPC classification number: H01L21/76843 ,  H01L21/2855 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76865 ,  H01L21/76868 ,  H01L21/76873

Abstract: A method of forming a seed layer of an interconnect structure includes forming a dielectric layer; forming an opening in the dielectric layer; performing a first deposition step to form the seed layer; and in-situ performing a first etch step to remove a portion of the seed layer. The method may further includes additional deposition and etch steps for forming the seed layer.

Abstract translation: 形成互连结构的籽晶层的方法包括形成介电层; 在介电层中形成开口; 执行第一沉积步骤以形成种子层; 并且原位执行第一蚀刻步骤以去除种子层的一部分。 该方法还可以包括用于形成种子层的附加沉积和蚀刻步骤。

公开(公告)号：US20110291281A1

公开(公告)日：2011-12-01

申请号：US12789634

申请日：2010-05-28

Applicant: Cheng-Lin Huang ,  Jiing-Feng Yang ,  Chii-Ping Chen ,  Dian-Hau Chen ,  Yuh-Jier Mii

Inventor： Cheng-Lin Huang ,  Jiing-Feng Yang ,  Chii-Ping Chen ,  Dian-Hau Chen ,  Yuh-Jier Mii

IPC: H01L23/532 ,  H01L21/768

CPC classification number: H01L21/7682 ,  H01L21/76829 ,  H01L21/76849 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Partial air gap formation for providing interconnect isolation in integrated circuits is described. One embodiment is an integrated circuit (“IC”) structure includes a substrate having two adjacent interconnect features formed thereon; caps formed over and aligned with each of the interconnect features; sidewalls formed on opposing sides of each of the interconnect features and a gap formed between the interconnect features; and a dielectric material layer disposed over the substrate to cover the caps and the gap.

Abstract translation: 描述了用于在集成电路中提供互连隔离的部分气隙形成。 一个实施例是集成电路（“IC”）结构，其包括其上形成有两个相邻互连特征的基板; 帽形成在每个互连特征上并与其对齐; 形成在每个互连特征的相对侧上的侧壁和在互连特征之间形成的间隙; 以及设置在所述基板上以覆盖所述盖和所述间隙的电介质材料层。

公开(公告)号：US07338909B2

公开(公告)日：2008-03-04

申请号：US10872238

申请日：2004-06-18

Applicant: Yu-Liang Lin ,  Henry Lo ,  Chung-Long Chang ,  Gorge Huang ,  Tony Lu ,  Gnesh Yeh ,  Candy Liang ,  Chun-Hsien Lin ,  Mei Sheng Zhou ,  Sunny Su ,  Ai-Sen Liu ,  Cheng-Lin Huang ,  Li-Jui Chen ,  Shih Che Wang

Inventor： Yu-Liang Lin ,  Henry Lo ,  Chung-Long Chang ,  Gorge Huang ,  Tony Lu ,  Gnesh Yeh ,  Candy Liang ,  Chun-Hsien Lin ,  Mei Sheng Zhou ,  Sunny Su ,  Ai-Sen Liu ,  Cheng-Lin Huang ,  Li-Jui Chen ,  Shih Che Wang

IPC: H01L21/302 ,  H01L21/461

CPC classification number: H01L23/544 ,  H01L21/31111 ,  H01L21/67282 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method and apparatus for locally etching a substrate area the method including providing a substrate comprising a process surface; depositing a material layer over the process surface; and, applying a wet etchant to cover a targeted etching portion of the process surface while excluding an adjacent surrounding area to selectively etch the material layer overlying the targeted etching portion.

Abstract translation: 一种用于局部蚀刻衬底区域的方法和装置，该方法包括提供包含工艺表面的衬底; 在工艺表面上沉积材料层; 以及施加湿蚀刻剂以覆盖所述工艺表面的目标蚀刻部分，同时排除相邻的周围区域以选择性地蚀刻覆盖所述目标蚀刻部分的所述材料层。

公开(公告)号：US20050260851A1

公开(公告)日：2005-11-24

申请号：US10850763

申请日：2004-05-20

Applicant: Cheng-Lin Huang ,  Ching-Hua Hsieh ,  Shau-Lin Shue

Inventor： Cheng-Lin Huang ,  Ching-Hua Hsieh ,  Shau-Lin Shue

IPC: H01L21/285 ,  H01L21/306 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/768

CPC classification number: H01L21/76865 ,  H01L21/02046 ,  H01L21/2855 ,  H01L21/32131 ,  H01L21/76843 ,  H01L21/76862

Abstract: A novel process for re-distributing a barrier layer deposited on a single damascene, dual damascene or other contact opening structure. The process includes providing a substrate having a contact opening structure and a metal barrier layer deposited in the contact opening structure, re-sputtering the barrier layer by bombarding the barrier layer with argon ions and metal ions, and re-sputtering the barrier layer by bombarding the barrier layer with argon ions.

Abstract translation: 一种用于重新分布沉积在单个镶嵌，双镶嵌或其他接触开口结构上的阻挡层的新方法。 该方法包括提供具有接触开口结构的衬底和沉积在接触开口结构中的金属阻挡层，通过用氩离子和金属离子轰击阻挡层来重新溅射阻挡层，并通过轰击来重新溅射阻挡层 阻挡层具有氩离子。