公开(公告)号：US20100282229A1

公开(公告)日：2010-11-11

申请号：US12436806

申请日：2009-05-07

申请人： Khanh Tran

发明人： Khanh Tran

IPC分类号： F41B11/02

CPC分类号： F41B11/55 ,  F41A9/38 ,  F41B11/52

摘要： A paintball marker includes a main body and a dual feed adapter coupled to the main body. The dual feed adapter has a hollow interior, a top feed port and a bottom feed port. A top feed storage hopper is detachably connected to the dual feed adapter at the top feed port, and a bottom feed storage magazine is detachably connected to the dual feed adapter at the bottom feed port. A sleeve with an opening is rotatable within the dual feed adapter between a first position where the sleeve opening aligns with the top feed port for feeding therethrough a first group of paintballs from the hopper, and a second position where the sleeve opening aligns with the bottom feed port for feeding therethrough a second group of paintballs from the magazine.

摘要翻译： 彩弹标记器包括主体和耦合到主体的双馈进给适配器。 双进给适配器具有中空内部，顶部进料口和底部进料口。 顶部进料储存料斗在顶部进料口处可拆卸地连接到双进料适配器，并且底部进料存储盒可拆卸地连接到底部进料口处的双进料适配器。 具有开口的套筒可在双进给适配器内在第一位置和第二位置之间旋转，第一位置和第二位置之间，其中套筒开口与顶部进料口对准，用于从料斗通过第一组彩弹，以及第二位置，其中套筒开口与底部 馈送端口，用于从盒中馈送第二组彩弹。

公开(公告)号：US20080090801A1

公开(公告)日：2008-04-17

申请号：US11854999

申请日：2007-09-13

申请人： Hengmiao Cheng ,  Dilip Bhumralkar ,  Klaus Dress ,  Jacqui Hoffman ,  Mary Johnson ,  Robert Kania ,  Phuong Le ,  Mitchell Nambu ,  Mason Pairish ,  Michael Plewe ,  Khanh Tran

发明人： Hengmiao Cheng ,  Dilip Bhumralkar ,  Klaus Dress ,  Jacqui Hoffman ,  Mary Johnson ,  Robert Kania ,  Phuong Le ,  Mitchell Nambu ,  Mason Pairish ,  Michael Plewe ,  Khanh Tran

IPC分类号： A61K31/519 ,  A61P35/00 ,  C07D471/04

CPC分类号： C07D471/04

摘要： The present invention is directed to novel 4-methylpyridopyrimidinone compounds of Formula (I), and to salts thereof, their synthesis, and their use as inhibitors of phosphoinositide 3-kinase alpha (PI3-Kα).

摘要翻译： 本发明涉及式（I）的新颖的4-甲基吡啶并嘧啶酮化合物及其盐，它们的合成及其作为磷酸肌醇3-激酶α（PI3-Kalpha）抑制剂的用途。

公开(公告)号：US20070232368A1

公开(公告)日：2007-10-04

申请号：US11394869

申请日：2006-03-31

申请人： Rick Feightner ,  Wah Kwong ,  Katherine Mills ,  George Korinsky ,  Khanh Tran

发明人： Rick Feightner ,  Wah Kwong ,  Katherine Mills ,  George Korinsky ,  Khanh Tran

IPC分类号： H04M1/00

CPC分类号： H04M1/0235 ,  H04M1/0227 ,  H04M1/0233 ,  H04M1/23

摘要： Apparatus, systems, and methods described herein may couple a base component associated with a portable electronic device (PED) to a display component associated with the PED such that the display component is capable of sliding and rotating relative to the base component. Other embodiments may be described and claimed.

摘要翻译： 本文所述的装置，系统和方法可以将与便携式电子设备（PED）相关联的基座部件耦合到与PED相关联的显示部件，使得显示部件能够相对于基部部件滑动和旋转。 可以描述和要求保护其他实施例。

公开(公告)号：US6083851A

公开(公告)日：2000-07-04

申请号：US332368

申请日：1999-06-14

申请人： Jeffrey A. Shields ,  Khanh Tran ,  Robert Chen ,  Robert Dawson

发明人： Jeffrey A. Shields ,  Khanh Tran ,  Robert Chen ,  Robert Dawson

IPC分类号： H01L21/3105 ,  H01L21/312 ,  H01L21/318

CPC分类号： H01L21/02134 ,  H01L21/02282 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/02362 ,  H01L21/3124 ,  H01L21/31053 ,  H01L21/31058

摘要： HSQ is employed for gap filling patterned metal layers. The surface of the deposited HSQ gap fill layer is modified to decrease its plasma etching rate. Embodiments include modifying the HSQ surface by exposure to a plasma, such as a nitrogen-containing plasma, e.g., a plasma containing ammonia or hydrogen/nitrogen, to form a nitrided surface region. Reduction of the plasma etching rate of HSQ enables formation of reliable low resistance borderless vias.

公开(公告)号：US6030891A

公开(公告)日：2000-02-29

申请号：US993052

申请日：1997-12-18

申请人： Khanh Tran ,  Richard J. Huang ,  Guarionex Morales

发明人： Khanh Tran ,  Richard J. Huang ,  Guarionex Morales

IPC分类号： H01L21/3105 ,  H01L21/312 ,  H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/76852 ,  H01L21/02134 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02282 ,  H01L21/3124 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76843 ,  H01L21/31058 ,  Y10S438/958

摘要： Borderless vias are formed in electrical connection with a lower metal feature of a metal patterned later gap filled with HSQ. Vacuum baking is conducted before filling the through-hole to outgas water absorbed during solvent cleaning, thereby reducing void formation and improving via integrity. Embodiments include vacuum baking at a temperature of about 300.degree. C. to about 400.degree. C., for about 45 seconds to about 2 minutes, at a pressure of no greater than about 10.sup.-6 Torr, preferably in the same tool employed for depositing the barrier layer in filling the through-hole.

摘要翻译： 无边界通孔形成为与填充有HSQ的金属图案化的后续间隙的下部金属特征电连接。 在填充通孔之前进行真空烘烤以排出在溶剂清洗期间吸收的水，从而减少空隙形成并改进通过完整性。 实施方案包括在约300℃至约400℃的温度下，在不大于约10 -6乇的压力下进行约45秒至约2分钟的真空烘烤，优选在用于沉积的相同工具中进行真空烘烤 阻挡层填充通孔。

公开(公告)号：US6008116A

公开(公告)日：1999-12-28

申请号：US993120

申请日：1997-12-18

申请人： Khanh Tran

发明人： Khanh Tran

IPC分类号： H01L21/3105 ,  H01L21/469

CPC分类号： H01L21/31053

摘要： Planarization of a dielectric interlayer containing a dielectric gap filled layer is improved and facilitated by selective etching to reduce or eliminate steps in the gap filled dielectric layer before oxide deposition and polishing. Embodiments include gap filling a patterned metal layer with SOG or HSQ, forming a photoresist mask with an opening over steps having a height greater than about 3,000 .ANG., etching to reduce the height of the step by at least 70% depositing silicon oxide derived from TEOS or silane by PECVD and CMP.

摘要翻译： 通过选择性蚀刻来改善包含电介质间隙填充层的电介质中间层的平面化，以减少或消除在氧化物沉积和抛光之前的间隙填充介电层中的步骤。 实施例包括用SOG或HSQ填充图案化金属层的间隙，在具有大于约3,000的高度的台阶上形成具有开口的光致抗蚀剂掩模，蚀刻以将步骤的高度降低至少70％，沉积源自TEOS的氧化硅 或硅烷。

公开(公告)号：US5973387A

公开(公告)日：1999-10-26

申请号：US993053

申请日：1997-12-18

申请人： Robert C. Chen ,  Jeffrey A. Shields ,  Khanh Tran

发明人： Robert C. Chen ,  Jeffrey A. Shields ,  Khanh Tran

IPC分类号： H01L21/3213 ,  H01L21/8239 ,  H01L21/3205 ,  H01L27/108

CPC分类号： H01L21/32136 ,  H01L27/1052

摘要： Leading and trailing metal features in a dense array of conductive lines bordering an open field are formed with side surfaces that gradually taper in the direction of the open field toward an underlying substrate. Each side surface bordering the open field is formed with a sufficient slope to reduce cracking of the subsequently deposited dielectric gap fill layer at high stress areas bordering the open field.

摘要翻译： 在开放场附近的密集导电线阵列中的前沿和尾随金属特征形成有沿着开放场方向朝向下面的衬底逐渐变细的侧表面。 与开放场相邻的每个侧面形成有足够的斜率以减少随后沉积的电介质间隙填充层在与开放场相邻的高应力区域处的开裂。

公开(公告)号：US5925932A

公开(公告)日：1999-07-20

申请号：US992431

申请日：1997-12-18

申请人： Khanh Tran ,  Sunil Mehta ,  Andre Stolmeijer

发明人： Khanh Tran ,  Sunil Mehta ,  Andre Stolmeijer

IPC分类号： H01L21/60 ,  H01L23/522 ,  H01L23/532 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76897 ,  H01L23/5226 ,  H01L23/53223 ,  H01L2924/0002

摘要： Borderless vias are formed by depositing a hard dielectric mask layer on the upper surface of a lower metal feature and forming sidewall spacers on the side surfaces of the metal feature and mask layer. A dielectric interlayer is deposited and a misaligned through-hole formed therein by etching. The dielectric material of the sidewall spacer and dielectric material of the dielectric interlayer are different. The etchant employed to form the through-hole exhibits a high selectivity with respect to the sidewall spacer material. The dielectric mask layer enables the formation of a sidewall spacer extending above the metal feature such that, after etching to form the misaligned through-hole, the sidewall spacer covers the side surface of the metal feature.

摘要翻译： 通过在下金属特征的上表面上沉积硬介电掩模层并在金属特征和掩模层的侧表面上形成侧壁间隔而形成无边界通孔。 沉积电介质中间层，通过蚀刻形成不对准的通孔。 电介质中间层的侧壁间隔物和电介质材料的电介质材料是不同的。 用于形成通孔的蚀刻剂相对于侧壁间隔物材料显示出高选择性。 电介质掩模层能够形成在金属特征之上延伸的侧壁间隔，使得在蚀刻以形成未对准的通孔之后，侧壁间隔物覆盖金属特征的侧表面。