公开(公告)号：US20120241599A1

公开(公告)日：2012-09-27

申请号：US13308646

申请日：2011-12-01

申请人： Hiroshi Uemura ,  Ippei Akita ,  Tetsuro Itakura ,  Hideto Furuyama

发明人： Hiroshi Uemura ,  Ippei Akita ,  Tetsuro Itakura ,  Hideto Furuyama

IPC分类号： H01J40/12 ,  H03L5/00

CPC分类号： H04B10/69 ,  H04B10/25

摘要： According to one embodiment, a circuit comprises a first resistor configured to have one end to which a first voltage is input and the other end which outputs a second voltage and a first amplifier configured to have an inverting input connected to the other end of the first resistor and a noninverting input to which a third voltage is input. The circuit further comprises a first capacitor configured to have one end to which an output of the first amplifier is input and the other end to which the other end of the first resistor is connected. An output of the first amplifier or an output of a second amplifier connected to the other end of the first resistor is a fourth voltage. In the circuit, the first resistor and a mirror capacitance composed of the first capacitor and the first amplifier constitute a low-pass filter.

摘要翻译： 根据一个实施例，电路包括第一电阻器，其被配置为具有输入第一电压的一端和输出第二电压的另一端和配置成具有连接到第一电压的另一端的反相输入的第一放大器 电阻器和输入第三电压的同相输入端。 电路还包括第一电容器，其被配置为具有输入第一放大器的输出的一端和第一电阻器的另一端连接到的另一端。 连接到第一电阻器的另一端的第一放大器的输出或第二放大器的输出是第四电压。 在该电路中，由第一电容器和第一放大器组成的第一电阻器和反射镜电容器构成低通滤波器。

公开(公告)号：US20120236579A1

公开(公告)日：2012-09-20

申请号：US13369425

申请日：2012-02-09

申请人： Hiroshi Uemura ,  Hideto Furuyama

发明人： Hiroshi Uemura ,  Hideto Furuyama

IPC分类号： F21V21/00 ,  H05K1/14 ,  H05K1/02

CPC分类号： H05K1/028 ,  H05K1/0219 ,  H05K1/0245 ,  H05K1/0274 ,  H05K1/147 ,  H05K1/189 ,  H05K2201/0154 ,  H05K2201/09063 ,  H05K2201/10121

摘要： According to one embodiment, a flexible wiring module includes a flexible wiring board including a plurality of electrical wirings, a through slit configured to divide the wiring board into a plurality of fins, and a bundling region configured to bundle the plurality of wiring fins. The through slit divides a wiring region of the wiring board into a plurality of wiring fins including a first wiring fin and a second wiring fin having electrical wiring width larger than that of the first wiring fin. The bundling region bundles a laminated portion having at least a portion of the wiring fins laminated in a thickness direction and bundles the fins to cause the second wiring fin to be arranged on at least one of the upper and lower layers of the first wiring fin.

摘要翻译： 根据一个实施例，柔性布线模块包括包括多个电布线的柔性布线板，将布线板分成多个翅片的通孔，以及用于捆扎多个布线翅片的捆扎区域。 贯通狭缝将配线基板的配线区域分割成包括第一配线片的多个配线片和具有大于第一配线片的布线宽度的第二配线片。 捆扎区域将具有至少一部分布线翅片沿厚度方向层压的层叠部分捆扎，从而使第二布线翅片布置在第一布线翅片的上层和下层中的至少一个上。

公开(公告)号：US07929817B2

公开(公告)日：2011-04-19

申请号：US12334661

申请日：2008-12-15

申请人： Hiroshi Uemura ,  Hideto Furuyama

发明人： Hiroshi Uemura ,  Hideto Furuyama

IPC分类号： G02B6/26 ,  G02B6/28

CPC分类号： G02B6/12007

摘要： An optical multiplexer/demultiplexer comprises one light guide main line which guides lights of a plurality of wavelengths, and two or more microring optical resonators directly optically coupled to the one light guide main line. The two or more microring optical resonators are arranged in any two of layers higher than, level with, and lower than a plane where the one light guide main line is disposed, and/or the two or more microring optical resonators are arranged on both sides of the one light guide main line in a light guide direction.

摘要翻译： 光复用器/解复用器包括引导多个波长的光的一个光导主线和直接光耦合到一个光导主线的两个或更多个微环光谐振器。 两个以上的微环型光谐振器配置在比设置有一个导光主线的面的高度，高度等于或低于其中的两个层中，和/或两个或更多个微环光谐振器被布置在两侧 一个光导主线在光导方向上。

公开(公告)号：US07880254B2

公开(公告)日：2011-02-01

申请号：US12170016

申请日：2008-07-09

申请人： Hideto Furuyama

发明人： Hideto Furuyama

IPC分类号： H01L31/0203

CPC分类号： H01L31/0203 ,  H01L31/02327

摘要： A semiconductor light receiving device includes a light receiving section made of a semiconductor provided on a substrate, an electrode provided on the substrate and configured to apply an electric field to the light receiving section, a resin layer provided above the substrate, the resin layer having an inverted conical opening, the inverted conical opening being located above the light receiving section and having an opening diameter which is smaller than the light receiving section in the vicinity of the light receiving section, is continuously enlarged with the distance from the substrate, and is larger than the light receiving section at a surface of the resin layer, and a light reflecting film made of metal and provided on a bevel of the inverted conical opening, the light reflecting film being electrically isolated from the electrode by a gap formed between the light reflecting film and the electrode. At least a portion of the resin layer located in the gap has a light blocking property.

摘要翻译： 半导体光接收装置包括：由设置在基板上的半导体构成的受光部，设置在基板上并配置为向受光部施加电场的电极，设置在基板的上方的树脂层，所述树脂层具有 倒置的圆锥形开口，位于光接收部分上方并且具有小于光接收部分附近的光接收部分的开口直径的倒锥形开口与基板的距离连续地增大，并且是 大于在树脂层的表面处的光接收部分，以及由金属制成并设置在倒锥形开口的斜面上的光反射膜，光反射膜通过形成在光之间的间隙与电极电隔离 反射膜和电极。 位于间隙中的树脂层的至少一部分具有阻光性。

公开(公告)号：US20100316335A1

公开(公告)日：2010-12-16

申请号：US12729299

申请日：2010-03-23

申请人： Hideto Furuyama

发明人： Hideto Furuyama

IPC分类号： G02B6/43

CPC分类号： G02B6/43 ,  G02B6/1221 ,  G02B6/4201 ,  G02B6/4214

摘要： According to an aspect of the present invention, there is provided an optoelectronic interconnection film: including an interconnection portion including: an optical waveguide core having at least two optical input/output portions; an optical waveguide cladding formed along the optical waveguide core; and an electrical wiring formed along the optical waveguide core; and a reinforcing substrate partially attached to the interconnection portion correspondingly with one of the optical input/output portions, wherein the interconnection portion includes: a rigid region to which the reinforcing substrate is attached; and a flexible region to which the reinforcing substrate is not attached, and wherein, in the flexible region, the optical waveguide core is arranged to not across a boundary between a region where the electrical wiring is provided and a region where the electrical wiring is not provided.

摘要翻译： 根据本发明的一个方面，提供了一种光电互连膜：包括互连部分，其包括：具有至少两个光输入/输出部分的光波导芯; 沿着光波导芯形成的光波导包层; 以及沿着光波导芯形成的电线; 以及对应于所述光输入/输出部分之一部分地附接到所述互连部分的加强基板，其中所述互连部分包括：刚性区域，所述加强基板附接到所述刚性区域; 以及柔性区域，其中，所述加强基板未附接到柔性区域，并且其中，在所述柔性区域中，所述光波导芯体布置成不跨越设置所述电线的区域与所述电线不在的区域之间的边界 提供。

公开(公告)号：US07747116B2

公开(公告)日：2010-06-29

申请号：US12204467

申请日：2008-09-04

申请人： Hideto Furuyama

发明人： Hideto Furuyama

IPC分类号： G02B6/30 ,  G02B6/12 ,  G02B6/26 ,  G02B6/42

CPC分类号： G02B6/43 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/1305 ,  H05K1/0206 ,  H05K1/189 ,  H05K3/0061 ,  H05K2201/0209 ,  H05K2201/10121 ,  H01L2924/00

摘要： A flexible optoelectric interconnect including an optoelectric film, a driving IC, an optical semiconductor device, a heat dissipation plate and a thermally conductive material. The optoelectric film has an electrical interconnect layer made of a single layer and an optical interconnect layer including an optical waveguide core and an optical waveguide clad. The optoelectric film has a through hole extending from a major surface thereof to a rear surface opposite to the major surface. The driving IC is provided on the major surface of the optoelectric film and electrically connected to the electrical interconnect layer, and provided above the through hole in the optoelectric film. The optical semiconductor device is provided on the major surface of the optoelectric film and driven by the driving IC.

摘要翻译： 包括光电膜，驱动IC，光半导体器件，散热板和导热材料的柔性光电互连。 光电膜具有由单层构成的电互连层和包括光波导芯和光波导包层的光学互连层。 光电膜具有从主表面延伸到与主表面相对的后表面的通孔。 驱动IC设置在光电膜的主表面上并电连接到电互连层，并且设置在光电膜的通孔的上方。 光学半导体器件设置在光电膜的主表面上并由驱动IC驱动。

公开(公告)号：US07714344B2

公开(公告)日：2010-05-11

申请号：US12133604

申请日：2008-06-05

申请人： Hideto Furuyama

发明人： Hideto Furuyama

IPC分类号： H01L33/00

CPC分类号： H01L33/24 ,  H01L27/15 ,  H01L33/34

摘要： A semiconductor light emitting device includes a silicon substrate, a p-type semiconductor layer provided on the silicon substrate, a n-type semiconductor layer provided on the silicon substrate, the n-type semiconductor layer adjoining the p-type semiconductor layer, and a light emitting section formed at a p-n homojunction between the p-type semiconductor layer and the n-type semiconductor layer. The p-n homojunction is substantially perpendicular to a major surface of the silicon substrate. The p-n homojunction is corrugated with a period matched with an integer multiple of an emission wavelength at the light emitting section.

摘要翻译： 半导体发光器件包括硅衬底，设置在硅衬底上的p型半导体层，设置在硅衬底上的n型半导体层，与p型半导体层相邻的n型半导体层，以及 在p型半导体层和n型半导体层之间的pn同相结合形成的发光部。 p-n同相基本上垂直于硅衬底的主表面。 p-n同质结是在发光部分具有发射波长的整数倍的周期匹配的波纹状的。

公开(公告)号：US20090040739A1

公开(公告)日：2009-02-12

申请号：US12187853

申请日：2008-08-07

申请人： Hiroshi Hamasaki ,  Hideto Furuyama

发明人： Hiroshi Hamasaki ,  Hideto Furuyama

IPC分类号： H01R9/00

CPC分类号： H05K3/222 ,  G02B6/4284 ,  H05K2201/09063 ,  H05K2201/10356 ,  H05K2203/167

摘要： An LSI package includes an interface module having first and second surfaces and including a wiring board having a first through hole, a driver selectively provided on the second surface, a transmission line connected to the driver, and a first terminal formed on the second surface and connected to the driver, an interposer having a third surface facing the second surface and a fourth surface, and including a signal processor and a second terminal provided on the third surface, a third terminal provided on the fourth surface and a second through hole, the third surface facing the second surface except a region where the driver portion is provided. The interposer is arranged so that the first through hole matches with the second through hole, and a movable guide pin is inserted into the first and second through holes to position the interface module and the interposer.

摘要翻译： LSI封装包括具有第一表面和第二表面的接口模块，并且包括具有第一通孔的布线板，选择性地设置在第二表面上的驱动器，连接到驱动器的传输线，以及形成在第二表面上的第一端子， 连接到驱动器的插入器，具有面向第二表面的第三表面和第四表面的插入器，并且包括设置在第三表面上的信号处理器和第二端子，设置在第四表面上的第三端子和第二通孔， 第三表面面对除了设置有驱动器部分的区域之外的第二表面。 插入器布置成使得第一通孔与第二通孔匹配，并且可移动引导销插入到第一和第二通孔中以定位接口模块和插入器。

公开(公告)号：US07489514B2

公开(公告)日：2009-02-10

申请号：US11203959

申请日：2005-08-16

申请人： Hiroshi Hamasaki ,  Hideto Furuyama

发明人： Hiroshi Hamasaki ,  Hideto Furuyama

IPC分类号： H05K7/20

CPC分类号： G02B6/3817 ,  G02B6/389 ,  G02B6/423 ,  G02B6/4246 ,  G02B6/4292 ,  H01L2224/0554 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： I an LSI package, an interface module includes with an interposer having a signal processing LSI mounted thereon and has electric connection terminals for connection to a mounting board and a transmission line for transmitting a high-speed signal to an external wiring. An electric connection terminal is formed in each of the interposer and the interface module for electrically connecting the interposer and the interface module to each other by the mechanical contact, and a fixing holder is mounted for allowing the electric connection terminals to hold the electric connection between the interposer and the interface module. Thus, it is possible to suppress the increase in the manufacturing cost that is caused by the complex construction of the assembly.

摘要翻译： 作为LSI封装，具有安装有信号处理LSI的插入器的接口模块，具有用于连接到安装板的电连接端子和用于将高速信号传输到外部布线的传输线。 在每个插入器和接口模块中的每一个中形成电连接端子，用于通过机械接触将插入器和接口模块彼此电连接，并且安装固定夹以允许电连接端子保持电连接 插入器和接口模块。 因此，可以抑制由组装的复杂结构引起的制造成本的增加。

公开(公告)号：US07463491B2

公开(公告)日：2008-12-09

申请号：US11707106

申请日：2007-02-16

申请人： Hiroshi Yamada ,  Keiji Takaoka ,  Hideto Furuyama

发明人： Hiroshi Yamada ,  Keiji Takaoka ,  Hideto Furuyama

IPC分类号： H05K7/00

CPC分类号： G02B6/43 ,  G02B6/4214 ,  G02B6/4232 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/0274 ,  H05K1/183 ,  H05K3/4602

摘要： A wiring board includes a core composite layer having first and second core boards and an optical transmission portion; first electrodes disposed on one part of the core composite layer, being adapted to mount an optical semiconductor module on the core composite layer; upper and lower core board wirings disposed on another part of and beneath the core composite layer; and upper and lower build-up wirings stacked on the upper and lower core board wirings, being adapted to mount semiconductor modules.

摘要翻译： 布线板包括具有第一和第二芯板的芯复合层和光传输部分; 设置在所述芯复合层的一部分上的第一电极，适于将光学半导体模块安装在所述芯复合层上; 上下芯板布线布置在芯复合层的另一部分和下面; 以及堆叠在上下芯板布线上的上下叠层布线，适于安装半导体模块。