公开(公告)号：US10304680B1

公开(公告)日：2019-05-28

申请号：US15851839

申请日：2017-12-22

Applicant: Macronix International Co., Ltd.

Inventor： Chih-Hsiung Lee ,  Tzung-Ting Han

IPC: H01L21/033 ,  H01L27/11524 ,  H01L27/11529 ,  H01L27/11531 ,  H01L29/788 ,  H01L21/762 ,  H01L29/06 ,  H01L21/027 ,  H01L21/28 ,  H01L29/66

Abstract: Methods of fabricating semiconductor devices having patterns with different feature sizes are provided. An example method includes: etching a first film layer below a patterned mask to form first and second features on a second film layer, forming respective first and second spacers adjacent to sidewalls of the first and second features on the second film layer, removing the first and second features to expose respective first and second portion of the second film layer, the second portion having a larger CD than the first portion, controlling an etching process such that the first portion is etched through and the second portion is protected from etching by a protective film formed during the etching process, and patterning a thin film masked by the first spacer, the second spacer, and the second portion to form smaller features and larger features in respective first and second regions of the thin film.

公开(公告)号：US09899396B1

公开(公告)日：2018-02-20

申请号：US15366682

申请日：2016-12-01

Applicant: MACRONIX International Co., Ltd.

Inventor： Chih-Hsiung Lee ,  Chien-Ying Lee ,  Tzung-Ting Han

IPC: H01L27/088 ,  H01L27/11524 ,  H01L27/11548 ,  H01L21/762 ,  H01L29/788 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/0649 ,  H01L21/76224 ,  H01L27/11531 ,  H01L27/11548

Abstract: A method for fabricating a semiconductor device includes: forming a first trench and a wider second trench in a substrate and a material layer formed thereon, forming a flowable isolation material covering the material layer and filling in the first and second trenches, removing a portion of the flowable isolation material in the second trench so that the thickness of the remaining flowable isolation material on the sidewall of the second trench is 200 Å to 1000 Å, and forming a non-flowable isolation material on the flowable isolation material.

公开(公告)号：US09553047B2

公开(公告)日：2017-01-24

申请号：US14735790

申请日：2015-06-10

Applicant: Macronix International Co. Ltd.

Inventor： Yu-Min Hung ,  Tzung-Ting Han ,  Miao-Chih Hsu

IPC: H01L23/528 ,  H01L21/768 ,  H01L21/3213 ,  H01L27/112

CPC classification number: H01L23/528 ,  H01L21/0337 ,  H01L21/28273 ,  H01L21/32133 ,  H01L21/32139 ,  H01L21/76892 ,  H01L27/11293 ,  H01L27/11519

Abstract: Provided are improved semiconductor memory devices and methods for manufacturing such semiconductor memory devices. A method may incorporate the patterning of the array and periphery regions in self-aligned quadruple patterning and provide semiconductor devices resulting from the combined patterning.

Abstract translation: 提供了用于制造这种半导体存储器件的改进的半导体存储器件和方法。 一种方法可以结合阵列和外围区域的图案化，以自对准的四重图案化，并提供由组合图案化产生的半导体器件。

公开(公告)号：US20140050006A1

公开(公告)日：2014-02-20

申请号：US14063284

申请日：2013-10-25

Applicant: MACRONIX International Co., Ltd.

Inventor： Kuan-Fu Chen ,  Yin-Jen Chen ,  Tzung-Ting Han ,  Ming-Shang Chen

IPC: G11C17/16

CPC classification number: G11C17/16 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/101

Abstract: A one-time programmable memory array includes a first row conductor extending in a first row direction and disposed at a first elevation, a second row conductor extending in a second row direction and disposed at a second elevation and a column conductor extending in a column direction and disposed adjacent to the first row conductor and adjacent to the second row conductor. The array also includes a dielectric layer covering at least a portion of the column conductor, a fuse link coupled between the dielectric layer on the column conductor and the second row conductor.

Abstract translation: 一次可编程存储器阵列包括在第一行方向上延伸并且设置在第一高度的第一行导体，在第二行方向上延伸并设置在第二高度的第二行导体和沿列方向延伸的列导体 并且设置成与第一行导体相邻并且与第二行导体相邻。 阵列还包括覆盖列导体的至少一部分的电介质层，耦合在列导体上的电介质层和第二行导体之间的熔丝链。