中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

16 records (took 0.014 seconds)

    3D MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
    1.
    发明申请
    3D MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20220238549A1

    公开(公告)日：2022-07-28

    申请号：US17160066

    申请日：2021-01-27

    Applicant: MACRONIX International Co., Ltd.

    Inventor： Chung Yi Lin ,  Chih-Hsiung Lee

    IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/11568

    Abstract: Provided are a three-dimensional (3D) memory device and a manufacturing method thereof. The 3D memory device includes a gate stacked structure, a channel layer, a charge storage structure, an electrode layer and a capacitor dielectric layer. The gate stacked structure is disposed on a substrate and includes a plurality of gate layers electrically insulated from each other. The gate stacked structure has at least one channel hole and at least one capacitor trench. The channel layer is disposed on the sidewall of the at least one channel hole. The charge storage structure is disposed between the channel layer and the sidewall of the at least one channel hole. The electrode layer is disposed on the sidewall of the at least one capacitor trench. The capacitor dielectric layer is disposed between the electrode layer and the sidewall of the at least one capacitor trench.

    Memory device and method of fabricating the same
    3.
    发明授权
    Memory device and method of fabricating the same 有权

    公开(公告)号：US11201169B2

    公开(公告)日：2021-12-14

    申请号：US16835360

    申请日：2020-03-31

    Applicant: MACRONIX International Co., Ltd.

    Inventor： Chih-Hsiung Lee ,  Shaw-Hung Ku

    IPC: H01L27/11582 ,  H01L27/11521 ,  H01L27/11556 ,  H01L21/28 ,  H01L27/11568 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3213

    Abstract: A memory device includes: a first bit line located on a dielectric layer and a second bit line located over the dielectric layer; a first word line and a second word line located between the first bit line and the second bit line; a source line located between the first word line and the second word line; a channel pillar penetrating through the first word line and the source line and the second word line, and being connected to the first bit line, the source line and the second bit line; and a charge storage structure including an upper portion surrounding an upper sidewall of the channel pillar and located between the second word line and the channel pillar; and a lower portion surrounding a lower sidewall of the channel pillar and located between the first word line and the channel pillar.

    Three-dimensional memory device with increased memory cell density
    5.
    发明授权
    Three-dimensional memory device with increased memory cell density 有权

    公开(公告)号：US11538827B2

    公开(公告)日：2022-12-27

    申请号：US16937340

    申请日：2020-07-23

    Applicant: MACRONIX International Co., Ltd.

    Inventor： Chih-Hsiung Lee

    IPC: H01L27/11582 ,  H01L23/522 ,  H01L27/11573 ,  H01L27/1157

    Abstract: A memory device and method of forming the same are provided. The memory device includes a word line, a bit line, a source line, a channel pillar, and a charge storage structure. The bit line and the source line are disposed on opposite sides of the word line in a vertical direction. The channel pillar penetrates through and is connected to the word line, the bit line and the source line. The charge storage structure surrounds a top surface and a bottom surface of the word line and is laterally sandwiched between the channel pillar and the word line. The channel pillar completely penetrates through and is laterally surrounded by the bit line.

    MEMORY DEVICE
    6.
    发明申请
    MEMORY DEVICE 有权

    公开(公告)号：US20220123009A1

    公开(公告)日：2022-04-21

    申请号：US17075480

    申请日：2020-10-20

    Applicant: MACRONIX International Co., Ltd.

    Inventor： Chien-Ying Lee ,  Chih-Hsiung Lee ,  Tzung-Ting Han

    IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11519

    Abstract: Provided is a memory device including a substrate, a stack structure on the substrate, a contact, and a supporting pillar. The stacked structure includes a plurality of conductive layers and a plurality of insulating layers stacked alternately on each other. The contact is connected to one of the plurality of conductive layers of the stack structure. The supporting pillar penetrates the stack structure and is disposed around the contact. The supporting pillar includes a body portion and a plurality of extension portions. The body portion is arranged around a first side of the contact. The plurality of extension portions are located on two sides of the body portion. A length of each of the extension portions is greater than a width of the contact, and one of the extension portions is disposed around a second side of the contact.

    MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    7.
    发明申请
    MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 有权

    公开(公告)号：US20210335802A1

    公开(公告)日：2021-10-28

    申请号：US16856285

    申请日：2020-04-23

    Applicant: MACRONIX International Co., Ltd.

    Inventor： Chih-Hsiung Lee

    IPC: H01L27/11582 ,  H01L23/528 ,  H01L29/423 ,  H01L21/311 ,  H01L21/02 ,  H01L29/66 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768 ,  H01L27/11565 ,  H01L29/792 ,  H01L23/522

    Abstract: A memory device includes: first and second bit lines on a dielectric layer; first and second word lines between the first and second bit lines; a source line between the first and second word lines; a channel pillar penetrating through the first word line, the source line and the second word line, and connected to the first bit line, the source line, and the second bit line; a first charge storage structure surrounding a top surface and a bottom surface of the first word line and between a sidewall of the first word line and a lower portion of a sidewall of the channel pillar; and a second charge storage structure, surrounding a top surface and a bottom surface of the second word line and between a sidewall of the second word line and an upper portion of the sidewall of the channel pillar.

    Memory device
    8.
    发明授权
    Memory device 有权

    公开(公告)号：US11637125B2

    公开(公告)日：2023-04-25

    申请号：US17075480

    申请日：2020-10-20

    Applicant: MACRONIX International Co., Ltd.

    Inventor： Chien-Ying Lee ,  Chih-Hsiung Lee ,  Tzung-Ting Han

    IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11565 ,  H01L27/11556

    Abstract: Provided is a memory device including a substrate, a stack structure on the substrate, a contact, and a supporting pillar. The stacked structure includes a plurality of conductive layers and a plurality of insulating layers stacked alternately on each other. The contact is connected to one of the plurality of conductive layers of the stack structure. The supporting pillar penetrates the stack structure and is disposed around the contact. The supporting pillar includes a body portion and a plurality of extension portions. The body portion is arranged around a first side of the contact. The plurality of extension portions are located on two sides of the body portion. A length of each of the extension portions is greater than a width of the contact, and one of the extension portions is disposed around a second side of the contact.

    MEMORY DEVICE AND METHOD OF FORMING THE SAME
    9.
    发明申请
    MEMORY DEVICE AND METHOD OF FORMING THE SAME 有权

    公开(公告)号：US20220028882A1

    公开(公告)日：2022-01-27

    申请号：US16937340

    申请日：2020-07-23

    Applicant: MACRONIX International Co., Ltd.

    Inventor： Chih-Hsiung Lee

    IPC: H01L27/11582 ,  H01L27/1157 ,  H01L27/11573 ,  H01L23/522

    Abstract: A memory device and method of forming the same are provided. The memory device includes a word line, a bit line, a source line, a channel pillar, and a charge storage structure. The bit line and the source line are disposed on opposite sides of the word line in a vertical direction. The channel pillar penetrates through and is connected to the word line, the bit line and the source line. The charge storage structure surrounds a top surface and a bottom surface of the word line and is laterally sandwiched between the channel pillar and the word line. The channel pillar completely penetrates through and is laterally surrounded by the bit line.

    Semiconductor Devices and Fabrication Methods With Reduced Topology And Reduced Word Line Stringer Residual Material
    10.
    发明申请
    Semiconductor Devices and Fabrication Methods With Reduced Topology And Reduced Word Line Stringer Residual Material 审中-公开
    半导体器件和制造方法具有减少拓扑和减少字线串痕残留材料

    公开(公告)号：US20160020143A1

    公开(公告)日：2016-01-21

    申请号：US14334363

    申请日：2014-07-17

    Applicant: Macronix International Co., Ltd.

    Inventor： Chien-Ying Lee ,  Chih-Hsiung Lee ,  Tzung-Ting Han

    IPC: H01L21/768 ,  H01L23/532

    CPC classification number: H01L29/66825 ,  H01L27/11521 ,  H01L29/7881

    Abstract: Provided are improved semiconductor memory devices and methods for manufacturing such semiconductor memory devices. A method may incorporate the formation of a first dielectric layer over buried oxide regions and the removal of such dielectric layer to prepare a substantially planar substrate for subsequent formation of word lines. The method may allow for the production of semiconductor memory devices of reduced size with reduced word line stringer residual material.

    Abstract translation: 提供了用于制造这种半导体存储器件的改进的半导体存储器件和方法。 一种方法可以包括在掩埋氧化物区域上形成第一电介质层，以及去除这种电介质层以制备用于随后形成字线的基本平坦的衬底。 该方法可以允许使用减少的字线纵梁残余材料来生产尺寸减小的半导体存储器件。

Patent Agency Ranking