公开(公告)号：US08747610B2

公开(公告)日：2014-06-10

申请号：US13436760

申请日：2012-03-30

Applicant: Lee Chen ,  Merritt Funk

Inventor： Lee Chen ,  Merritt Funk

IPC: C23F1/00

CPC classification number: H01J37/32834 ,  H01J37/32504 ,  H01J37/32633 ,  H01J37/32935

Abstract: A plasma processing system. The processing system comprises a process chamber having first and second ends arranged such that the first end opposes the second end. A substrate support is positioned at the first end of the process chamber and is configured to support a substrate. An exhaust system is positioned proximate the second end of the process chamber and draws a vacuum on the process chamber. Between the exhaust system and substrate support there is a plurality of super-Debye openings, and between the exhaust system and the plurality of super-Debye openings is a plurality of sub-Debye openings. The super-Debye openings are configured to limit diffusion of plasma while the sub-Debye openings are configured to quench plasma.

Abstract translation: 等离子体处理系统 处理系统包括处理室，该处理室的第一和第二端被布置为使得第一端与第二端相对。 衬底支撑件定位在处理室的第一端处并且被配置为支撑衬底。 排气系统定位在处理室的第二端附近并在处理室上抽真空。 在排气系统和基板支撑件之间存在多个超级德拜开口，并且在排气系统和多个超级德拜开口之间是多个次德开口。 超级德拜开口被配置为限制等离子体的扩散，而副德拜开口被配置为猝灭等离子体。

公开(公告)号：US08415884B2

公开(公告)日：2013-04-09

申请号：US12555080

申请日：2009-09-08

Applicant: Lee Chen ,  Jianping Zhao ,  Ronald V. Bravenec ,  Merritt Funk

Inventor： Lee Chen ,  Jianping Zhao ,  Ronald V. Bravenec ,  Merritt Funk

IPC: H05B31/26

CPC classification number: H05H1/46 ,  H01J37/32192 ,  H01J37/3222 ,  H01L21/67005 ,  H01Q13/10

Abstract: A surface wave plasma (SWP) source is described. The SWP source comprises an electromagnetic (EM) wave launcher configured to couple EM energy in a desired EM wave mode to a plasma by generating a surface wave on a plasma surface of the EM wave launcher adjacent the plasma. The EM wave launcher comprises a slot antenna having a plurality of slots. The SWP source further comprises a first recess configuration formed in the plasma surface, wherein the first recess configuration is substantially aligned with a first arrangement of slots in the plurality of slots, and a second recess configuration formed in the plasma surface, wherein the second recess configuration is either partly aligned with a second arrangement of slots in the plurality of slots or not aligned with the second arrangement of slots in the plurality of slots. A power coupling system is coupled to the EM wave launcher and configured to provide the EM energy to the EM wave launcher for forming the plasma.

Abstract translation: 描述了表面波等离子体（SWP）源。 SWP源包括电磁（EM）波发射器，其被配置为通过在邻近等离子体的EM波发射器的等离子体表面上产生表面波来将期望的EM波模式中的EM能量耦合到等离子体。 EM波发射器包括具有多个槽的缝隙天线。 SWP源还包括形成在等离子体表面中的第一凹陷构型，其中第一凹槽构型基本上与多个槽中的槽的第一布置对准，以及形成在等离子体表面中的第二凹槽构型，其中第二凹槽 配置部分地与多个槽中的槽的第二布置部分对准或者不与多个槽中的槽的第二布置对准。 功率耦合系统耦合到EM波发射器并且被配置为向用于形成等离子体的EM波发射器提供EM能量。

公开(公告)号：US08323521B2

公开(公告)日：2012-12-04

申请号：US12853771

申请日：2010-08-10

Applicant: Jianping Zhao ,  Lee Chen ,  Merritt Funk ,  Toshihisa Nozawa

Inventor： Jianping Zhao ,  Lee Chen ,  Merritt Funk ,  Toshihisa Nozawa

IPC: H01L21/66

CPC classification number: H01J37/3244 ,  H01J37/32192 ,  H01L21/31116 ,  H01L21/32137

Abstract: The invention can provide apparatus and methods of processing a substrate using plasma generation by gravity-induced gas-diffusion separation techniques. By adding or using gases including inert and process gases with different gravities (i.e., ratio between the molecular weight of a gaseous constituent and a reference molecular weight), a two-zone or multiple-zone plasma can be formed, in which one kind of gas can be highly constrained near a plasma generation region and another kind of gas can be largely separated from the aforementioned gas due to differential gravity induced diffusion and is constrained more closer to a wafer process region than the aforementioned gas.

Abstract translation: 本发明可以提供使用通过重力引起的气体扩散分离技术的等离子体生成来处理衬底的装置和方法。 通过添加或使用气体，包括不同重量的惰性气体和工艺气体（即气态成分的分子量与参考分子量之间的比例），可以形成两区或多区等离子体，其中一种 气体可以在等离子体产生区域附近被高度约束，并且由于差分重力感应扩散，另一种气体可以与上述气体大大分离，并且比上述气体更受限于更接近于晶片工艺区域。

公开(公告)号：US20120253497A1

公开(公告)日：2012-10-04

申请号：US13077705

申请日：2011-03-31

Applicant: Daniel J. Prager ,  Merritt Funk ,  Peter Biolsi ,  Ryukichi Shimizu

Inventor： Daniel J. Prager ,  Merritt Funk ,  Peter Biolsi ,  Ryukichi Shimizu

IPC: H01L21/66 ,  G06F19/00

CPC classification number: H01L22/20 ,  H01J37/32082 ,  H01J37/3266 ,  H01L21/31116 ,  H01L21/823871 ,  H01L22/12 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention provides a systems and methods for creating Double Pattern (DP) structures on a patterned wafer in real-time using Dual Pattern Contact-Etch (DPCE) processing sequences and associated Contact-Etch-Multi-Input/Multi-Output (CE-MIMO) models. The DPCE processing sequences can include one or more contact-etch procedures, one or more measurement procedures, one or more contact-etch modeling procedures, and one or more contact-etch verification procedures. The CE-MIMO model uses dynamically interacting behavioral modeling between multiple layers and/or multiple contact-etch procedures. The multiple layers and/or the multiple contact-etch procedures can be associated with the creation of lines, trenches, vias, spacers, contacts, and gate structures that can be created during Double Patterning (DP) procedures.

Abstract translation: 本发明提供了一种用于在图案化晶片上实时使用双模式接触蚀刻（DPCE）处理序列和相关联的接触蚀刻多输入/多输出（CE- MIMO）模型。 DPCE处理序列可以包括一个或多个接触蚀刻程序，一个或多个测量程序，一个或多个接触蚀刻建模程序以及一个或多个接触蚀刻验证程序。 CE-MIMO模型使用多层和/或多个接触蚀刻程序之间的动态交互行为建模。 多层和/或多层接触蚀刻程序可以与在双重图案化（DP）程序期间可以创建的线，沟槽，通孔，间隔物，接触和门结构的创建相关联。

公开(公告)号：US20120248322A1

公开(公告)日：2012-10-04

申请号：US13433078

申请日：2012-03-28

Applicant: Merritt Funk ,  Lee Chen ,  Barton Lane ,  Jianping Zhao ,  Radha Sundararajan

Inventor： Merritt Funk ,  Lee Chen ,  Barton Lane ,  Jianping Zhao ,  Radha Sundararajan

IPC: G01T1/185

CPC classification number: H01J37/32935 ,  H01J49/488 ,  H05H1/0081 ,  Y10T29/49002

Abstract: A method of generating a signal representing with an ion energy analyzer for use in determining an ion energy distribution of a plasma. The ion energy analyzer, used for determining an ion energy distribution of a plasma, includes a first grid and a second grid that is spaced away from and electrically isolated from the first grid. The first grid forms a first surface of the ion energy analyzer and is positioned to be exposed to the plasma. The first grid includes a first plurality of openings, which are dimensioned to be less than a Debye length for the plasma. A voltage source and an ion current meter are operably coupled to the second grid, the latter of which is configured to measure an ion flux onto the ion collector and to transmit a signal that represents the measured ion flux. The method includes selectively and variably biasing the second grid relative to the first grid.

Abstract translation: 一种产生用离子能分析仪表示的信号的方法，用于确定等离子体的离子能量分布。 用于确定等离子体的离子能量分布的离子能量分析器包括与第一格栅隔开并与之隔离的第一格栅和第二栅格。 第一栅格形成离子能量分析器的第一表面并定位成暴露于等离子体。 第一栅格包括第一多个开口，其尺寸被设计成小于等离子体的德拜长度。 电压源和离子电流计可操作地耦合到第二栅极，第二栅极被配置为测量离子收集器上的离子通量并传输表示所测量的离子通量的信号。 该方法包括相对于第一格栅选择性地和可变地偏置第二格栅。

公开(公告)号：US07875555B2

公开(公告)日：2011-01-25

申请号：US11947038

申请日：2007-11-29

Applicant: Lee Chen ,  Merritt Funk

Inventor： Lee Chen ,  Merritt Funk

IPC: H01L21/302

CPC classification number: H01L21/32136 ,  H01J37/321 ,  H01J37/32357 ,  H01J37/32449 ,  H01L21/31116 ,  H01L21/32137

Abstract: A method for treating a substrate with plasma over a wide pressure range is described. The method comprises exposing the substrate to a low pressure plasma in a process chamber. Further, the method comprises exposing the substrate to a high pressure plasma in the process chamber.

Abstract translation: 描述了在宽压力范围内用等离子体处理衬底的方法。 该方法包括将基板暴露于处理室中的低压等离子体。 此外，该方法包括将衬底暴露于处理室中的高压等离子体。

公开(公告)号：US20100214545A1

公开(公告)日：2010-08-26

申请号：US12391410

申请日：2009-02-24

Applicant: Merritt Funk ,  Daniel J. Prager ,  Asao Yamashita ,  Radha Sundararajan

Inventor： Merritt Funk ,  Daniel J. Prager ,  Asao Yamashita ,  Radha Sundararajan

IPC: G03B27/42 ,  G03C5/00

CPC classification number: G03B27/42 ,  G03F7/70466

Abstract: The invention can provide apparatus and methods of creating metal gate structures on wafers in real-time using Lithography-Etch-Lithography-Etch (LELE) processing sequence. Real-time data and/or historical data associated with LELE processing sequences can be fed forward and/or fed back as fixed variables or constrained variables in internal-Integrated-Metrology modules (i-IMM) to improve the accuracy of the metal gate structures.

Abstract translation: 本发明可以提供使用光刻蚀刻光刻蚀刻（LELE）处理序列实时地在晶片上形成金属栅极结构的设备和方法。 与LELE处理序列相关联的实时数据和/或历史数据可以作为内部集成计量模块（i-IMM）中的固定变量或约束变量进​​行向前馈送和/或反馈，以提高金属门结构的精度 。

公开(公告)号：US07772544B2

公开(公告)日：2010-08-10

申请号：US11869656

申请日：2007-10-09

Applicant: Lee Chen ,  Merritt Funk

Inventor： Lee Chen ,  Merritt Funk

IPC: H05H3/02

CPC classification number: H05H3/06

Abstract: Method and system for producing a neutral beam source is described. The neutral beam source comprises a plasma generation system for forming a first plasma in a first plasma region, a plasma heating system for heating electrons from the first plasma region in a second plasma region to form a second plasma, and a neutralizer grid for neutralizing ion species from the second plasma in the second plasma region. Furthermore, the neutral beam source comprises a pumping system that enables use of the neutral beam source for semiconductor processing applications, such as etching processes.

Abstract translation: 描述了用于生产中性束源的方法和系统。 中性束源包括用于在第一等离子体区域中形成第一等离子体的等离子体产生系统，用于在第二等离子体区域中从第一等离子体区域加热电子以形成第二等离子体的等离子体加热系统，以及用于中和离子的中和器栅格 来自第二等离子体区域中的第二等离子体的物质。 此外，中性束源包括泵送系统，其能够使用中性束源用于半导体处理应用，例如蚀刻工艺。

公开(公告)号：US20100081285A1

公开(公告)日：2010-04-01

申请号：US12242065

申请日：2008-09-30

Applicant: Lee Chen ,  Merritt Funk ,  Radha Sundararajan

Inventor： Lee Chen ,  Merritt Funk ,  Radha Sundararajan

IPC: H01L21/3065

CPC classification number: H01L21/0273 ,  G03F7/40 ,  H01L21/32139

Abstract: The invention can provide apparatus and methods of processing a substrate in real-time using subsystems and processing sequences created to improve the etch resistance of photoresist materials. In addition, the improved photoresist layer can be used to more accurately control gate and/or spacer critical dimensions (CDs), to control gate and/or spacer CD uniformity, and to eliminate line edge roughness (LER) and line width roughness (LWR).

Abstract translation: 本发明可以提供使用子系统和制造的处理序列来实时处理衬底的装置和方法，以提高光致抗蚀剂材料的耐蚀刻性。 此外，改进的光致抗蚀剂层可用于更精确地控制栅极和/或间隔物临界尺寸（CD），以控制栅极和/或间隔区CD均匀性，并且消除线边缘粗糙度（LER）和线宽粗糙度（LWR ）。

公开(公告)号：US20100036514A1

公开(公告)日：2010-02-11

申请号：US12186668

申请日：2008-08-06

Applicant: Merritt Funk ,  Radha Sundararajan ,  Asao Yamashita ,  Daniel Prager ,  Hyung Joo Lee

Inventor： Merritt Funk ,  Radha Sundararajan ,  Asao Yamashita ,  Daniel Prager ,  Hyung Joo Lee

IPC: G06F19/00

CPC classification number: G05B17/02 ,  Y10S438/924

Abstract: The invention provides a method of processing a wafer using multilayer processing sequences and Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models and libraries that can include one or more measurement procedures, one or more Poly-Etch (P-E) sequences, and one or more metal-gate etch sequences. The MLMIMO process control uses dynamically interacting behavioral modeling between multiple layers and/or multiple process steps. The multiple layers and/or the multiple process steps can be associated with the creation of lines, trenches, vias, spacers, contacts, and gate structures that can be created using isotropic and/or anisotropic etch processes.

Abstract translation: 本发明提供了一种使用多层处理序列和多层/多输入/多输出（MLMIMO）模型以及可以包括一个或多个测量程序，一个或多个聚蚀刻（PE）序列 ，以及一个或多个金属栅极蚀刻序列。 MLMIMO过程控制使用多层和/或多个过程步骤之间的动态交互行为建模。 多层和/或多个工艺步骤可以与可以使用各向同性和/或各向异性蚀刻工艺产生的线，沟槽，通孔，间隔物，接触和栅极结构的产生相关联。