Abstract:
A replaceable chamber element for use in a plasma processing system, such as a plasma etching system, is described. The replaceable chamber element includes a chamber component configured to be exposed to plasma in a plasma processing system, wherein the chamber component is fabricated of a ferroelectric material.
Abstract:
The invention provides a method of processing a wafer using Ion Energy (IE)-related multilayer process sequences and Ion Energy Controlled Multi-Input/Multi-Output (IEC-MIMO) models and libraries that can include one or more measurement procedures, one or more IEC-etch sequences, and one or more Ion Energy Optimized (IEO) etch procedures. The IEC-MIMO process control uses dynamically interacting behavioral modeling between multiple layers and/or multiple IEC etch sequences. The multiple layers and/or the multiple IEC etch sequence can be associated with the creation of lines, trenches, vias, spacers, contacts, and gate structures that can be created using IEO etch procedures.
Abstract:
A method and apparatus are provided to control the radial or non-radial temperature distribution across a substrate during processing to compensate for non-uniform effects, including radial and angular non-uniformities arising from system variations, or process variations, or both. The temperature is controlled, preferably dynamically, by flowing backside gas differently across different areas on a wafer supporting chuck to vary heat conduction across the wafer. Backside gas flow, of helium, for example, is dynamically varied across the chuck to control the uniformity of processing of the wafer. Ports in the support are grouped, and gas to or from the groups is separately controlled by different valves responsive to a controller that controls gas pressure in each of the areas to spatially and preferably dynamically control wafer temperature to compensate for system and process non-uniformities.
Abstract:
A method and system for dynamically controlling a process chemistry above a substrate is described. The system for adjusting the process chemistry comprises a ring configured to surround a peripheral edge of a substrate in a vacuum processing system. The ring comprises one or more gas distribution passages formed within the ring and configured to supply an additive process gas through an upper surface of the ring to the peripheral region of the substrate, wherein the one or more gas distribution passages are configured to be coupled to one or more corresponding gas supply passages formed within the substrate holder upon which the ring rests.
Abstract:
An ion energy analyzer for determining an ion energy distribution of a plasma and comprising an entrance grid, a selection grid, and an ion collector. The entrance grid includes a first plurality of openings dimensioned to be less than a Debye length for the plasma. The ion collector is coupled to the entrance grid via a first voltage source. The selection grid is positioned between the entrance grid and the ion collector and is coupled to the entrance grid via a second voltage source. An ion current meter is coupled to the ion collector to measure an ion flux onto the ion collector and transmit a signal related thereto.
Abstract:
A process by which an ion energy analyzer is manufactured includes processing a first substrate to form an entrance grid having a first channel and a first plurality of openings extending therethrough. A second substrate is processed to form a selection grid having a second channel therein and a second plurality of openings extending therethrough. A third substrate is processed to form an ion collector having a third channel therein. The entrance grid is operably coupled to, and electrically isolated from, the selection grid, which is, in turn, operably coupled to, and electrically isolated from, the ion collector.
Abstract:
The invention can provide apparatus and methods of processing a substrate in real-time using a Quasi-Neutral Beam (Q-NB) curing system to improve the etch resistance of photoresist layer. In addition, the improved photoresist layer can be used to more accurately control gate and/or spacer critical dimensions (CDs), to control gate and/or spacer CD uniformity, and to eliminate line edge roughness (LER) and line width roughness (LWR).
Abstract:
A process by which an ion energy analyzer is manufactured includes processing a first substrate to form an entrance grid having a first channel and a first plurality of openings extending therethrough. A second substrate is processed to form a selection grid having a second channel therein and a second plurality of openings extending therethrough. A third substrate is processed to form an ion collector having a third channel therein. The entrance grid is operably coupled to, and electrically isolated from, the selection grid, which is, in turn, operably coupled to, and electrically isolated from, the ion collector.
Abstract:
A method of generating a signal representing with an ion energy analyzer for use in determining an ion energy distribution of a plasma. The ion energy analyzer, used for determining an ion energy distribution of a plasma, includes a first grid and a second grid that is spaced away from and electrically isolated from the first grid. The first grid forms a first surface of the ion energy analyzer and is positioned to be exposed to the plasma. The first grid includes a first plurality of openings, which are dimensioned to be less than a Debye length for the plasma. A voltage source and an ion current meter are operably coupled to the second grid, the latter of which is configured to measure an ion flux onto the ion collector and to transmit a signal that represents the measured ion flux. The method includes selectively and variably biasing the second grid relative to the first grid.
Abstract:
The invention can provide apparatus and methods of processing a substrate in real-time using subsystems and processing sequences created to improve the etch resistance of photoresist materials. In addition, the improved photoresist layer can be used to more accurately control gate and/or spacer critical dimensions (CDs), to control gate and/or spacer CD uniformity, and to eliminate line edge roughness (LER) and line width roughness (LWR).