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139 条记录 (耗时 0.021 秒)

    BAND ENGINEERED HIGH-K TUNNEL OXIDES FOR NON-VOLATILE MEMORY
    41.
    发明申请
    BAND ENGINEERED HIGH-K TUNNEL OXIDES FOR NON-VOLATILE MEMORY 有权
    用于非易失性存储器的BAND工程高K隧道氧化物

    公开(公告)号：US20090283816A1

    公开(公告)日：2009-11-19

    申请号：US12120715

    申请日：2008-05-15

    申请人： Wei Tian ,  Insik Jin ,  Dimitar V. Dimitrov ,  Song S. Xue

    发明人： Wei Tian ,  Insik Jin ,  Dimitar V. Dimitrov ,  Song S. Xue

    IPC分类号： H01L29/788

    CPC分类号： H01L29/792

    摘要： A non-volatile memory cell that has a charge source region, a charge storage region, and a crested tunnel barrier layer that has a potential energy profile which peaks between the charge source region and the charge storage region. The tunnel barrier layer has multiple high-K dielectric materials, either as individual layers or as compositionally graded materials.

    摘要翻译： 具有电荷源区域，电荷存储区域和具有在电荷源区域和电荷存储区域之间峰值的势能分布的波峰隧道势垒层的非易失性存储单元。 隧道势垒层具有多个高K电介质材料，无论是单独层还是成分分级材料。

    SPIN-TORQUE MEMORY WITH UNIDIRECTIONAL WRITE SCHEME
    43.
    发明申请
    SPIN-TORQUE MEMORY WITH UNIDIRECTIONAL WRITE SCHEME 失效
    具有单向写入方案的旋转扭矩记忆

    公开(公告)号：US20090262638A1

    公开(公告)日：2009-10-22

    申请号：US12106382

    申请日：2008-04-21

    申请人： Haiwen Xi ,  Dexin Wang ,  Dimitar V. Dimitrov ,  Paul E. Anderson ,  Song S. Xue

    发明人： Haiwen Xi ,  Dexin Wang ,  Dimitar V. Dimitrov ,  Paul E. Anderson ,  Song S. Xue

    IPC分类号： G11B9/00

    CPC分类号： G11C11/16 ,  B82Y25/00 ,  G01R33/093 ,  G01R33/1284 ,  G06T11/001 ,  G11C11/161 ,  G11C11/1675

    摘要： Spin torque magnetic memory elements that have a pinned layer, two free layers, and a current-blocking insulating layer proximate to at least one of the free layers. The resistive state (e.g., low resistance or high resistance) of the memory elements is altered by passing electric current through the element in one direction. In other words, to change from a low resistance to a high resistance, the direction of electric current is the same as to change from a high resistance to a low resistance. The elements have a unidirectional write scheme.

    摘要翻译： 具有钉扎层，两个自由层和靠近至少一个自由层的电流阻挡绝缘层的自旋扭矩磁存储元件。 存储元件的电阻状态（例如，低电阻或高电阻）通过在一个方向上通过元件的电流来改变。 换句话说，为了从低电阻变为高电阻，电流的方向与从高电阻变为低电阻相同。 这些元素具有单向写入方案。

    MAGENTIC JUNCTION MEMORY ARRAY
    44.
    发明申请
    MAGENTIC JUNCTION MEMORY ARRAY 有权
    磁性连接记忆阵列

    公开(公告)号：US20090262467A1

    公开(公告)日：2009-10-22

    申请号：US12106363

    申请日：2008-04-21

    申请人： Haiwen Xi ,  Song S. Xue

    发明人： Haiwen Xi ,  Song S. Xue

    IPC分类号： G11B5/33

    CPC分类号： G11C11/1675 ,  G11C11/161 ,  G11C11/1673

    摘要： A magnetic junction memory array and methods of using the same are described. The magnetic junction memory array includes a plurality of electrically conductive word lines extending in a first direction, a plurality of electrically conductive bit lines extending in a second direction and forming a cross-point array with the plurality of electrically conductive word lines, and a memory cell proximate to, at least selected, cross-points forming a magnetic junction memory array. Each memory cell includes a magnetic pinned layer electrically between a magnetic bit and an isolation transistor. The isolation transistor has a current source and a gate. The current source is electrically coupled to the cross-point bit line and the gate is electrically coupled to the cross-point word line. An electrically conductive cover layer is disposed on and in electrical communication with the magnetic bits.

    摘要翻译： 描述了磁结存储器阵列及其使用方法。 磁结存储器阵列包括沿第一方向延伸的多个导电字线，沿第二方向延伸的多个导电位线，并与多个导电字线形成交叉点阵列，以及存储器 靠近，至少选择的形成磁结存储器阵列的交叉点的单元。 每个存储单元包括在磁性位和隔离晶体管之间电气的磁性固定层。 隔离晶体管具有电流源和栅极。 电流源电耦合到交叉点位线，并且栅极电耦合到交叉点字线。 导电覆盖层设置在与磁头电气连接的位置上。

    Spin oscillator device
    46.
    发明申请
    Spin oscillator device 有权
    旋转振荡器装置

    公开(公告)号：US20080150640A1

    公开(公告)日：2008-06-26

    申请号：US11590530

    申请日：2006-10-31

    申请人： Dimitar Velikov Dimitrov ,  Xilin Peng ,  Song S. Xue ,  Dexin Wang

    发明人： Dimitar Velikov Dimitrov ,  Xilin Peng ,  Song S. Xue ,  Dexin Wang

    IPC分类号： H03L7/26

    CPC分类号： H03B15/006 ,  H03L7/24

    摘要： A spin oscillator device generates a microwave output in response to an applied DC current. The device includes a spin momentum transfer (SMT) stack including a top electrode, a free layer, a nonmagnetic layer, a pinned magnetic structure, and a bottom electrode. A local magnetic field source adjacent the SMT stack applies a local magnetic field to the free layer to cause the magnetization direction of the free layer to be oriented at a tilt angle with respect to plane of the free layer. The local magnetic field source can include coils or an electromagnet structure, or permanent magnets in close proximity to the SMT stack.

    摘要翻译： 自旋振荡器装置响应于所施加的DC电流产生微波输出。 该装置包括自旋动量转移（SMT）堆叠，其包括顶部电极，自由层，非磁性层，钉扎磁性结构和底部电极。 邻近SMT堆叠的局部磁场源将局部磁场施加到自由层，以使自由层的磁化方向相对于自由层的平面倾斜。 局部磁场源可以包括线圈或电磁体结构，或者靠近SMT堆叠的永磁体。

    Write verify method for resistive random access memory
    47.
    发明授权
    Write verify method for resistive random access memory 失效
    电阻随机存取存储器的写验证方法

    公开(公告)号：US08599600B2

    公开(公告)日：2013-12-03

    申请号：US13278249

    申请日：2011-10-21

    申请人： Haiwen Xi ,  Song S. Xue

    发明人： Haiwen Xi ,  Song S. Xue

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0069 ,  G11C11/5664 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/0014 ,  G11C13/0016 ,  G11C13/0064 ,  G11C2013/0073 ,  G11C2211/5621 ,  G11C2213/31 ,  G11C2213/32

    摘要： Write verify methods for resistance random access memory (RRAM) are provided. The methods include applying a reset operation voltage pulse across a RRAM cell to change a resistance of the RRAM cell from a low resistance state to a high resistance state and applying a forward resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance value less than a selected lower resistance limit value. The method also includes applying a reverse resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance values is greater than a selected upper resistance limit value. The reverse resetting voltage pulse has a second polarity being opposite the first polarity.

    摘要翻译： 提供了电阻随机存取存储器（RRAM）的写验证方法。 所述方法包括在RRAM单元之间施加复位操作电压脉冲以将RRAM单元的电阻从低电阻状态改变为高电阻状态，并且如果RRAM单元具有高电阻则在RRAM单元之间施加正向复位电压脉冲 状态电阻值小于选定的下限电阻值。 该方法还包括如果RRAM单元具有大于所选上限电阻值的高电阻状态电阻值，则跨越RRAM单元施加反向复位电压脉冲。 反向复位电压脉冲具有与第一极性相反的第二极性。

    Memory with separate read and write paths
    49.
    发明授权
    Memory with separate read and write paths 有权
    内存具有单独的读写路径

    公开(公告)号：US08400823B2

    公开(公告)日：2013-03-19

    申请号：US12774016

    申请日：2010-05-05

    申请人： Haiwen Xi ,  Hongyue Liu ,  Michael Xuefei Tang ,  Antoine Khoueir ,  Song S. Xue

    发明人： Haiwen Xi ,  Hongyue Liu ,  Michael Xuefei Tang ,  Antoine Khoueir ,  Song S. Xue

    IPC分类号： G11C11/00

    CPC分类号： G11C11/161 ,  G11C11/1655 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675

    摘要： A memory unit includes a giant magnetoresistance cell electrically coupled between a write bit line and a write source line. The giant magnetoresistance cell includes a free magnetic layer separated from a first pinned magnetic layer by a first non-magnetic electrically conducting layer. A magnetic tunnel junction data cell is electrically coupled between a read bit line and a read source line. The magnetic tunnel junction data cell includes the free magnetic layer separated from a second pinned magnetic layer by an oxide barrier layer. A write current passes through the giant magnetoresistance cell to switch the giant magnetoresistance cell between a high resistance state and a low resistance state. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by magnetostatic coupling with the giant magnetoresistance cell, and be read by a read current passing though the magnetic tunnel junction data cell.

    摘要翻译： 存储单元包括电耦合在写位线和写入源线之间的巨磁电阻单元。 巨磁阻单元包括通过第一非磁性导电层与第一固定磁性层分离的自由磁性层。 磁性隧道结数据单元电耦合在读取位线和读取源极线之间。 磁性隧道结数据单元包括通过氧化物阻挡层与第二固定磁性层分离的自由磁性层。 写入电流通过巨磁电阻单元，以将巨磁阻单元切换到高电阻状态和低电阻状态之间。 磁隧道结数据单元被配置为通过与巨磁电阻单元的静磁耦合在高电阻状态和低电阻状态之间切换，并且通过通过磁性隧道结数据单元的读取电流来读取。

    MRAM DIODE ARRAY AND ACCESS METHOD
    50.
    发明申请
    MRAM DIODE ARRAY AND ACCESS METHOD 有权
    MRAM二极管阵列和访问方法

    公开(公告)号：US20130003448A1

    公开(公告)日：2013-01-03

    申请号：US13611225

    申请日：2012-09-12

    申请人： Yiran Chen ,  Hai Li ,  Hongyue Liu ,  Yong Lu ,  Song S. Xue

    发明人： Yiran Chen ,  Hai Li ,  Hongyue Liu ,  Yong Lu ,  Song S. Xue

    IPC分类号： G11C11/16

    CPC分类号： G11C11/1675 ,  G11C11/1659

    摘要： A memory unit includes a magnetic tunnel junction data cell is electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a write current through the magnetic tunnel junction data cell. A first diode is electrically between the magnetic tunnel junction data cell and the source line and a second diode is electrically between the magnetic tunnel junction data cell and the source line. The first diode and second diode are in parallel electrical connection, and having opposing forward bias directions. The memory unit is configured to be precharged to a specified precharge voltage level and the precharge voltage is less than a threshold voltage of the first diode and second diode.

    摘要翻译： 存储单元包括磁性隧道结数据单元电耦合到位线和源极线。 磁隧道结数据单元被配置为通过使写入电流通过磁性隧道结数据单元而在高电阻状态和低电阻状态之间切换。 第一二极管电磁性地在磁性隧道结数据单元和源极线之间，第二个二极管电气地在磁性隧道结数据单元和源极线之间。 第一二极管和第二二极管并联电连接并具有相反的正向偏压方向。 存储器单元被配置为预充电到指定的预充电电压电平，并且预充电电压小于第一二极管和第二二极管的阈值电压。