公开(公告)号：US06687153B2

公开(公告)日：2004-02-03

申请号：US10404171

申请日：2003-04-01

申请人： Tyler A. Lowrey

发明人： Tyler A. Lowrey

IPC分类号： G11C1100

CPC分类号： G11C13/0069 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2013/0092

摘要： The memory device has constituent cells which include a structural phase-change material to store the cells data. This material may be, for instance, a chalcogenide alloy. A first pulse is applied to the cell to leave the material in a first state, such as a reset state in which the material is relatively amorphous and has relatively high resistivity. Thereafter, a second pulse is applied to the cell to change the material from the first state to a second, different state, such as a set state in which the material is relatively crystalline and has relatively low resistivity. This second pulse has a generally triangular shape, rather than a rectangular one.

摘要翻译： 存储器件具有包括用于存储单元数据的结构相变材料的构成单元。 该材料可以是例如硫族化物合金。 将第一脉冲施加到电池以使材料处于第一状态，例如其中材料是相对无定形并且具有相对高的电阻率的复位状态。 此后，将第二脉冲施加到电池，以将材料从第一状态改变到第二不同状态，例如材料相对结晶并且具有相对低的电阻率的设定状态。 该第二脉冲具有大致三角形的形状，而不是矩形的。

公开(公告)号：US06632736B2

公开(公告)日：2003-10-14

申请号：US09921615

申请日：2001-08-03

申请人： Gurtej S. Sandhu ,  Trung T. Doan ,  Tyler A. Lowrey

发明人： Gurtej S. Sandhu ,  Trung T. Doan ,  Tyler A. Lowrey

IPC分类号： H01L214763

CPC分类号： H01L21/76855 ,  C23C16/34 ,  H01L21/28518 ,  H01L21/28556 ,  H01L21/28568 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76862

摘要： A contact structure incorporating an amorphous titanium nitride barrier layer formed via low-pressure chemical vapor deposition (LPCVD) utilizing tetrakis-dialkylamido-titanium, Ti(NMe2)4, as the precursor. The contact structure is fabricated by etching a contact opening through an dielectric layer down to a diffusion region to which electrical contact is to be made. Titanium metal is deposited over the surface of the wafer so that the exposed surface of the diffusion region is completely covered by a layer of the metal. At least a portion of the titanium metal layer is eventually converted to titanium silicide, thus providing an excellent conductive interface at the surface of the diffusion region. A titanium nitride barrier layer is then deposited using the LPCVD process, coating the walls and floor of the contact opening. Chemical vapor deposition of polycrystalline silicon or of a metal follows.

摘要翻译： Ti（NMe PDAT> 2 ）通过低压化学气相沉积（LPCVD）形成的非晶氮化钛阻挡层的接触结构， PDAT> 4 作为前体。 通过将通过电介质层的接触开口蚀刻到要进行电接触的扩散区域来制造接触结构。 钛金属沉积在晶片的表面上，使得扩散区域的暴露表面完全被金属层覆盖。 钛金属层的至少一部分最终被转化为硅化钛，从而在扩散区的表面提供优异的导电界面。 然后使用LPCVD工艺沉积氮化钛阻挡层，涂覆接触开口的壁和底板。 多晶硅或金属的化学气相沉积如下

公开(公告)号：US06570784B2

公开(公告)日：2003-05-27

申请号：US09895135

申请日：2001-06-29

申请人： Tyler A. Lowrey

发明人： Tyler A. Lowrey

IPC分类号： G11C1100

CPC分类号： G11C13/0069 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2013/0092

摘要： The memory device has constituent cells which include a structural phase-change material to store the cells data. This material may be, for instance, a chalcogenide alloy. A first pulse is applied to the cell to leave the material in a first state, such as a reset state in which the material is relatively amorphous and has relatively high resistivity. Thereafter, a second pulse is applied to the cell to change the material from the first state to a second, different state, such as a set state in which the material is relatively crystalline and has relatively low resistivity. This second pulse has a generally triangular shape, rather than a rectangular one.

摘要翻译： 存储器件具有包括用于存储单元数据的结构相变材料的构成单元。 该材料可以是例如硫族化物合金。 将第一脉冲施加到电池以使材料处于第一状态，例如其中材料是相对无定形并且具有相对高的电阻率的复位状态。 此后，将第二脉冲施加到电池，以将材料从第一状态改变到第二不同状态，例如材料相对结晶并且具有相对低的电阻率的设定状态。 该第二脉冲具有大致三角形的形状，而不是矩形的。

公开(公告)号：US06507061B1

公开(公告)日：2003-01-14

申请号：US09945331

申请日：2001-08-31

申请人： Stephen J. Hudgens ,  Tyler A. Lowrey ,  Patrick J. Klersy

发明人： Stephen J. Hudgens ,  Tyler A. Lowrey ,  Patrick J. Klersy

IPC分类号： H01L2976

CPC分类号： H01L45/06 ,  H01L29/8615 ,  H01L45/1233 ,  H01L45/128 ,  H01L45/144

摘要： A phase-change memory may be formed with at least two phase-change material layers separated by a barrier layer. The use of more than one phase-change layer enables a reduction in the programming volume while still providing adequate thermal insulation.

公开(公告)号：US06462984B1

公开(公告)日：2002-10-08

申请号：US09895599

申请日：2001-06-29

申请人： Daniel Xu ,  Tyler A. Lowrey ,  David L. Kencke

发明人： Daniel Xu ,  Tyler A. Lowrey ,  David L. Kencke

IPC分类号： G11C1136

CPC分类号： G11C13/003 ,  G11C8/08 ,  G11C11/36 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0028 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2213/72 ,  G11C2213/74 ,  G11C2213/76

摘要： An integrated circuit (IC) has a number of memory cells, each of which has a diode structure coupled between a bitline and a wordline that are selected when programming that cell. A target memory cell of the IC is programmed while simultaneously floating a number of unselected bitlines and wordlines in the IC.

摘要翻译： 集成电路（IC）具有多个存储单元，每个存储单元具有耦合在编程该单元时选择的位线和字线之间的二极管结构。 IC的目标存储单元被编程，同时浮置IC中的多个未选定的位线和字线。

公开(公告)号：US06452223B1

公开(公告)日：2002-09-17

申请号：US09651861

申请日：2000-08-30

申请人： Tyler A. Lowrey

发明人： Tyler A. Lowrey

IPC分类号： H01L27108

CPC分类号： H01L21/76897 ,  H01L21/76838 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10811 ,  H01L27/10885 ,  H01L27/10888

摘要： A method of electrically linking the contacts of a semiconductor device to their corresponding digit lines. The method includes disposing a quantity of mask material into a trench through which the contact is exposed. The mask also abuts a connect region of a conductive element of a corresponding digit line and, therefore, protrudes somewhat over a surface of the semiconductor device. A layer of insulative material is disposed over the semiconductor device with the mask material being exposed therethrough. The mask material is then removed, leaving open cavities that include the trench and a strap region continuous with the trench and with a connect region of the corresponding digit line. Conductive material is disposed within the cavity and electrically isolated from conductive material disposed in adjacent cavities, which define conductive plugs or studs and conductive straps from the conductive material. These plugs or studs and straps provide an electrically conductive link between each contact of the semiconductor device and its corresponding digit line. Semiconductor devices that include features that have been fabricated in accordance with the method of the present invention are also within the scope of the present invention.

公开(公告)号：US06423620B1

公开(公告)日：2002-07-23

申请号：US09935474

申请日：2001-08-21

申请人： Pai-Hung Pan ,  Luan C. Tran ,  Tyler A. Lowrey

发明人： Pai-Hung Pan ,  Luan C. Tran ,  Tyler A. Lowrey

IPC分类号： H01L2144

摘要： Methods of forming contact openings, memory circuitry, and dynamic random access memory (DRAM) circuitry are described. In one implementation, an array of word lines and bit lines are formed over a substrate surface and separated by an intervening insulative layer. Conductive portions of the bit lines are outwardly exposed and a layer of material is formed over the substrate and the exposed conductive portions of the bit lines. Selected portions of the layer of material are removed along with portions of the intervening layer sufficient to (a) expose selected areas of the substrate surface and to (b) re-expose conductive portions of the bit lines. Conductive material is subsequently formed to electrically connect exposed substrate areas with associated conductive portions of individual bit lines.

公开(公告)号：US06406954B1

公开(公告)日：2002-06-18

申请号：US09388559

申请日：1999-09-02

申请人： Shubneesh Batra ,  Luan C. Tran ,  Tyler A. Lowrey

发明人： Shubneesh Batra ,  Luan C. Tran ,  Tyler A. Lowrey

IPC分类号： H01L218238

CPC分类号： H01L21/823807 ,  H01L21/823814

摘要： In one aspect, the invention includes a semiconductor processing method of diffusing dopant into both n-type and p-type doped regions of a semiconductive substrate. A semiconductive material is provided. The semiconductive material has a first portion and a second portion. The first portion is a p-type doped portion and the second portion is an n-type doped portion. A mask material is formed over the p-type and n-type doped portions. A first opening is formed to extend through the mask material and to the n-type doped portion. A second opening is formed to extend through the mask material and to the p-type doped portion. Conductively doped polysilicon is formed within the first and second openings. Dopant is out-diffused from the conductively-doped polysilicon and into the n-type and p-type doped portions. In another aspect, the invention includes methods of forming CMOS constructions. In yet another aspect, the invention encompasses methods of forming DRAM constructions.

摘要翻译： 一方面，本发明包括将掺杂剂扩散到半导体衬底的n型和p型掺杂区域中的半导体处理方法。 提供半导体材料。 半导体材料具有第一部分和第二部分。 第一部分是p型掺杂部分，第二部分是n型掺杂部分。 在p型和n型掺杂部分上形成掩模材料。 形成第一开口以延伸穿过掩模材料和n型掺杂部分。 形成第二开口以延伸穿过掩模材料和p型掺杂部分。 导电掺杂多晶硅形成在第一和第二开口内。 掺杂剂从导电掺杂多晶硅扩散到n型和p型掺杂部分。 另一方面，本发明包括形成CMOS结构的方法。 在另一方面，本发明包括形成DRAM结构的方法。

公开(公告)号：US5849635A

公开(公告)日：1998-12-15

申请号：US680790

申请日：1996-07-11

申请人： Salman Akram ,  Tyler A. Lowrey

发明人： Salman Akram ,  Tyler A. Lowrey

IPC分类号： H01L21/311 ,  H01L21/316 ,  H01L21/768 ,  H01L21/44 ,  B05D1/36

CPC分类号： H01L21/02274 ,  H01L21/02164 ,  H01L21/31111 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/76802

摘要： A semiconductor processing method of forming a contact opening includes providing a substrate having a node location to which electrical connection is to be made. A layer comprising doped silicon dioxide is formed over the node location. Thereafter, both O.sub.2 and O.sub.3 are flowed simultaneously to the substrate along with tetraethylorthosilicate to the substrate to form a continuous layer comprising undoped silicon dioxide on the layer comprising doped silicon dioxide. During the flowing, a ratio of O.sub.3 to O.sub.2 flows is increased to form an outer portion of the continuous layer comprising undoped silicon dioxide to have a higher etch rate for a selected wet etch chemistry than an inner portion of said continuous layer. A common contact opening is anisotropically dry etched into the layer comprising undoped silicon dioxide and into the layer comprising doped silicon dioxide over the node location to outwardly expose the node location. After this etching, a subsequent wet etching with the selected chemistry is conducted within the common contact opening to widen the contact opening in the outer portion of the layer comprising undoped silicon dioxide as compared to the inner portion of the layer comprising undoped silicon dioxide. The subsequent wet etching is chosen and conducted to be effectively selective to not substantially laterally etch the layer comprising doped silicon dioxide.

摘要翻译： 形成接触开口的半导体处理方法包括提供具有要与其进行电连接的节点位置的衬底。 在节点位置形成包含掺杂二氧化硅的层。 此后，O 2和O 3都与原硅酸四乙酯同时流动到衬底，以在包含掺杂二氧化硅的层上形成包含未掺杂的二氧化硅的连续层。 在流动期间，增加O 3与O 2流量的比例，以形成包含未掺杂二氧化硅的连续层的外部部分，以使所选湿法蚀刻化学品具有比所述连续层的内部更高的蚀刻速率。 常见的接触开口被各向异性地干蚀刻到包含未掺杂的二氧化硅的层中，并且在节点位置上进入到包含掺杂的二氧化硅的层中以向外暴露出节点位置。 在该蚀刻之后，在公共接触开口内进行随之选择的化学反应的湿式蚀刻，以加宽包含未掺杂的二氧化硅的层的外部部分中的接触开口，与包含未掺杂的二氧化硅的层的内部相比较。 选择并进行随后的湿式蚀刻以有效地选择性地基本上不横向蚀刻包含掺杂二氧化硅的层。

公开(公告)号：US5723382A

公开(公告)日：1998-03-03

申请号：US509708

申请日：1995-07-31

申请人： Gurtej S. Sandhu ,  Trung T. Doan ,  Tyler A. Lowrey

发明人： Gurtej S. Sandhu ,  Trung T. Doan ,  Tyler A. Lowrey

IPC分类号： C23C16/34 ,  H01L21/285 ,  H01L21/768 ,  H01L21/44

CPC分类号： H01L21/76855 ,  C23C16/34 ,  H01L21/28568 ,  H01L21/76843

摘要： This invention constitutes a contact structure incorporating an amorphous titanium nitride barrier layer formed via low-pressure chemical vapor deposition (LPCVD) utilizing tetrakis-dialkylamido-titanium, Ti(NMe.sub.2).sub.4, as the precursor. The contact structure is fabricated by etching a contact opening through an dielectric layer down to a diffusion region to which electrical contact is to be made. Titanium metal is deposited over the surface of the wafer so that the exposed surface of the diffusion region is completely covered by a layer of the metal. At least a portion of the titanium metal layer is eventually converted to titanium silicide, thus providing an excellent conductive interface at the surface of the diffusion region. A titanium nitride barrier layer is then deposited using the LPCVD process, coating the walls and floor of the contact opening. Chemical vapor deposition of polycrystalline silicon, or of metal, such as tungsten, follows, and proceeds until the contact opening is completely filled with either polycrystalline silicon or metal.

摘要翻译： 本发明构成了采用利用四 - 二烷基酰胺基钛，Ti（NMe 2）4作为前体的低压化学气相沉积（LPCVD）形成的无定形氮化钛阻挡层的接触结构。 通过将通过电介质层的接触开口蚀刻到要进行电接触的扩散区域来制造接触结构。 钛金属沉积在晶片的表面上，使得扩散区域的暴露表面完全被金属层覆盖。 钛金属层的至少一部分最终被转化为硅化钛，从而在扩散区的表面提供优异的导电界面。 然后使用LPCVD工艺沉积氮化钛阻挡层，涂覆接触开口的壁和底板。 多晶硅或金属如钨的化学气相沉积随后进行，直到接触开口完全充满多晶硅或金属。