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公开(公告)号：US10917087B2
公开(公告)日：2021-02-09
申请号：US16719053
申请日：2019-12-18
Inventor： Vanni Poletto , David F. Swanson , Giovanni Luca Torrisi , Laurent Chevalier
IPC: H03K17/687 , G01R19/165 , G05B11/42 , G05F1/618 , G05F1/56 , H02J7/34
Abstract: A circuit for controlling a first plurality of transistors connected in parallel and a second plurality of transistors connected in parallel, includes: a first plurality of stages, a respective one of the first plurality of stages being configured to supply a first control signal to a respective one of the first plurality of transistors; and a second plurality of stages, a respective one of the second plurality of stages being configured to supply a second control signal to a respective one of the second plurality of transistors. An output current of the respective one of the first plurality of stages is regulated based on a difference between a first value representative of a sum of output currents of each stage of the first plurality of stages and a second value representative of a sum of set points assigned to the first plurality of stages.
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公开(公告)号：US20190267991A1
公开(公告)日：2019-08-29
申请号：US16274844
申请日：2019-02-13
Inventor： Vanni Poletto , David F. Swanson , Giovanni Luca Torrisi , Laurent Chevalier
IPC: H03K17/687 , G05B11/42 , G01R19/165
Abstract: A circuit for controlling a first plurality of transistors connected in parallel and a second plurality of transistors connected in parallel, includes: a first plurality of stages, a respective one of the first plurality of stages being configured to supply a first control signal to a respective one of the first plurality of transistors; and a second plurality of stages, a respective one of the second plurality of stages being configured to supply a second control signal to a respective one of the second plurality of transistors. An output current of the respective one of the first plurality of stages is regulated based on a difference between a first value representative of a sum of output currents of each stage of the first plurality of stages and a second value representative of a sum of set points assigned to the first plurality of stages.
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公开(公告)号：US12241946B2
公开(公告)日：2025-03-04
申请号：US18335511
申请日：2023-06-15
Applicant: STMicroelectronics S.r.l.
Inventor： Davide Argento , Orazio Pennisi , Stefano Castorina , Vanni Poletto , Matteo Landini , Andrea Maino
Abstract: A system and method for measuring a capacitance value of a capacitor are provided. In embodiments, a resistor is coupled to a terminal of the capacitor. A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor is measured. The discharge routine includes sinking a current through a discharge circuit coupled to the resistor from first to second. Integration of a difference in voltage at terminals of the resistor during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor. The health of the capacitor is determined based on a difference between the computed capacitance value and a threshold value.
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公开(公告)号：US11789048B2
公开(公告)日：2023-10-17
申请号：US17340559
申请日：2021-06-07
Applicant: STMicroelectronics S.r.l.
Inventor： Vanni Poletto , Nicola Errico , Paolo Vilmercati , Marco Cignoli , Vincenzo Salvatore Genna , Diego Alagna
IPC: G01R19/165 , H01H47/02 , H01H47/32
CPC classification number: G01R19/1659 , H01H47/02 , H01H47/325
Abstract: An embodiment circuit comprises high-side and low-side switches arranged between supply and reference nodes, and having an intermediate node. A switching control signal is applied with opposite polarities to the high-side and low-side switches. An inductive load is coupled between the intermediate node and one of the supply and reference nodes. Current sensing circuitry is configured to sample a first value of the load current flowing in one of the high-side and low-side switches before a commutation of the switching control signal, sample a second value of the load current flowing in the other of the high-side and low-side switches after the commutation of the switching control signal, sample a third value of the load current flowing in the other of the high-side and low-side switches after the second sampling, and generate a failure signal as a function of the first, second and third sampled values of the load current.
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公开(公告)号：US20210389351A1
公开(公告)日：2021-12-16
申请号：US17340559
申请日：2021-06-07
Applicant: STMicroelectronics S.r.l.
Inventor： Vanni Poletto , Nicola Errico , Paolo Vilmercati , Marco Cignoli , Vincenzo Salvatore Genna , Diego Alagna
IPC: G01R19/165 , H01H47/32 , H01H47/02
Abstract: An embodiment circuit comprises high-side and low-side switches arranged between supply and reference nodes, and having an intermediate node. A switching control signal is applied with opposite polarities to the high-side and low-side switches. An inductive load is coupled between the intermediate node and one of the supply and reference nodes. Current sensing circuitry is configured to sample a first value of the load current flowing in one of the high-side and low-side switches before a commutation of the switching control signal, sample a second value of the load current flowing in the other of the high-side and low-side switches after the commutation of the switching control signal, sample a third value of the load current flowing in the other of the high-side and low-side switches after the second sampling, and generate a failure signal as a function of the first, second and third sampled values of the load current.
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Patent Agency Ranking
公开(公告)号：US11139811B2
公开(公告)日：2021-10-05
申请号：US16854518
申请日：2020-04-21
Applicant: STMicroelectronics S.r.l.
Inventor： Giancarlo Ragone , Vanni Poletto
IPC: H03K17/08 , H03K17/082 , B60R21/017 , B60R21/01 , H03F3/45
Abstract: A drive circuit for airbag systems, for instance includes a differential transconductance amplifier having a first input node, a second input node, an output node coupled to the second input node via a feedback line; a transistor coupled between a drive node and a supply node configured to be coupled to a power supply source; a control node coupled to the control electrode of the transistor and the output node; a Zener diode arrangement having cathode and anode terminals coupled to the supply node and the first input node, respectively; a pull-up component arranged in parallel with the Zener diode arrangement; and an enable switch coupled to the first input node and referred to ground and switchable between a conductive state and a non-conductive state with the differential transconductance amplifier providing controlled current discharging/charging of the control node to make the transistor conductive/non-conductive, respectively.
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公开(公告)号：US10983151B2
公开(公告)日：2021-04-20
申请号：US16521415
申请日：2019-07-24
Applicant: STMicroelectronics S.r.l.
Inventor： Vanni Poletto , Nicola Rogledi
Abstract: A device to read a variable resistor has an analog to digital converter (ADC), a first switch and a second switch. The ADC has a first ADC input, a second ADC input and an ADC output. The first switch selectively couples a first voltage indicative of a voltage across a first resistance to the first ADC input. The second switch selectively couples a second voltage indicative of a voltage across a second resistance to the second ADC input. The ADC outputs a signal indicative of a value of the second resistance.
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公开(公告)号：US10901444B2
公开(公告)日：2021-01-26
申请号：US16777275
申请日：2020-01-30
Applicant: STMicroelectronics S.r.l.
Inventor： Vanni Poletto , Biagio Provinzano
IPC: H03K17/042 , H03K17/16 , H03K17/687 , H03K19/003 , G05F1/575 , H03F3/45 , H03F3/50
Abstract: A (pre) driver circuit includes first and second output terminals configured to be coupled to a power transistor. A differential stage has non-inverting and inverting inputs for receiving an input voltage. The input voltage is replicated as an output voltage across the first and second output terminals as a drive signal for the power transistor. The differential stage includes a differential transconductance amplifier in a voltage follower arrangement configured to provide continuous regulation of a voltage at the first output terminal with respect to the second output terminal.
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公开(公告)号：US10401408B2
公开(公告)日：2019-09-03
申请号：US15261126
申请日：2016-09-09
Applicant: STMicroelectronics S.r.l.
Inventor： Vanni Poletto , Nicola Rogledi
Abstract: A device to read a variable resistor has an analog to digital converter (ADC), a first switch and a second switch. The ADC has a first ADC input, a second ADC input and an ADC output. The first switch selectively couples a first voltage indicative of a voltage across a first resistance to the first ADC input. The second switch selectively couples a second voltage indicative of a voltage across a second resistance to the second ADC input. The ADC outputs a signal indicative of a value of the second resistance.
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公开(公告)号：US20190162759A1
公开(公告)日：2019-05-30
申请号：US16262521
申请日：2019-01-30
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Vanni Poletto , Riccardo Miglierina , Antonio Davide Leone , Sergio Lecce
IPC: G01R19/165 , G01R31/34 , G11C27/02 , H03F3/45
CPC classification number: G01R19/1659 , G01R31/343 , G11C27/02 , H03F3/45179 , H03F2200/462
Abstract: A device measures the current in an inductive load using two separate current-measuring paths to detect the current in the inductive load. The inductive load is connected between first and second nodes, and the first node connected to a first voltage. The device includes first and second transistors cascaded together between the first node and a third node that is connected to a second voltage. First and second sense amplifiers measure the current in the inductive load. The first and second sense amplifiers are connected to at least one terminal of the first and second transistors. Two blocks sample and hold signals from the first and second sense amplifiers, which represent, respectively, the currents in the two separate current-measuring paths. The two currents are subtracted in a comparison node for generating an error signal that is compared with a predefined window and if outside the window a failure signal is generated.
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