METHOD FOR CONTROLLING BW SLA IN NVMe oF ETHERNET SSD STORAGE SYSTEM

    公开(公告)号:US20230133604A1

    公开(公告)日:2023-05-04

    申请号:US18092432

    申请日:2023-01-02

    Abstract: An Ethernet solid-state drive (eSSD) system includes a plurality of eSSDs, an Ethernet switch and a baseboard management controller. The Ethernet switch is coupled to each of the eSSDs, and the baseboard management controller is coupled to the each of the eSSDs and to the Ethernet switch. The baseboard management controller controls the Ethernet switch to provide to each eSSD a corresponding predetermined bandwidth that is based on bandwidth information for the eSSD that is stored in a policy table of the baseboard management controller. The at least one predetermined bandwidth may include a predetermined ingress bandwidth and a predetermined egress bandwidth for the corresponding eSSD. The at least one predetermined bandwidth may be based on a service level associated with the corresponding eSSD, and may be adaptively based on operating parameters of the corresponding eSSD.

    EDGE SOLID STATE DRIVE (SSD) DEVICE AND EDGE DATA SYSTEM

    公开(公告)号:US20210389909A1

    公开(公告)日:2021-12-16

    申请号:US16994552

    申请日:2020-08-14

    Abstract: Various aspects include an edge SSD device. The edge SSD device includes non-volatile memory circuits. The edge SSD device includes one or more memory controllers to operate the non-volatile memory circuits. The edge SSD device includes wireless transceivers. The edge SSD device includes a data processor configured to aggregate data received from remote sensor devices using the wireless transceivers into aggregated data. The data processor may process and/or filter the aggregated data into processed and/or filtered data, and may cause the aggregated data to be stored by the one or more memory controllers to the volatile memory circuits. The data processor may cause the processed and/or filtered data to be transmitted using the wireless transceivers.

    HIGH-SPEED DATA TRANSFERS THROUGH STORAGE DEVICE CONNECTORS

    公开(公告)号:US20200301618A1

    公开(公告)日:2020-09-24

    申请号:US16745332

    申请日:2020-01-16

    Abstract: Data storage systems, devices and methods may use a switch board configured to communicate using a high-speed multi-level signaling protocol, and a midplane having one or more multi-protocol storage device connectors configured to couple the midplane to one or more storage devices, wherein the midplane may be coupled to the switch board and configured to enable the one or more storage devices to communicate with the switch board through the one or more multi-protocol storage device connectors using the high-speed multi-level signaling protocol. The midplane may be coupled to the switch board through one or more high-speed connectors. One or more re-timers may be coupled between one or more of the high-speed connectors and one or more of the multi-protocol storage device connectors. One or more cables may be used to transfer data to and from the multi-protocol storage device connectors.

    SYSTEM AND METHOD FOR OPTIMIZING PERFORMANCE OF A SOLID-STATE DRIVE USING A DEEP NEURAL NETWORK

    公开(公告)号:US20190317901A1

    公开(公告)日:2019-10-17

    申请号:US16012470

    申请日:2018-06-19

    Abstract: A controller of a data storage device includes: a host interface providing an interface to a host computer; a flash translation layer (FTL) translating a logical block address (LBA) to a physical block address (PBA) associated with an input/output (I/O) request; a flash interface providing an interface to flash media to access data stored on the flash media; and one or more deep neural network (DNN) modules for predicting an I/O access pattern of the host computer. The one or more DNN modules provide one or more prediction outputs to the FTL that are associated with one or more past I/O requests and a current I/O request received from the host computer, and the one or more prediction outputs include at least one predicted I/O request following the current I/O request. The FTL prefetches data stored in the flash media that is associated with the at least one predicted I/O request.

    TWO-HEADED SWITCH INCLUDING A DRIVE BAY FOR FABRIC-ATTACHED DEVICES

    公开(公告)号:US20180048592A1

    公开(公告)日:2018-02-15

    申请号:US15280842

    申请日:2016-09-29

    CPC classification number: H04L49/30 H04L49/351 H04L49/356

    Abstract: A switch includes a chassis, a drive bay including a plurality of downlink switch ports that are configured to be connected to a plurality of storage devices, a plurality of uplink switch ports, and an embedded circuit for providing signal switching between the plurality of uplink switch ports and the plurality of downlink switch ports. The drive bay is disposed on a first side of the chassis, and the plurality of uplink switch ports are disposed on a second side of the chassis that is opposite to the first side of the chassis. The plurality of downlink switch ports is embedded in the drive bay.

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