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公开(公告)号:US12014977B2
公开(公告)日:2024-06-18
申请号:US18199824
申请日:2023-05-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ji-Seok Hong , Dongwoo Kim , Hyunah Kim , Un-Byoung Kang , Chungsun Lee
IPC: H01L21/00 , H01L21/48 , H01L23/31 , H01L23/498
CPC classification number: H01L23/49838 , H01L21/4857 , H01L23/3128 , H01L23/49816 , H01L23/49822
Abstract: Disclosed are interconnection structures, semiconductor packages including the same, and methods of fabricating the same. The interconnection structure comprises a first dielectric layer, a wiring pattern formed in the first dielectric layer, a portion of the wiring pattern exposed with respect to a top surface of the first dielectric layer, a second dielectric layer on the first dielectric layer, the second dielectric layer including an opening that exposes the exposed portion of the wiring pattern, a pad formed in the opening of the second dielectric layer, the pad including a base part that covers the exposed portion of the wiring pattern at a bottom of the opening and a sidewall part that extends upwardly along an inner lateral surface of the opening from the base part, a first seed layer interposed between the second dielectric layer and a first lateral surface of the sidewall part, the first seed layer being in contact with the first lateral surface and the second dielectric layer, and a second seed layer that conformally covers a second lateral surface of the sidewall part and a top surface of the base part, the second lateral surface being opposite to the first lateral surface the second dielectric layer.
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公开(公告)号:US11688778B2
公开(公告)日:2023-06-27
申请号:US17141513
申请日:2021-01-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ryong Ha , Dongwoo Kim , Gyeom Kim , Yong Seung Kim , Pankwi Park , Seung Hun Lee
IPC: H01L29/417 , H01L29/423 , H01L29/10
CPC classification number: H01L29/41758 , H01L29/1033 , H01L29/42356
Abstract: A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.
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公开(公告)号:US11688679B2
公开(公告)日:2023-06-27
申请号:US17324569
申请日:2021-05-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ji-Seok Hong , Dongwoo Kim , Hyunah Kim , Un-Byoung Kang , Chungsun Lee
IPC: H01L23/48 , H01L23/498 , H01L21/48 , H01L23/31
CPC classification number: H01L23/49838 , H01L21/4857 , H01L23/3128 , H01L23/49816 , H01L23/49822
Abstract: Disclosed are interconnection structures, semiconductor packages including the same, and methods of fabricating the same. The interconnection structure comprises a first dielectric layer, a wiring pattern formed in the first dielectric layer, a portion of the wiring pattern exposed with respect to a top surface of the first dielectric layer, a second dielectric layer on the first dielectric layer, the second dielectric layer including an opening that exposes the exposed portion of the wiring pattern, a pad formed in the opening of the second dielectric layer, the pad including a base part that covers the exposed portion of the wiring pattern at a bottom of the opening and a sidewall part that extends upwardly along an inner lateral surface of the opening from the base part, a first seed layer interposed between the second dielectric layer and a first lateral surface of the sidewall part, the first seed layer being in contact with the first lateral surface and the second dielectric layer, and a second seed layer that conformally covers a second lateral surface of the sidewall part and a top surface of the base part, the second lateral surface being opposite to the first lateral surface the second dielectric layer.
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公开(公告)号:US11616381B2
公开(公告)日:2023-03-28
申请号:US16870735
申请日:2020-05-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hojong Kim , Dongwoo Kim
Abstract: An electronic device includes a first battery, a second battery, a power management integrated circuit, a memory, and a processor. The memory is configured to store information on a first full-charging voltage value of the first battery and a second full-charging voltage value of the second battery. The processor is configured to detect whether the electronic device is connected to an external electronic device for supplying power to the first battery or the second battery. When the first full-charging voltage value is higher than the second full-charging voltage value the processor is configured to, electrically connect the first battery to the power management integrated circuit and electrically disconnect the second battery from the power management integrated circuit. The processor is further configured to charge the first battery electrically connected to the power management integrated circuit based on power obtained from the external electronic device.
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公开(公告)号:US11598933B2
公开(公告)日:2023-03-07
申请号:US16655520
申请日:2019-10-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongwoo Kim , Changhan Kim
IPC: G02B13/00 , G02B5/20 , G01C3/08 , G02B9/34 , H04N5/225 , G02B9/60 , H04N5/235 , G06T7/586 , H04N5/232 , G06V20/10 , G06V40/10
Abstract: A disclosed lens assembly may include at least four lenses sequentially arranged along an optical axis from a subject to an image sensor. Among the at least four lenses, a first lens disposed closest to the subject may have a visible light transmittance ranging from 0% to 5%, and, among subject-side surfaces and image-sensor-side surfaces of remaining lenses other than the first lens, at least four surfaces may include an inflection point. The lens assembly or an electronic device including the lens assembly may be variously implemented according to embodiments.
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公开(公告)号:US20220301125A1
公开(公告)日:2022-09-22
申请号:US17672110
申请日:2022-02-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Chansik PARK , Dongwoo Kim , Jeehong Kim , Wonjun Roh , Hyuntaek Lee , Donghyun Yeom
IPC: G06T5/00
Abstract: A method and electronic device are provided for providing a high dynamic range (HDR) image. The HDR image is obtained. A first area, in which the HDR image is displayed, and a second area, in which an image is displayed, are identified within a screen. The first area is white point-processed based on a first white point, and the second are is white point-processed based on a second white point that is set for a display of the electronic device and different from the first white point. The screen including the white point-processed first area and the white point-processed second area is displayed on the display.
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公开(公告)号:US20210151319A1
公开(公告)日:2021-05-20
申请号:US17006799
申请日:2020-08-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Gyeom Kim , Dongwoo Kim , Jihye Yi , JinBum Kim , Sangmoon Lee , Seunghun Lee
IPC: H01L21/02 , H01L21/285 , H01L21/768 , H01L21/8234 , H01L29/08 , H01L29/165 , H01L29/417 , H01L29/66
Abstract: A semiconductor device is provided. The semiconductor device includes: an active region on a semiconductor substrate; a channel region on the active region; a source/drain region adjacent to the channel region on the active region; a gate structure overlapping the channel region, on the channel region; a contact structure on the source/drain region; a gate spacer between the contact structure and the gate structure; and a contact spacer surrounding a side surface of the contact structure. The source/drain region includes a first epitaxial region having a recessed surface and a second epitaxial region on the recessed surface of the first epitaxial region, and the second epitaxial region includes an extended portion, extended from a portion overlapping the contact structure in a vertical direction, in a horizontal direction and overlapping the contact spacer in the vertical direction.
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公开(公告)号:US10735390B2
公开(公告)日:2020-08-04
申请号:US15519508
申请日:2015-10-15
Applicant: Samsung Electronics Co., Ltd
Inventor: Jaehwan Kim , Junghun Kim , Jinwoo Lee , Yongjoon Jeon , Bokun Choi , Jongmu Choi , Dongeup Ham , Dongwoo Kim , Sangmi Park
Abstract: In an authentication method according to an embodiment, an electronic device receives an authentication request message based on identification information from a server apparatus. In response to the authentication request message, the electronic device receives at least one of an input for authentication approval of a specific device and an input for authentication approval of a service offered through the specific device. Then, in response to the input, the electronic device transmits authentication approval information to the server apparatus.
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公开(公告)号:US09998959B2
公开(公告)日:2018-06-12
申请号:US14662883
申请日:2015-03-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunggi Baek , Jiyeon Lee , Jonghwa Choi , Dongwoo Kim , Jinhong Seol , Changhwan Lee , Yonggil Han
CPC classification number: H04W36/0022 , H04L65/1006 , H04L65/1016 , H04L65/1069 , H04L65/1076 , H04L65/1096 , H04W4/16
Abstract: A method of providing call services for an electronic device is provided. The method may include receiving a call request from the user; determining whether the call request is a request for a call via an Internet Protocol (IP) Multimedia System (IMS) network; making, when it is determined that the call request is a request for a call via an IMS network, an attempt to set up the call via the IMS network; determining whether the attempt for the call setup via the IMS network is successful; and performing Circuit Switched Fallback (CSFB) when it is determined that the attempt for the call setup via the IMS network is unsuccessful.
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公开(公告)号:US09773908B2
公开(公告)日:2017-09-26
申请号:US15138914
申请日:2016-04-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongwoo Kim , Seunghun Lee , Sunjung Kim , Hyunjung Lee , Bonyoung Koo
IPC: H01L21/02 , H01L29/78 , H01L29/08 , H01L29/165
CPC classification number: H01L29/7848 , H01L29/0847 , H01L29/165 , H01L29/7853
Abstract: A semiconductor device can include a substrate and a fin body that protrudes from a surface of the substrate. The fin body can include a lower portion having a first lattice structure and an upper portion, separated from the lower portion by a boundary, the upper portion having a second lattice structure that is different than the first lattice structure. An epitaxially grown epitxial layer can be on the lower and upper portions.
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