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公开(公告)号:US20240206159A1
公开(公告)日:2024-06-20
申请号:US18454105
申请日:2023-08-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyunjung Lee , Dongsik Kong , Junsoo Kim , Junbum Lee , Jinseong Lee
IPC: H10B12/00
CPC classification number: H10B12/488 , H10B12/053 , H10B12/34
Abstract: Integrated circuit devices may include a substrate including a word line trench extending longitudinally in a first horizontal direction, a gate dielectric film extending along an inner surface of the word line trench, a word line in a lower portion of the word line trench on the gate dielectric film and extending longitudinally in the first horizontal direction, and an insulating capping pattern in an upper portion of the word line trench on the word line and extending longitudinally in the first horizontal direction. The word line may include a work-function control conductive plug including a conductive metal nitride that include a metal dopant, and the work-function control conductive plug includes a top surface in contact with a bottom surface of the insulating capping pattern, a sidewall in contact with the gate dielectric film, and a bottom surface in contact with a monolithic layer.
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公开(公告)号:US09837500B2
公开(公告)日:2017-12-05
申请号:US15002379
申请日:2016-01-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyunjung Lee , Keumseok Park , Jinyeong Joe , Yong-Suk Tak
IPC: H01L29/417 , H01L23/535 , H01L29/78
CPC classification number: H01L29/41791 , H01L29/785
Abstract: Provided is a semiconductor device. In some examples, the semiconductor device includes an fin active region protruding from a substrate, gate patterns disposed on the fin active region, a source/drain region disposed on the fin active region between the gate patterns, and contact patterns disposed on the source/drain region. The source/drain region may have a protruding middle section, which may form a wave-shaped upper surface of the source/drain region.
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公开(公告)号:US12119210B2
公开(公告)日:2024-10-15
申请号:US17213017
申请日:2021-03-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joohee Kim , Hyunjung Lee , Sungwook Jung , Sunho Kim , Sungjin Kim , Jungwook Kim , Hosun Yoo
IPC: H01J37/32
CPC classification number: H01J37/32532 , H01J37/32642
Abstract: A fastening automation apparatus for an upper electrode of an etching facility includes a ring, and a plurality of fastening modules movably secured to the ring and configured to be movable in a radial direction on the ring. Each fastening module includes a first frame that is movable in a radial direction on the ring, a driving source installed below the first frame, a driving shaft that transmits a driving force from the driving source, a power transmission unit connected to the driving shaft, and a fastening bit connected to the power transmission unit and configured to be rotated. The plurality of fastening modules are configured to operate simultaneously to install the upper electrode in the etching facility.
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公开(公告)号:US20230328968A1
公开(公告)日:2023-10-12
申请号:US18116537
申请日:2023-03-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Eunbin Seon , Jonghyun Kim , Hyunjung Lee , Dohyung Kim
IPC: H10B12/00
CPC classification number: H10B12/485 , H10B12/482
Abstract: A semiconductor device includes a metal silicide layer on a substrate, and a contact plug structure on the metal silicide layer. The contact plug structure includes a metal pattern including a first metal, and a first barrier pattern covering a lower surface and a sidewall of the metal pattern and contacting the metal silicide layer. The first barrier pattern includes a second metal. The metal silicide layer includes silicon, the second metal, and a third metal different from the second metal.
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公开(公告)号:US11424202B2
公开(公告)日:2022-08-23
申请号:US16674056
申请日:2019-11-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Bowo Choi , Youngtak Kim , Sangjine Park , Suji Kim , Jaeuk Shin , Hyunjung Lee , Jihun Cheon
IPC: H01L27/108 , H01L23/00
Abstract: A semiconductor device includes a landing pad, a first insulating pattern in contact with a lower portion of a side surface of the landing pad, a pad oxide layer having a lateral portion disposed on a portion of an upper surface of the landing pad and a vertical portion in contact with an upper portion of the side surface of the landing pad, a second insulating pattern in contact with an upper surface of the first insulating pattern and covering the first insulating pattern and the pad oxide layer, and a lower electrode that vertically passes through the second insulating pattern and is in contact with a portion of the upper surface and an upper portion of a side surface of the landing pad.
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公开(公告)号:US20220068609A1
公开(公告)日:2022-03-03
申请号:US17213017
申请日:2021-03-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joohee Kim , Hyunjung Lee , Sungwook Jung , Sunho Kim , Sungjin Kim , Jungwook Kim , Hosun Yoo
IPC: H01J37/32
Abstract: A fastening automation apparatus for an upper electrode of an etching facility includes a ring, and a plurality of fastening modules movably secured to the ring and configured to be movable in a radial direction on the ring. Each fastening module includes a first frame that is movable in a radial direction on the ring, a driving source installed below the first frame, a driving shaft that transmits a driving force from the driving source, a power transmission unit connected to the driving shaft, and a fastening bit connected to the power transmission unit and configured to be rotated. The plurality of fastening modules are configured to operate simultaneously to install the upper electrode in the etching facility.
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公开(公告)号:US09991257B2
公开(公告)日:2018-06-05
申请号:US15013969
申请日:2016-02-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Miseon Park , Jongryeol Yoo , Hyunjung Lee , Yong-Suk Tak , Bonyoung Koo , Sunjung Kim
IPC: H01L27/088 , H01L29/06 , H01L29/161 , H01L29/08 , H01L29/417 , H01L21/8234
CPC classification number: H01L27/0886 , H01L21/823425 , H01L21/823431 , H01L29/0649 , H01L29/0847 , H01L29/161 , H01L29/41791
Abstract: A semiconductor device may include fin active regions extending parallel to each other on a substrate, an isolation region between the fin active regions, gate patterns intersecting the fin active regions and extending parallel to each other, source/drain areas on the fin active regions between the gate patterns and fin active region spacers contacting side surfaces of the fin active regions and formed over a surface of the isolation region between the fin active regions. Uppermost levels of the fin active region spacers may be higher than interfaces between the fin active regions and the source/drain areas. The upper surface of the isolation region may be lower than bottom surfaces of the source/drain areas.
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公开(公告)号:US09773908B2
公开(公告)日:2017-09-26
申请号:US15138914
申请日:2016-04-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongwoo Kim , Seunghun Lee , Sunjung Kim , Hyunjung Lee , Bonyoung Koo
IPC: H01L21/02 , H01L29/78 , H01L29/08 , H01L29/165
CPC classification number: H01L29/7848 , H01L29/0847 , H01L29/165 , H01L29/7853
Abstract: A semiconductor device can include a substrate and a fin body that protrudes from a surface of the substrate. The fin body can include a lower portion having a first lattice structure and an upper portion, separated from the lower portion by a boundary, the upper portion having a second lattice structure that is different than the first lattice structure. An epitaxially grown epitxial layer can be on the lower and upper portions.
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公开(公告)号:US20250118540A1
公开(公告)日:2025-04-10
申请号:US18768778
申请日:2024-07-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyunjung Lee , Yongjoo Cho , Sunho Kim , Woojae Kim
IPC: H01J37/32
Abstract: A dimple plate precision adjustment device includes a dimple carrier assembled on a cylindrical dimple plate and capable of transporting the cylindrical dimple plate; a dimple spacer capable of mounting the dimple carrier assembled on the dimple plate; and a plurality of gap measurers installed on the dimple spacer to be spaced apart from each other. The dimple carrier, the dimple spacer, and the gap measurers assembled on the dimple plate are installed in a body of a chamber where an antenna electrode is installed, and the gap measurers measure a gap between the gap measurers and the dimple carrier.
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