SEMICONDUCTOR DEVICE
    43.
    发明申请

    公开(公告)号:US20220085427A1

    公开(公告)日:2022-03-17

    申请号:US17420536

    申请日:2020-01-06

    Abstract: A semiconductor device that inhibits deterioration of a secondary battery is provided. The semiconductor device includes a secondary battery module and a first circuit. The secondary battery module includes a secondary battery and a sensor. The first circuit includes a variable resistor. The sensor has a function of measuring a temperature of the secondary battery. The first circuit has a function of judging the charge voltage of the secondary battery and outputting a first result; a function of judging the temperature of the secondary battery measured by the sensor and outputting a second result; a function of determining the magnitude of the variable resistor on the basis of the first result and the second result; a function of discharging the charge voltage through the variable resistor; and a function of stopping discharge when the charge voltage reaches a specified voltage.

    SEMICONDUCTOR DEVICE AND BATTERY PACK

    公开(公告)号:US20220006309A1

    公开(公告)日:2022-01-06

    申请号:US17292218

    申请日:2019-11-12

    Abstract: A semiconductor device with reduced power consumption is provided. The semiconductor device includes a node ND1, a node ND2, a resistor, a capacitor, and a comparison circuit. The resistor is electrically connected in series between one of a positive electrode and a negative electrode of a secondary battery and a first terminal. The resistor has a function of converting current flowing between the one of the positive electrode and the negative electrode of the secondary battery and the first terminal into a first voltage. The first voltage is added to a voltage of the node ND2 through the capacitor. The comparison circuit has a function of comparing a voltage of the node ND1 and the voltage of the node ND2. The comparison circuit outputs a signal that notifies detection of overcurrent when the voltage of the node ND2 is higher than the voltage of the node ND1.

    POWER STORAGE DEVICE AND METHOD FOR OPERATING POWER STORAGE DEVICE

    公开(公告)号:US20210384751A1

    公开(公告)日:2021-12-09

    申请号:US17286088

    申请日:2019-10-16

    Abstract: A battery control circuit with a novel structure, a battery protection circuit with a novel structure, and a power storage device including either of the battery circuits are provided. The power storage device includes a first circuit portion, a second circuit portion, a third circuit portion, and a secondary battery; the first circuit portion has a function of controlling charging of the secondary battery; the first circuit portion has a function of supplying the start time and the end time of the charging of the secondary battery to the third circuit portion; the second circuit portion has functions of generating a first voltage and a first current and supplying them to the third circuit portion; the third circuit portion has a function of generating a second voltage by charging the first current in a capacitor; and the third circuit portion has a function of comparing the first voltage and the second voltage.

    DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE

    公开(公告)号:US20210210512A1

    公开(公告)日:2021-07-08

    申请号:US17187928

    申请日:2021-03-01

    Abstract: A display device with high resolution is provided. A display device with high display quality is provided. A display device includes a display portion, a first terminal group, and a second terminal group. The display portion includes pixels, scan lines, and signal lines. The first terminal group and the second terminal group are apart from each other. The first terminal group includes first terminals and the second terminal group includes second terminals. The scan lines are each electrically connected to the pixels arranged in a row direction. The signal lines are each electrically connected to the pixels arranged in a column direction. The signal lines are each electrically connected to the first terminal or the second terminal. The display portion includes a first region where the signal lines electrically connected to the first terminals and the signal lines electrically connected to the second terminals are mixed.

    POWER STORAGE DEVICE AND METHOD FOR CHARGING THE SAME

    公开(公告)号:US20210135472A1

    公开(公告)日:2021-05-06

    申请号:US17140350

    申请日:2021-01-04

    Abstract: A decrease in the capacity of a power storage device is inhibited by adjusting or reducing imbalance in the amount of inserted and extracted carrier ions between positive and negative electrodes, which is caused by decomposition of an electrolyte solution of the negative electrode. Further, the capacity of the power storage device can be restored. Furthermore, impurities in the electrolyte solution can be decomposed with the use of the third electrode. A power storage device including positive and negative electrodes, an electrolyte, and a third electrode is provided. The third electrode has an adequate electrostatic capacitance. The third electrode can include a material with a large surface area. In addition, a method for charging the power storage device including the steps of performing charging by applying a current between the positive and negative electrodes, and performing additional applying a current between the third electrode and the negative electrode is provided.

    DISPLAY DEVICE
    50.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20200218123A1

    公开(公告)日:2020-07-09

    申请号:US16821174

    申请日:2020-03-17

    Abstract: To achieve a display device that is suitable for increasing in size and to provide a high-resolution display device. In the display device, three or more adjacent gate lines are supplied with the same selection signal. Three or more pixels that adjoin in the column direction are connected to different source lines. In each of the pixels, a transistor including a semiconductor layer is disposed. An inner source line among three or more source lines is disposed to overlap with a conductive layer that functions as a pixel electrode. Part of the semiconductor layer of the transistor is provided between the outer source line and a source line adjacent to the outer source line.

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