公开(公告)号：US07538011B2

公开(公告)日：2009-05-26

申请号：US11882907

申请日：2007-08-07

申请人： Shunpei Yamazaki ,  Osama Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Koji Dairiki ,  Toru Mitsuki ,  Toru Takayama ,  Hideto Ohnuma ,  Taketomi Asami ,  Mitsuhiro Ichijo

发明人： Shunpei Yamazaki ,  Osama Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Koji Dairiki ,  Toru Mitsuki ,  Toru Takayama ,  Hideto Ohnuma ,  Taketomi Asami ,  Mitsuhiro Ichijo

IPC分类号： H01L21/322

CPC分类号： H01L29/66757 ,  G02F1/13454 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78675 ,  H01L29/78678

摘要： An object is to reduce the number of high temperature (equal to or greater than 600° C.) heat treatment process steps and achieve lower temperature (equal to or less than 600° C.) processes, and to simplify the process steps and increase throughput in a method of manufacturing a semiconductor device. With the present invention, a barrier layer, a second semiconductor film, and a third semiconductor film containing a noble (rare) gas element are formed on a first semiconductor film having a crystalline structure. Gettering is performed and a metallic element contained in the first semiconductor film passes through the barrier layer and the second semiconductor film by a heat treatment process, and moves to the third semiconductor film. The second semiconductor film and the third semiconductor film are then removed, with the barrier layer used as an etching stopper.

摘要翻译： 目的是减少高温（等于或高于600℃）的热处理工艺步骤，达到较低的温度（等于或小于600℃）的工艺，并简化工艺步骤并增加 在制造半导体器件的方法中的吞吐量。 通过本发明，在具有结晶结构的第一半导体膜上形成有阻挡层，第二半导体膜和含有贵重（稀有）气体元素的第三半导体膜。 进行吸气，并且包含在第一半导体膜中的金属元素通过热处理工艺通过阻挡层和第二半导体膜，并移动到第三半导体膜。 然后去除第二半导体膜和第三半导体膜，其中阻挡层用作蚀刻停止层。

公开(公告)号：US07368335B2

公开(公告)日：2008-05-06

申请号：US11380147

申请日：2006-04-25

申请人： Taketomi Asami ,  Mitsuhiro Ichijo ,  Satoshi Toriumi ,  Takashi Ohtsuki ,  Toru Mitsuki ,  Kenji Kasahara ,  Tamae Takano ,  Chiho Kokubo ,  Shunpei Yamazaki ,  Takeshi Shichi

发明人： Taketomi Asami ,  Mitsuhiro Ichijo ,  Satoshi Toriumi ,  Takashi Ohtsuki ,  Toru Mitsuki ,  Kenji Kasahara ,  Tamae Takano ,  Chiho Kokubo ,  Shunpei Yamazaki ,  Takeshi Shichi

IPC分类号： H01L21/84

CPC分类号： H01L29/045 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02609 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02675 ,  H01L27/12 ,  H01L27/1277 ,  H01L27/1285 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78666 ,  H01L29/78684 ,  H01L2029/7863

摘要： The orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film through heat treatment and irradiation of intense light such as laser light, ultraviolet rays, or infrared rays is enhanced, and a semiconductor device whose active region is formed from the crystalline semiconductor film and a method of manufacturing the semiconductor device are provided. In a semiconductor film containing silicon and germanium as its ingredient and having a crystal structure, the {101} plane reaches 30% or more of all the lattice planes detected by Electron backscatter diffraction. This semiconductor film is obtained by forming an amorphous semiconductor film containing silicon and germanium as its ingredient through plasma CVD in which hydride, fluoride, or chloride gas of a silicon atom is used, the repetition frequency is set to 10 kHz or less, and the duty ratio is set to 50% or less for intermittent electric discharge or pulsed electric discharge, and introducing an element for promoting crystallization of the amorphous semiconductor film to the surface thereof to crystallize the amorphous semiconductor film while utilizing the introduced element.

摘要翻译： 通过热处理使激光，紫外线或红外线等强光照射而使非晶半导体膜结晶而得到的结晶半导体膜的取向比提高，并且有源区由结晶半导体形成 膜和制造半导体器件的方法。 在含有硅和锗作为其成分且具有晶体结构的半导体膜中，{101}面达到通过电子反向散射衍射检测的所有晶格面的30％以上。 该半导体膜通过使用其中使用硅原子的氢化物，氟化物或氯化物气体，重复频率设定为10kHz以下的等离子体CVD形成含有硅和锗作为其成分的非晶半导体膜， 对于间歇放电或脉冲放电，占空比被设定为50％以下，并且在其表面引入促进非晶半导体膜的结晶化的元素，从而使非晶半导体膜在利用引入元素的同时结晶。

公开(公告)号：US07160784B2

公开(公告)日：2007-01-09

申请号：US10081767

申请日：2002-02-25

申请人： Shunpei Yamazaki ,  Toru Mitsuki ,  Tamae Takano

发明人： Shunpei Yamazaki ,  Toru Mitsuki ,  Tamae Takano

IPC分类号： H01L21/00

CPC分类号： H01L29/66757

摘要： When a laser beam is irradiated onto a semiconductor film, a steep temperature gradient is produced between a substrate and the semiconductor film. For this reason, the semiconductor film contracts, so that a warp in the film occurs. Therefore, the quality of a resulting crystalline semiconductor film sometimes deteriorates. According to the present invention, it is characterized in that, after laser beam crystallization on the semiconductor film, heat treatment is carried out so as to reduce the warp in the film. Since the substrate contracts by the heat treatment, the warp in the semiconductor film is lessened, so that the physical properties of the semiconductor film can be improved.

摘要翻译： 当激光束照射到半导体膜上时，在衬底和半导体膜之间产生陡峭的温度梯度。 为此，半导体膜收缩，从而发生膜的翘曲。 因此，所得到的结晶半导体膜的质量有时会劣化。 根据本发明，其特征在于，在半导体膜上的激光束结晶之后，进行热处理以减少膜中的翘曲。 由于基板通过热处理而收缩，因此半导体膜中的翘曲减小，从而可以提高半导体膜的物理性能。

公开(公告)号：US06828587B2

公开(公告)日：2004-12-07

申请号：US09880089

申请日：2001-06-14

申请人： Shunpei Yamazaki ,  Toru Mitsuki ,  Kenji Kasahara ,  Taketomi Asami ,  Tamae Takano ,  Takeshi Shichi ,  Chiho Kokubo

发明人： Shunpei Yamazaki ,  Toru Mitsuki ,  Kenji Kasahara ,  Taketomi Asami ,  Tamae Takano ,  Takeshi Shichi ,  Chiho Kokubo

IPC分类号： H01L2904

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022 ,  H01L21/2026 ,  H01L27/1255 ,  H01L27/1266 ,  H01L27/1277 ,  H01L29/045 ,  H01L29/66757 ,  H01L29/78684

摘要： Crystal orientation planes exist randomly in a crystalline silicon film manufactured by a conventional method, and the orientation ratio is low with respect to a specific crystal orientation. A semiconductor film having a high orientation ratio for the {101} lattice plane is obtained if crystallization of an amorphous semiconductor film, which has silicon as its main constituent and contains from 0.1 to 10 atom % germanium, is performed after introduction of a metal element. A TFT is manufactured utilizing the semiconductor film.

摘要翻译： 晶体取向面随机地存在于通过常规方法制造的晶体硅膜中，并且取向比相对于特定的晶体取向低。 如果在引入金属元素之后进行以硅为主要成分并含有0.1〜10原子％的锗的非晶半导体膜的结晶化，则获得{101}晶格面的取向比高的半导体膜。 。 利用半导体膜制造TFT。

公开(公告)号：US06506636B2

公开(公告)日：2003-01-14

申请号：US09851492

申请日：2001-05-09

申请人： Shunpei Yamazaki ,  Taketomi Asami ,  Mitsuhiro Ichijo ,  Toru Mitsuki ,  Yoko Kanakubo

发明人： Shunpei Yamazaki ,  Taketomi Asami ,  Mitsuhiro Ichijo ,  Toru Mitsuki ,  Yoko Kanakubo

IPC分类号： H01L2100

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/12 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78684 ,  H01L2029/7863 ,  Y10T29/41

摘要： Contamination of an interface of respective films constituting a TFT due to an contaminant impurity in a clean room atmosphere becomes a great factor to lower the reliability of the TFT. Besides, when an impurity is added to a crystalline semiconductor film, its crystal structure is broken. By using an apparatus for manufacturing a semiconductor device including a plurality of treatment chambers, a treatment can be made without being exposed to a clean room atmosphere in an interval between respective treatment steps, and it becomes possible to keep the interface of the respective films constituting the TFT clean. Besides, by carrying out crystallization after an impurity is added to an amorphous semiconductor film, the breakdown of the crystal structure of the crystalline semiconductor film is prevented.

摘要翻译： 在洁净室气氛中由于污染物杂质构成TFT的各个膜的界面的污染成为降低TFT的可靠性的重要因素。 此外，当杂质添加到结晶半导体膜时，其晶体结构破裂。 通过使用用于制造包括多个处理室的半导体器件的设备，可以在各处理步骤之间的间隔中进行处理而不会暴露于洁净室气氛，并且可以保持构成的各个膜的界面 TFT清洁。 此外，通过在向非晶半导体膜添加杂质之后进行结晶化，可以防止结晶半导体膜的晶体结构的破坏。

公开(公告)号：US07503975B2

公开(公告)日：2009-03-17

申请号：US09892225

申请日：2001-06-25

申请人： Shunpei Yamazaki ,  Toru Mitsuki ,  Kenji Kasahara ,  Taketomi Asami ,  Tamae Takano ,  Takeshi Shichi ,  Chiho Kokubo

发明人： Shunpei Yamazaki ,  Toru Mitsuki ,  Kenji Kasahara ,  Taketomi Asami ,  Tamae Takano ,  Takeshi Shichi ,  Chiho Kokubo

IPC分类号： C30B1/00

CPC分类号： H01L27/1281 ,  G02F1/13454 ,  H01L27/1285 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78684 ,  Y10S117/904

摘要： In a crystalline silicon film fabricated by a related art method, the orientation planes of its crystal randomly exist and the orientation rate relative to a particular crystal orientation is low. A semiconductor material which contains silicon as its main component and 0.1-10 atomic % of germanium is used as a first layer, and an amorphous silicon film is used as a second layer. Laser light is irradiated to crystallize the amorphous semiconductor films, whereby a good semiconductor film is obtained. In addition, TFTs are fabricated by using such a semiconductor film.

公开(公告)号：US07316947B2

公开(公告)日：2008-01-08

申请号：US10072931

申请日：2002-02-12

申请人： Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Koji Dairiki ,  Toru Mitsuki ,  Toru Takayama ,  Hideto Ohnuma ,  Taketomi Asami ,  Mitsuhiro Ichijo

发明人： Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Koji Dairiki ,  Toru Mitsuki ,  Toru Takayama ,  Hideto Ohnuma ,  Taketomi Asami ,  Mitsuhiro Ichijo

IPC分类号： H01L21/00

CPC分类号： H01L29/66757 ,  G02F1/13454 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78675 ,  H01L29/78678

摘要： An object is to reduce the number of high temperature (equal to or greater than 600° C.) heat treatment process steps and achieve lower temperature (equal to or less than 600° C.) processes, and to simplify the process steps and increase throughput in a method of manufacturing a semiconductor device. With the present invention, a barrier layer, a second semiconductor film, and a third semiconductor film containing a noble (rare) gas element are formed on a first semiconductor film having a crystalline structure. Gettering is performed and a metallic element contained in the first semiconductor film passes through the barrier layer and the second semiconductor film by a heat treatment process, and moves to the third semiconductor film. The second semiconductor film and the third semiconductor film are then removed, with the barrier layer used as an etching stopper.

摘要翻译： 目的是减少高温（等于或高于600℃）的热处理工艺步骤，达到较低的温度（等于或小于600℃）的工艺，并简化工艺步骤并增加 在制造半导体器件的方法中的吞吐量。 通过本发明，在具有结晶结构的第一半导体膜上形成有阻挡层，第二半导体膜和含有贵重（稀有）气体元素的第三半导体膜。 进行吸气，并且包含在第一半导体膜中的金属元素通过热处理工艺通过阻挡层和第二半导体膜，并移动到第三半导体膜。 然后去除第二半导体膜和第三半导体膜，其中阻挡层用作蚀刻停止层。

公开(公告)号：US07196400B2

公开(公告)日：2007-03-27

申请号：US10835077

申请日：2004-04-30

申请人： Shunpei Yamazaki ,  Toru Mitsuki ,  Kenji Kasahara

发明人： Shunpei Yamazaki ,  Toru Mitsuki ,  Kenji Kasahara

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/117

CPC分类号： H01L21/0237 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02675 ,  H01L27/1277 ,  H01L27/1285 ,  H01L27/1296 ,  H01L29/04 ,  H01L29/045 ,  H01L29/78696

摘要： An object is to enhance the orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film while using as a substrate a less-heat-resistive material such as glass thereby providing a semiconductor device using a crystalline semiconductor film with high quality equivalent to a single crystal. A first crystalline semiconductor film and a second crystalline semiconductor film are formed overlying a substrate, which integrally structure a crystalline semiconductor layer. The first and second crystalline semiconductor films are polycrystalline bodies aggregated with a plurality of crystal grains. However, the crystal grains are aligned toward a (101)-plane orientation at a ratio of 30 percent or greater, preferably 80 percent or greater. Also, relying on a plane orientation of the crystal grains in the first crystalline semiconductor film, the second crystalline semiconductor film has a plane orientation also aligned in the same direction with a probability of 60 percent or higher.

摘要翻译： 目的是提高通过使非晶半导体膜结晶而获得的结晶半导体膜的取向比，同时使用诸如玻璃之类的耐热性较差的材料作为基底，从而提供使用高质量的晶体半导体膜的半导体器件，相当于 单晶。 第一晶体半导体膜和第二晶体半导体膜形成在基板上，其一体地结构化结晶半导体层。 第一和第二晶体半导体膜是与多个晶粒聚集的多晶体。 然而，晶粒以30％或更大，优选80％或更大的比例朝向（101）面平面取向。 此外，依靠第一结晶半导体膜中的晶粒的平面取向，第二结晶半导体膜的面取向也以相同方向排列，概率为60％以上。

公开(公告)号：US07169689B2

公开(公告)日：2007-01-30

申请号：US11066253

申请日：2005-02-28

申请人： Shunpei Yamazaki ,  Taketomi Asami ,  Mitsuhiro Ichijo ,  Toru Mitsuki ,  Yoko Kanakubo

发明人： Shunpei Yamazaki ,  Taketomi Asami ,  Mitsuhiro Ichijo ,  Toru Mitsuki ,  Yoko Kanakubo

IPC分类号： H01L21/205 ,  H01L21/20

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/12 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78684 ,  H01L2029/7863 ,  Y10T29/41

摘要： Contamination of an interface of respective films constituting a TFT due to an contaminant impurity in a clean room atmosphere becomes a great factor to lower the reliability of the TFT. Besides, when an impurity is added to a crystalline semiconductor film, its crystal structure is broken. By using an apparatus for manufacturing a semiconductor device including a plurality of treatment chambers, a treatment can be made without being exposed to a clean room atmosphere in an interval between respective treatment steps, and it becomes possible to keep the interface of the respective films constituting the TFT clean. Besides, by carrying out crystallization after an impurity is added to an amorphous semiconductor film, the breakdown of the crystal structure of the crystalline semiconductor film is prevented.

摘要翻译： 在洁净室气氛中由于污染物杂质构成TFT的各个膜的界面的污染成为降低TFT的可靠性的重要因素。 此外，当杂质添加到结晶半导体膜时，其晶体结构破裂。 通过使用用于制造包括多个处理室的半导体器件的设备，可以在各处理步骤之间的间隔中进行处理而不会暴露于洁净室气氛，并且可以保持构成的各个膜的界面 TFT清洁。 此外，通过在向非晶半导体膜添加杂质之后进行结晶化，可以防止结晶半导体膜的晶体结构的破坏。

公开(公告)号：US20060246638A1

公开(公告)日：2006-11-02

申请号：US11380147

申请日：2006-04-25

申请人： Taketomi Asami ,  Mitsuhiro Ichijo ,  Satoshi Toriumi ,  Takashi Ohtsuki ,  Toru Mitsuki ,  Kenji Kasahara ,  Tamae Takano ,  Chiho Kokubo ,  Shunpei Yamazaki ,  Takeshi Shichi

发明人： Taketomi Asami ,  Mitsuhiro Ichijo ,  Satoshi Toriumi ,  Takashi Ohtsuki ,  Toru Mitsuki ,  Kenji Kasahara ,  Tamae Takano ,  Chiho Kokubo ,  Shunpei Yamazaki ,  Takeshi Shichi

IPC分类号： H01L21/84

CPC分类号： H01L29/045 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02609 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02675 ,  H01L27/12 ,  H01L27/1277 ,  H01L27/1285 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78666 ,  H01L29/78684 ,  H01L2029/7863

摘要： The orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film through heat treatment and irradiation of intense light such as laser light, ultraviolet rays, or infrared rays is enhanced, and a semiconductor device whose active region is formed from the crystalline semiconductor film and a method of manufacturing the semiconductor device are provided. In a semiconductor film containing silicon and germanium as its ingredient and having a crystal structure, the {101} plane reaches 30% or more of all the lattice planes detected by Electron backscatter diffraction. This semiconductor film is obtained by forming an amorphous semiconductor film containing silicon and germanium as its ingredient through plasma CVD in which hydride, fluoride, or chloride gas of a silicon atom is used, the repetition frequency is set to 10 kHz or less, and the duty ratio is set to 50% or less for intermittent electric discharge or pulsed electric discharge, and introducing an element for promoting crystallization of the amorphous semiconductor film to the surface thereof to crystallize the amorphous semiconductor film while utilizing the introduced element.

摘要翻译： 通过热处理使激光，紫外线或红外线等强光照射而使非晶半导体膜结晶而得到的结晶半导体膜的取向比提高，并且有源区由结晶半导体形成 膜和制造半导体器件的方法。 在含有硅和锗作为其成分且具有晶体结构的半导体膜中，{101}面达到通过电子反向散射衍射检测的所有晶格面的30％以上。 该半导体膜通过使用其中使用硅原子的氢化物，氟化物或氯化物气体，重复频率设定为10kHz以下的等离子体CVD形成含有硅和锗作为其成分的非晶半导体膜， 对于间歇放电或脉冲放电，占空比被设定为50％以下，并且在其表面引入促进非晶半导体膜的结晶化的元素，从而使非晶半导体膜在利用引入元素的同时结晶。