公开(公告)号：US11804538B2

公开(公告)日：2023-10-31

申请号：US17303331

申请日：2021-05-26

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Fu-Wei Yao ,  Chen-Ju Yu ,  Fu-Chih Yang ,  Chun Lin Tsai

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/417 ,  H01L29/43 ,  H01L29/778 ,  H01L29/10 ,  H01L29/267 ,  H01L21/02

CPC classification number: H01L29/66462 ,  H01L21/02271 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/41766 ,  H01L29/432 ,  H01L29/7786 ,  H01L2924/0002

Abstract: A method of forming a high electron mobility transistor (HEMT) includes a first III-V compound layer and a second III-V compound layer disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A source feature and a drain feature are disposed on the second III-V compound layer. A p-type layer is disposed on a portion of the second III-V compound layer between the source feature and the drain feature. A gate electrode is disposed on the p-type layer. A capping layer is disposed on the second III-V compound layer.

公开(公告)号：US10961487B2

公开(公告)日：2021-03-30

申请号：US16152965

申请日：2018-10-05

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Pinlei Edmund Chu ,  Chun-Wei Hsu ,  Ling-Fu Nieh ,  Chi-Jen Liu ,  Liang-Guang Chen ,  Yi-Sheng Lin

IPC: H01L21/02 ,  H01L21/302 ,  B08B1/00 ,  C11D11/00 ,  C11D7/26 ,  H01L21/321

Abstract: A semiconductor cleaning solution for cleaning a surface of a semiconductor device, and a method of use and a method of manufacture of the cleaning solution are disclosed. In an embodiment, a material is polished away from a first surface of the semiconductor device and the first surface is cleaned with the cleaning solution. The cleaning solution may include a host having at least one ring. The host may have a hydrophilic exterior and a hydrophobic interior.

公开(公告)号：US10937691B2

公开(公告)日：2021-03-02

申请号：US16559336

申请日：2019-09-03

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia Hsuan Lee ,  Chun-Wei Hsu ,  Chia-Wei Ho ,  Chi-Hsiang Shen ,  Li-Chieh Wu ,  Jian-Ci Lin ,  Chi-Jen Liu ,  Yi-Sheng Lin ,  Yang-Chun Cheng ,  Liang-Guang Chen ,  Kuo-Hsiu Wei ,  Kei-Wei Chen

IPC: H01L21/02 ,  H01L21/768 ,  H01L21/3105 ,  C09G1/02

Abstract: Methods of forming a slurry and methods of performing a chemical mechanical polishing (CMP) process utilized in manufacturing semiconductor devices, as described herein, may be performed on semiconductor devices including integrated contact structures with ruthenium (Ru) plug contacts down to a semiconductor substrate. The slurry may be formed by mixing a first abrasive, a second abrasive, and a reactant with a solvent. The first abrasive may include a first particulate including titanium dioxide (TiO2) particles and the second abrasive may include a second particulate that is different from the first particulate. The slurry may be used in a CMP process for removing ruthenium (Ru) materials and dielectric materials from a surface of a workpiece resulting in better WiD loading and planarization of the surface for a flat profile.

公开(公告)号：US10790375B2

公开(公告)日：2020-09-29

申请号：US16394368

申请日：2019-04-25

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Fu-Wei Yao ,  Chen-Ju Yu ,  King-Yuen Wong ,  Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Chun Lin Tsai

IPC: H01L29/66 ,  H01L29/45 ,  H01L29/20 ,  H01L29/205 ,  H01L21/02 ,  H01L21/285 ,  H01L29/778 ,  H01L29/08 ,  H01L29/417

Abstract: A high electron mobility transistor (HEMT) includes a first compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A salicide source feature and a salicide drain feature are in contact with the first III-V compound layer through the second III-V compound layer. A gate electrode is disposed over a portion of the second compound layer between the salicide source feature and the salicide drain feature.

公开(公告)号：US20200090997A1

公开(公告)日：2020-03-19

申请号：US16686682

申请日：2019-11-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ling-Fu Nieh ,  Chun-Wei Hsu ,  Pinlei Edmund Chu ,  Chi-Jen Liu ,  Liang-Guang Chen ,  Yi-Sheng Lin

IPC: H01L21/768 ,  H01L21/02 ,  H01L29/78 ,  H01L29/417 ,  H01L21/321 ,  H01L21/8238 ,  H01L23/485 ,  H01L29/08 ,  C09G1/02

Abstract: A method of manufacturing a device includes exposing at least one of a source/drain contact plug or a gate contact plug to a metal ion source solution during a manufacturing process, wherein a constituent metal of a metal ion in the metal ion source solution and the at least one source/drain contact plug or gate contact plug is the same. If the source/drain contact plug or the gate contact plug is formed of cobalt, the metal ion source solution includes a cobalt ion source solution. If the source/drain contact plug or the gate contact plug is formed of tungsten, the metal ion source solution includes a tungsten ion source solution.

公开(公告)号：US10276682B2

公开(公告)日：2019-04-30

申请号：US15990241

申请日：2018-05-25

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Fu-Wei Yao ,  Chen-Ju Yu ,  King-Yuen Wong ,  Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Chun Lin Tsai

IPC: H01L29/66 ,  H01L29/45 ,  H01L29/20 ,  H01L29/205 ,  H01L21/02 ,  H01L21/285 ,  H01L29/417 ,  H01L29/778 ,  H01L29/08

Abstract: A high electron mobility transistor (HEMT) includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A salicide source feature and a salicide drain feature are in contact with the first III-V compound layer through the second III-V compound layer. A gate electrode is disposed over a portion of the second III-V compound layer between the salicide source feature and the salicide drain feature.

公开(公告)号：US20190103308A1

公开(公告)日：2019-04-04

申请号：US15939894

申请日：2018-03-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Wei Hsu ,  Ling-Fu Nieh ,  Pinlei Edmund Chu ,  Chi-Jen Liu ,  Yi-Sheng Lin ,  Ting-Hsun Chang ,  Chia-Wei Ho ,  Liang-Guang Chen

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: Semiconductor devices and methods of forming are provided. In some embodiments the method includes forming a dielectric layer over a substrate and patterning the dielectric layer to form a first recess. The method may also include depositing a first layer in the first recess and depositing a second layer over the first layer, the second layer being different than the first layer. The method may also include performing a first chemical mechanical polish (CMP) process on the second layer using a first oxidizer and performing a second CMP process on remaining portions of the second layer and the first layer using the first oxidizer. The method may also include forming a first conductive element over the remaining portions of the first layer after the second CMP polish is performed.

公开(公告)号：US10115813B2

公开(公告)日：2018-10-30

申请号：US15242881

申请日：2016-08-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chen-Ju Yu ,  Chih-Wen Hsiung ,  Chun-Wei Hsu ,  Fu-Chih Yang ,  Fu-Wei Yao ,  Jiun-Lei Jerry Yu

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/40 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/06

Abstract: A semiconductor structure includes a first III-V compound layer. A second III-V compound layer is over the first III-V compound layer and is different from the first III-V compound layer in composition. A carrier channel is located at an interface of the first III-V compound layer and the second III-V compound layer. Slanted field plates are in an opening in a dielectric layer over the second III-V compound layer; the gate electrode is disposed in the opening.

公开(公告)号：US20170341201A1

公开(公告)日：2017-11-30

申请号：US15165902

申请日：2016-05-26

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Wei Hsu ,  Chi-Jen Liu ,  Liang-Guang Chen ,  Chih-Chung Chang ,  Cheng-Chun Chang ,  Hsin-Kai Chen ,  Yi-Sheng Lin ,  Shi-Ya Hsu ,  Tsung-Ju Lin ,  Yi-Sheng Ma

IPC: B24B37/32 ,  B24B37/20

CPC classification number: B24B37/32 ,  B24B37/20

Abstract: An embodiment retainer ring includes an outer ring encircling an opening and an inner ring attached to the outer ring. The inner ring is disposed between the opening and the outer ring. The inner ring includes a softer material than the outer ring and a plurality of voids within the softer material.

公开(公告)号：US09704968B2

公开(公告)日：2017-07-11

申请号：US15192889

申请日：2016-06-24

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Fu-Wei Yao ,  Chen-Ju Yu ,  Fu-Chih Yang ,  Chun Lin Tsai

IPC: H01L29/267 ,  H01L29/66 ,  H01L29/417 ,  H01L29/43 ,  H01L29/778 ,  H01L29/10 ,  H01L29/20 ,  H01L21/02

CPC classification number: H01L29/66462 ,  H01L21/02271 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/41766 ,  H01L29/432 ,  H01L29/7786 ,  H01L2924/0002

Abstract: A method of forming a high electron mobility transistor (HEMT) that includes epitaxially growing a second III-V compound layer on a first III-V compound layer. A carrier channel is located between the first III-V compound layer and the second III-V compound layer. A source feature and a drain feature are formed on the second III-V compound layer. A p-type layer is deposited on a portion of the second III-V compound layer between the source feature and the drain feature. A gate electrode is formed on a portion of the p-type layer.