公开(公告)号：US10811261B2

公开(公告)日：2020-10-20

申请号：US16003110

申请日：2018-06-08

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Ming-Wei Tsai ,  King-Yuen Wong ,  Chih-Wen Hsiung ,  Ming-Cheng Lin

IPC分类号： H01L21/22 ,  H01L21/283 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/778 ,  H01L21/28 ,  H01L21/765 ,  H01L21/768 ,  H01L21/02 ,  H01L21/285 ,  H01L21/8234 ,  H01L29/20

摘要： Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.

公开(公告)号：US10056478B2

公开(公告)日：2018-08-21

申请号：US14935342

申请日：2015-11-06

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Ming-Wei Tsai ,  King-Yuen Wong ,  Chih-Wen Hsiung ,  Ming-Cheng Lin

IPC分类号： H01L29/778 ,  H01L29/40 ,  H01L29/66 ,  H01L29/423 ,  H01L29/20

CPC分类号： H01L29/778 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/402 ,  H01L29/404 ,  H01L29/42316 ,  H01L29/66409 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7786 ,  H01L2229/00

摘要： Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.

公开(公告)号：US10002955B2

公开(公告)日：2018-06-19

申请号：US15481008

申请日：2017-04-06

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Ming-Wei Tsai ,  King-Yuen Wong ,  Chih-Wen Hsiung ,  Ming-Cheng Lin

IPC分类号： H01L29/778 ,  H01L29/66

CPC分类号： H01L29/778 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/402 ,  H01L29/404 ,  H01L29/42316 ,  H01L29/66409 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7786 ,  H01L2229/00

摘要： Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.

公开(公告)号：US09871030B2

公开(公告)日：2018-01-16

申请号：US15357308

申请日：2016-11-21

申请人： Taiwan Semiconductor Manufacturing Company, LTD.

发明人： King-Yuen Wong ,  Chun-Wei Hsu ,  Chen-Ju Yu ,  Fu-Wei Yao ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Po-Chih Chen

IPC分类号： H01L27/02 ,  H01L29/66 ,  H01L29/778 ,  H01L29/10 ,  H01L29/20 ,  H01L21/8252 ,  H01L27/06 ,  H01L21/02 ,  H01L21/265 ,  H01L21/306 ,  H01L21/768 ,  H01L21/8258 ,  H01L23/522 ,  H01L29/205 ,  H01L29/861

CPC分类号： H01L27/0255 ,  H01L21/02381 ,  H01L21/0254 ,  H01L21/26513 ,  H01L21/26546 ,  H01L21/30612 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/8252 ,  H01L21/8258 ,  H01L23/5226 ,  H01L27/0605 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/6609 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/861

摘要： A silicon substrate having a III-V compound layer disposed thereon is provided. A diode is formed in the silicon substrate through an ion implantation process. The diode is formed proximate to an interface between the silicon substrate and the III-V compound layer. An opening is etched through the III-V compound layer to expose the diode. The opening is filled with a conductive material. Thereby, a via is formed that is coupled to the diode. A High Electron Mobility Transistor (HEMT) device is formed at least partially in the III-V compound layer.

公开(公告)号：US09412870B2

公开(公告)日：2016-08-09

申请号：US14833268

申请日：2015-08-24

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： King-Yuen Wong ,  Chia-Yu Lu ,  Chien-Chang Su ,  Yen-Chun Lin ,  Yi-Fang Pai ,  Da-Wen Lin

IPC分类号： H01L21/02 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/8249 ,  H01L29/66 ,  H01L29/08 ,  H01L29/165 ,  H01L27/06 ,  H01L29/04 ,  H01L29/167

CPC分类号： H01L29/0847 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/045 ,  H01L29/165 ,  H01L29/167 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

摘要： A device includes a substrate and a recess in the substrate. The recess has a bottom and sidewalls. The device also includes a first epitaxial layer over the bottom of the recess, and a second epitaxial layer over the first epitaxial layer and over the sidewalls of the recess, the second epitaxial layer having a different lattice constant than the substrate. The device further includes a third epitaxial layer over the second epitaxial layer and filling the recess.

摘要翻译： 一种器件包括衬底和衬底中的凹部。 凹槽具有底部和侧壁。 该器件还包括在凹槽的底部上的第一外延层，以及位于第一外延层上方的第二外延层，并且在凹槽的侧壁之上，第二外延层具有与衬底不同的晶格常数。 该器件还包括在第二外延层上方的第三外延层并填充凹陷。

公开(公告)号：US09224829B2

公开(公告)日：2015-12-29

申请号：US14267954

申请日：2014-05-02

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： King-Yuen Wong ,  Chen-Ju Yu ,  Fu-Wei Yao ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Po-Chih Chen ,  Chun-Wei Hsu

IPC分类号： H01L21/338 ,  H01L21/28 ,  H01L29/66 ,  H01L21/02 ,  H01L27/146 ,  H01L29/423 ,  H01L29/778 ,  H01L29/10 ,  H01L29/16 ,  H01L29/20

CPC分类号： H01L29/66462 ,  H01L21/0254 ,  H01L27/14689 ,  H01L29/1033 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/42364 ,  H01L29/7787

摘要： A method of forming a semiconductor structure, the method includes epitaxially growing a second III-V compound layer on a first III-V compound layer. A carrier channel is located between the first III-V compound layer and the second III-V compound layer. The method further includes forming a source feature and a drain feature on the second III-V compound layer, forming a third III-V compound layer on the second III-V compound layer, depositing a gate dielectric layer on a portion of the second III-V compound layer and a top surface of the third III-V compound layer, treating the gate dielectric layer on the portion of the second III-V compound layer with fluorine and forming a gate electrode on the treated gate dielectric layer between the source feature and the drain feature.

摘要翻译： 一种形成半导体结构的方法，所述方法包括在第一III-V化合物层上外延生长第二III-V化合物层。 载体通道位于第一III-V化合物层和第二III-V化合物层之间。 该方法还包括在第二III-V化合物层上形成源特征和漏极特征，在第二III-V化合物层上形成第三III-V化合物层，在第二III -V化合物层和第三III-V化合物层的顶表面，用氟处理第二III-V化合物层的部分上的栅极电介质层，并在处理的栅极电介质层上在源特征 和排水功能。

公开(公告)号：US20150364602A1

公开(公告)日：2015-12-17

申请号：US14833268

申请日：2015-08-24

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： King-Yuen Wong ,  Chia-Yu Lu ,  Chien-Chang Su ,  Yen-Chun Lin ,  Yi-Fang Pai ,  Da-Wen Lin

IPC分类号： H01L29/78 ,  H01L29/08 ,  H01L21/02 ,  H01L29/167 ,  H01L29/04 ,  H01L27/06 ,  H01L29/66 ,  H01L29/165

CPC分类号： H01L29/0847 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/045 ,  H01L29/165 ,  H01L29/167 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

摘要： A device includes a substrate and a recess in the substrate. The recess has a bottom and sidewalls. The device also includes a first epitaxial layer over the bottom of the recess, and a second epitaxial layer over the first epitaxial layer and over the sidewalls of the recess, the second epitaxial layer having a different lattice constant than the substrate. The device further includes a third epitaxial layer over the second epitaxial layer and filling the recess.

摘要翻译： 一种器件包括衬底和衬底中的凹部。 凹槽具有底部和侧壁。 该器件还包括在凹槽的底部上的第一外延层，以及位于第一外延层上方的第二外延层，并且在凹槽的侧壁之上，第二外延层具有与衬底不同的晶格常数。 该器件还包括在第二外延层上方的第三外延层并填充凹陷。

公开(公告)号：US20150325679A1

公开(公告)日：2015-11-12

申请号：US14790588

申请日：2015-07-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： King-Yuen Wong ,  Chen-Ju Yu ,  Jiun-Lei Jerry Yu ,  Po-Chih Chen ,  Fu-Wei Yao ,  Fu-Chih Yang

IPC分类号： H01L29/66 ,  H01L21/311 ,  H01L21/28 ,  H01L21/308 ,  H01L29/423 ,  H01L29/40 ,  H01L21/265 ,  H01L21/306

CPC分类号： H01L29/66462 ,  H01L21/26546 ,  H01L21/266 ,  H01L21/28264 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/41716 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/66621 ,  H01L29/7786 ,  H01L29/7787

摘要： An integrated circuit device includes a first III-V compound layer, a second III-V compound layer over the first III-V compound layer, a gate dielectric over the second III-V compound layer, and a gate electrode over the gate dielectric. An anode electrode and a cathode electrode are formed on opposite sides of the gate electrode. The anode electrode is electrically connected to the gate electrode. The anode electrode, the cathode electrode, and the gate electrode form portions of a rectifier.

摘要翻译： 集成电路器件包括第一III-V化合物层，第一III-V化合物层上的第二III-V化合物层，第二III-V化合物层上的栅极电介质，以及栅极电介质上的栅电极。 阳极电极和阴极电极形成在栅电极的相对侧上。 阳极电极与栅电极电连接。 阳极电极，阴极电极和栅电极形成整流器的部分。

公开(公告)号：US09985103B2

公开(公告)日：2018-05-29

申请号：US15362465

申请日：2016-11-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Fu-Wei Yao ,  Chen-Ju Yu ,  King-Yuen Wong ,  Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Chun-Lin Tsai

IPC分类号： H01L29/66 ,  H01L29/45 ,  H01L29/20 ,  H01L29/205 ,  H01L21/02 ,  H01L21/285 ,  H01L29/417 ,  H01L29/778 ,  H01L29/08

CPC分类号： H01L29/452 ,  H01L21/0254 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/28575 ,  H01L29/0843 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/41725 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787

摘要： A high electron mobility transistor (HEMT) includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A salicide source feature and a salicide drain feature are in contact with the first III-V compound layer through the second III-V compound layer. A gate electrode is disposed over a portion of the second III-V compound layer between the salicide source feature and the salicide drain feature.

公开(公告)号：US20180145669A1

公开(公告)日：2018-05-24

申请号：US15863229

申请日：2018-01-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Man-Ho Kwan ,  Fu-Wei Yao ,  Ru-Yi Su ,  King-Yuen Wong

IPC分类号： H03K5/08 ,  H01L27/088 ,  H01L29/778

CPC分类号： H03K5/08 ,  H01L27/0883 ,  H01L29/778

摘要： A device includes a first transistor having a first source terminal, a first drain terminal, and a first gate terminal; and a second transistor having a second source terminal, a second drain terminal, and a second gate terminal. The second source terminal is coupled to the first gate terminal and the first source terminal is coupled to the second gate terminal. The first transistor has a first threshold voltage, and the second transistor has a second threshold voltage different from the first threshold voltage.