公开(公告)号：US08653506B2

公开(公告)日：2014-02-18

申请号：US12664594

申请日：2008-05-09

申请人： Noriyuki Shimoji

发明人： Noriyuki Shimoji

IPC分类号： H01L29/08

CPC分类号： H01L51/5231 ,  H01L27/3288

摘要： An organic electroluminescence device includes: a first electrode layer; an insulating film arranged on the first electrode layer; an organic layer that is arranged on the insulating film, and is in contact with the first electrode layer at an opening portion provided in the insulating film; a second electrode layer arranged on the organic layer; and a metal layer that is in contact with an end surface of the organic layer and an end surface of the second electrode layer, and is arranged on the second electrode layer.

摘要翻译： 有机电致发光器件包括：第一电极层; 布置在所述第一电极层上的绝缘膜; 布置在所述绝缘膜上并与设置在所述绝缘膜上的开口部与所述第一电极层接触的有机层; 布置在有机层上的第二电极层; 以及与有机层的端面和第二电极层的端面接触的金属层，并配置在第二电极层上。

公开(公告)号：US08372764B2

公开(公告)日：2013-02-12

申请号：US12309402

申请日：2007-07-12

申请人： Hiroyuki Yano ,  Masaya Nogi ,  Kentaro Abe ,  Shinsuke Ifuku ,  Noriyuki Shimoji ,  Yoshiaki Oku ,  Suguru Okuyama

发明人： Hiroyuki Yano ,  Masaya Nogi ,  Kentaro Abe ,  Shinsuke Ifuku ,  Noriyuki Shimoji ,  Yoshiaki Oku ,  Suguru Okuyama

IPC分类号： B32B3/00 ,  B32B5/02 ,  D04H1/00 ,  B05D3/00 ,  D21H19/00

CPC分类号： D21H21/26 ,  Y10T428/26 ,  Y10T428/269 ,  Y10T442/20 ,  Y10T442/614

摘要： A highly transparent fiber composite material is provided that can be manufactured through a simplified process using reduced amounts of raw materials and that has high flexibility and low thermal expansivity and retains good functionality of the fiber material. The fiber composite material includes: a fiber assembly having an average fiber diameter of 4 to 200 nm and a 50 μm-thick visible light transmittance of 3% or more; and a coating layer that coats and smoothes the surface of the fiber assembly, wherein the fiber composite material has a 50 μm-thick visible light transmittance of 60% or more. With this fiber assembly, the scattering of light caused by the irregularities on the surface can be suppressed by coating the surface with the coating layer to smooth the surface, whereby a highly transparent fiber composite material can be obtained.

摘要翻译： 提供了一种高度透明的纤维复合材料，其可以通过使用减少量的原材料的简化工艺制造，并且具有高柔性和低热膨胀性并保持纤维材料的良好功能。 纤维复合材料包括：平均纤维直径为4〜200nm，50μm厚的可见光透射率为3％以上的纤维集合体; 以及涂布所述纤维集合体的表面的涂层，其中所述纤维复合材料具有60μm以上的50μm的可见光透射率。 利用该纤维集合体，可以通过用涂层涂布表面来平滑表面，由表面上的凹凸引起的光的散射被抑制，由此可以获得高度透明的纤维复合材料。

公开(公告)号：US20100065831A1

公开(公告)日：2010-03-18

申请号：US12450462

申请日：2008-01-30

申请人： Noriyuki Shimoji ,  Suguru Okuyama ,  Yoshiaki Oku

发明人： Noriyuki Shimoji ,  Suguru Okuyama ,  Yoshiaki Oku

IPC分类号： H01L51/52 ,  H01L51/56

CPC分类号： H01L27/3274 ,  H01L27/3248 ,  H01L51/0055 ,  H01L51/006 ,  H01L51/0081 ,  H01L51/0541

摘要： A hybrid organic light-emitting transistor device and a manufacturing method thereof are provided. The hybrid organic light-emitting transistor device includes at least one organic light-emitting diode device and at least one organic thin-film transistor device placed on the same substrate. The organic light-emitting diode device has a first organic layer placed between an anode and a cathode, and the organic thin-film transistor device has a second organic layer placed on a source electrode and a drain electrode. The first organic layer and the second organic layer are spatially isolated from each other, and an organic material forming the second organic layer is identical to an organic material forming the first organic layer. The hybrid organic light-emitting transistor with a reduced pixel size and an improved aperture ratio can be easily obtained.

摘要翻译： 提供了一种混合有机发光晶体管器件及其制造方法。 混合有机发光晶体管器件包括至少一个有机发光二极管器件和放置在同一衬底上的至少一个有机薄膜晶体管器件。 有机发光二极管器件具有放置在阳极和阴极之间的第一有机层，有机薄膜晶体管器件具有置于源电极和漏电极上的第二有机层。 第一有机层和第二有机层在空间上彼此隔离，形成第二有机层的有机材料与形成第一有机层的有机材料相同。 可以容易地获得具有减小的像素尺寸和改善的孔径比的混合有机发光晶体管。

公开(公告)号：US20090174319A1

公开(公告)日：2009-07-09

申请号：US12317262

申请日：2008-12-19

申请人： Noriyuki Shimoji

发明人： Noriyuki Shimoji

IPC分类号： H01J1/62

CPC分类号： H05B33/10 ,  H01L51/5212 ,  H01L51/5268 ,  H01L51/5271 ,  H05B33/26 ,  H05B33/28

摘要： An organic luminescent device according to the present invention includes a substrate, an organic luminescent layer, and a reflection electrode. Here, the substrate has first and second principal surfaces opposed to each other; the organic luminescent layer is arranged on the first principal surface of the substrate, and is held between a pair of electrodes at least one of which is a transparent electrode; and the reflection electrode is adjacent to a luminescent area of the organic luminescent layer and is arranged on a front surface or a back surface of the transparent electrode. The transparent electrode is arranged on the first principal surface of the substrate, while the reflection electrode is arranged on the transparent electrode. The second principal surface of the substrate is formed into a rough surface at least on its part opposed to the reflection electrode. This configuration improves light extraction efficiency.

摘要翻译： 根据本发明的有机发光装置包括基板，有机发光层和反射电极。 这里，基板具有彼此相对的第一和第二主表面; 有机发光层配置在基板的第一主面上，并且被保持在一对电极中，其中至少一个是透明电极; 反射电极与有机发光层的发光区域相邻，配置在透明电极的正面或背面。 透明电极布置在基板的第一主表面上，而反射电极布置在透明电极上。 基板的第二主表面至少在其与反射电极相对的部分上形成为粗糙表面。 该结构提高光提取效率。

公开(公告)号：US20060141398A1

公开(公告)日：2006-06-29

申请号：US11276320

申请日：2006-02-24

申请人： Noriyuki Shimoji ,  Masaki Takaoka

发明人： Noriyuki Shimoji ,  Masaki Takaoka

IPC分类号： G03F7/00

CPC分类号： F04B43/043 ,  B81B2203/0353 ,  B81C1/00626 ,  B81C2201/0136 ,  H01L29/0657

摘要： A method of producing a semiconductor device is disclosed, in which a through hole is formed in the upper surface of a semiconductor substrate from the lower surface thereof, and an opening of a desired size is formed in a desired position on the upper surface of the substrate. A guide that functions as an etching stopper is formed in the semiconductor substrate. An opening having a width W2 is formed in the guide. The opening faces an opening in a mask used in the formation of a through hole, and the width W2 thereof is narrower than a width W4 of the opening in the mask. The direction in which etching progresses is controlled by the opening formed in the guide as etching is conducted from a lower surface of the substrate to an upper surface of the substrate, and thus deviations in the width W1 and position of an opening in the upper surface of the substrate can be controlled.

摘要翻译： 公开了一种制造半导体器件的方法，其中在半导体衬底的上表面中形成有从其下表面的通孔，并且所需尺寸的开口形成在所述半导体衬底的上表面上的期望位置 基质。 在半导体衬底中形成用作蚀刻阻挡层的引导件。 在导向件中形成宽度为W 2的开口。 开口面向形成通孔所使用的掩模中的开口，其宽度W 2比掩模中的开口的宽度W 4窄。 蚀刻进行的方向由蚀刻形成在导向器中的开口控制，从基板的下表面传导到基板的上表面，因此宽度W 1和上部开口的位置的偏差 可以控制基板的表面。

公开(公告)号：US06713822B2

公开(公告)日：2004-03-30

申请号：US09853971

申请日：2001-05-11

申请人： Noriyuki Shimoji

发明人： Noriyuki Shimoji

IPC分类号： H01L2976

CPC分类号： H01L21/823475 ,  H01L23/522 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provides a semiconductor device that can separate components easily. Gate electrode 42 is formed only within component forming region 32, and gate electrode 42 and aluminum wiring 48 are connected in component forming region 32. Therefore, there is almost no inversion of the surface of the semiconductor substrate 36 that is under field oxide film 38 due to the voltage of the concerned connection area and gate electrode 42. Also, there is interlayer film 44 between aluminum wiring 48 and field oxide film 38, so there is almost no inversion of the surface of the semiconductor substrate 36 that is under field oxide film 38 due to the voltage of aluminum wiring 48. Therefore, it is possible to separate components without increasing overall length L1 of field oxide film 38, increasing the film thickness of field oxide film 38, or increasing the concentration of channel stop ions implanted into the surface of the semiconductor substrate 36 that is under field oxide film 38.

摘要翻译： 提供可以轻松分离组件的半导体器件。 栅电极42仅形成在元件形成区域32内，栅电极42和铝布线48在元件形成区域32连接。因此，几乎不会在场氧化膜38下方的半导体基板36的表面反转 由于有关的连接区域和栅电极42的电压。另外，在铝布线48和场氧化膜38之间存在层间膜44，因此在场氧化物下面的半导体衬底36的表面几乎没有反转 因此，可以在不增加场氧化膜38的总长度L1，增加场氧化膜38的膜厚度或增加植入的通道停止离子的浓度的情况下分离组件 位于场氧化膜38下面的半导体衬底36的表面。

公开(公告)号：US06384422B2

公开(公告)日：2002-05-07

申请号：US09788359

申请日：2001-02-21

申请人： Noriyuki Shimoji

发明人： Noriyuki Shimoji

IPC分类号： H01L2906

CPC分类号： H01L21/76251 ,  H01L21/3225 ,  H01L21/76254 ,  H01L21/76259 ,  H01L21/8221 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1203 ,  H01L29/78603 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/9202 ,  H01L2924/00014

摘要： (a) At first a semiconductor substrate (11) having a lacunose layer (12) disposed at a equal depth (h) from the surface of a semiconductor layer (1) is formed; (b) then electric components (2), for example, transistors, or lines (3) for an electric circuit are formed on the semiconductor layer (1) at the surface side with respect to the lacunose layer (12); (c) then the semiconductor substrate is separated at the lacunose layer; (d) and an insulating layer (5) is formed on the surface exposed by the separation. The ultrathin semiconductor device has a thickness lower than 20 micro meters. As a result, a thin semiconductor device, having an SOI structure, for example can be fabricated, without the electric components and the insulating layer being influenced by charging up, which may appear during the manufacturing process. And it is also possible to realize a three dimensional semiconductor device.

摘要翻译： （a）首先形成具有从半导体层（1）的表面设置在相同深度（h）的凹凸层（12）的半导体衬底（11） （b）然后在半导体层（1）上相对于凹凸层（12）在表面侧形成用于电路的电气部件（2），例如晶体管或线路（3）。 （c）然后半导体衬底在lacunose层分离; （d），并且在通过分离暴露的表面上形成绝缘层（5）。 超薄半导体器件的厚度低于20微米。 结果，可以制造具有SOI结构的薄半导体器件，而不会在制造过程中出现电气部件和绝缘层受到充电的影响。 并且也可以实现三维半导体器件。

公开(公告)号：US06228715B1

公开(公告)日：2001-05-08

申请号：US09345262

申请日：1999-06-30

申请人： Noriyuki Shimoji

发明人： Noriyuki Shimoji

IPC分类号： H01L218247

CPC分类号： H01L27/11521

摘要： It is an object of the present invention to provide a semiconductor memory device and a method of manufacturing thereof capable of increasing the integration thereof and having a high operation reliability. Anisotropic etching having a high selectivity to silicon oxide (SAS etching) is carried out by using a resist layer 56, a stacked gate 46, a thermal oxidation layer 58 as a mask. A field oxidation layer 44 located between low density sources LS is selectively removed by carrying out the SAS etching. A width w3 of the field oxidation layer 44 thus removed is not much less than a width w2 between the stacked gates 46 located adjacently because the thermal oxidation layer 58 formed on sides of the stacked gate 46 is thin in its thickness. A diffusion source wiring 55 formed by carrying out subsequent processes such as ion implantation and thermal diffusion can be formed in an appropriate width. A gate edge 59 of the stacked gate 46 can fully be protected with the thermal oxidation layer 58 even in the SAS etching while the thermal oxidation layer 58 is etched in its height during the SAS etching.

摘要翻译： 本发明的一个目的是提供一种半导体存储器件及其制造方法，其能够增加其集成度并具有较高的操作可靠性。 通过使用抗蚀剂层56，堆叠栅极46，热氧化层58作为掩模来进行对氧化硅具有高选择性（SAS蚀刻）的各向异性蚀刻。 位于低密度源LS之间的场氧化层44通过进行SAS蚀刻被选择性地去除。 这样去除的场氧化层44的宽度w3不会远小于层叠栅极46之间的宽度w2，因为形成在层叠栅极46的侧面上的热氧化层58的厚度较薄。 可以以适当的宽度形成通过进行离子注入和热扩散等后续处理形成的扩散源布线55。 堆叠栅极46的栅极边缘59即使在SAS蚀刻中也可以完全被热氧化层58保护，同时在SAS蚀刻期间在其高度上蚀刻热氧化层58。

公开(公告)号：US5502668A

公开(公告)日：1996-03-26

申请号：US201730

申请日：1994-02-25

申请人： Noriyuki Shimoji ,  Hidemi Takasu

发明人： Noriyuki Shimoji ,  Hidemi Takasu

IPC分类号： H01L29/34 ,  H01L29/788 ,  H01L29/68

CPC分类号： H01L29/34 ,  H01L29/7883

摘要： A poly-silicon or amorphous silicon plate having cone-like protrusions is provided on a Si substrate in a tunnel window area such that the edges of the protrusions are placed very close to a floating gate. Alternatively, the top surface of a Si substrate is shaped into protrusions.

摘要翻译： 在隧道窗口区域中的Si衬底上提供具有锥形突起的多晶硅或非晶硅板，使得突起的边缘非常靠近浮动栅极。 或者，Si衬底的顶表面成形为突起。

公开(公告)号：US5349222A

公开(公告)日：1994-09-20

申请号：US12882

申请日：1993-02-03

申请人： Noriyuki Shimoji

发明人： Noriyuki Shimoji

IPC分类号： G11C17/00 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L29/78

CPC分类号： H01L27/115 ,  H01L29/792

摘要： The present invention provides nonvolatile semiconductor memory which has advantages permitting the cell of the memory circuit to integrate, the memory circuit to be easy to manufacture, and the manufacturing expense to be cut down. The nonvolatile memory (21) comprises a P type well (2) for which a N+ type source (4) and a N+ type drain (3) is provided. A surface of a space between the source (4) and the drain (3) comprises a first portion (10a) and a second portion (10b). An insulating layer (6) for holding electrons spans the surface of the first portion (10a). A memory gate electrode (5) is on the insulating layer (6) and spans the first portion (10a). A conductive body 23 is provided on an insulating layer (8) so that it spans the second portion (10b) and is electrically disconnected from the memory gate electrode (5).

摘要翻译： 本发明提供了一种非易失性半导体存储器，其具有允许存储电路的单元集成，易于制造的存储电路以及要削减的制造费用的优点。 非易失性存储器（21）包括提供N +型源极（4）和N +型漏极（3）的P型阱（2）。 源（4）和漏极（3）之间的空间的表面包括第一部分（10a）和第二部分（10b）。 用于保持电子的绝缘层（6）跨越第一部分（10a）的表面。 存储栅电极（5）位于绝缘层（6）上并跨越第一部分（10a）。 导电体23设置在绝缘层（8）上，使得其跨越第二部分（10b）并与存储器栅电极（5）电断开。