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公开(公告)号：USRE34295E
公开(公告)日：1993-06-29
申请号：US486389
申请日：1990-02-28
申请人： Toshifumi Shibuya , Hiroshi Endoh , Yoshimi Iso , Takao Arai , Hiroo Okamoto
发明人： Toshifumi Shibuya , Hiroshi Endoh , Yoshimi Iso , Takao Arai , Hiroo Okamoto
IPC分类号： H03M1/00
摘要： An integration type D/A and A/D converter having improved linearity and low power consumption. Logic circuits such as ECL counters consuming a major part of power of the D/A and A/D converters are realized through CMOS process. Current source circuits, current switch circuit and comparator circuit of the integration type A/D converter are realized in IC through bipolar process ensuring high accuracy and low noise. Logic parts such as counter is realized through CMOS process.
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公开(公告)号：US5084788A
公开(公告)日：1992-01-28
申请号：US231001
申请日：1988-08-11
申请人： Yuuji Hatanaka , Hiroo Okamoto , Takao Arai , Shin-ichi Wakumura , Ichiro Miyake , Shunichiro Sakamoto
发明人： Yuuji Hatanaka , Hiroo Okamoto , Takao Arai , Shin-ichi Wakumura , Ichiro Miyake , Shunichiro Sakamoto
IPC分类号： G11B20/10 , G11B27/032 , G11B27/30
CPC分类号： G11B27/3063 , G11B20/10527 , G11B27/032 , G11B27/3027 , G11B2220/90 , G11B2220/913
摘要： Disclosed is a PCM signal reproducing/recording apparatus which comprises a reproducing device for reproducing a recording medium carrying PCM data and sub-code data recorded thereon, the sub-code data having sub-data and sub-ID for adding auxiliary information to the PCM data, and a recording device for recording the PCM data and sub-code data transmitted from the reproducing device onto a recording medium. The recording device is arranged to selectively record the sub-code data judged to be correct, onto a recording medium, of those sub-code data transmitted from the reproducing device.
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43.发明授权Method of transmitting digital data in which error detection codes are dispersed using alternate delay times 失效使用交替的延迟时间发送错误检测码散布的数字数据的方法
公开(公告)号：US4716567A
公开(公告)日：1987-12-29
申请号：US827606
申请日：1986-02-10
申请人： Masahiro Ito , Masaharu Kobayashi , Takao Arai
发明人： Masahiro Ito , Masaharu Kobayashi , Takao Arai
CPC分类号： H03M13/2764 , G11B20/1809 , H04N5/9267
摘要： In a method of transmitting digital data including the steps of constructing one block by a plurality of digital data, constructing one frame by a plurality of blocks, adding two kinds of mutually different error detection and correction codes to these blocks and transmitting these digital data together with the codes that are added, the digital data are not interleaved, only the error detection and correction codes are interleaved and these interleaved codes are added to the digital data.
摘要翻译： 在发送数字数据的方法中，包括通过多个数字数据构造一个块的步骤，通过多个块构造一个帧，向这些块添加两种相互不同的错误检测和校正码并将这些数字数据一起发送 利用添加的代码，数字数据不被交织，只有错误检测和校正码被交织，并且这些交织的代码被添加到数字数据。
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44.发明授权Digital-to-analog converter device for processing PCM signals of different sampling frequencies 失效用于处理不同采样频率的PCM信号的数模转换器
公开(公告)号：US4614934A
公开(公告)日：1986-09-30
申请号：US578787
申请日：1984-02-10
申请人： Masaharu Kobayashi , Takaharu Noguchi , Keizo Nishimura , Hiromichi Tanaka , Masami Nishida , Takao Arai
发明人： Masaharu Kobayashi , Takaharu Noguchi , Keizo Nishimura , Hiromichi Tanaka , Masami Nishida , Takao Arai
CPC分类号： H04B14/04 , H03M1/0631
摘要： A digital-to-analog converter device for PCM signals at different sampling frequencies comprises a signal converter which expands the frequency distance between a PCM signal band and a side band by converting the sampling frequencies associated with the PCM signals to be reproduced into higher frequencies. With this signal converter, a single low-pass filter can be simplified, having a gradual ramp cut-off characteristic for removal of the side band wherein a pass band cut-off frequency and a stop band cut-off frequency can be adapted for low pass filtering of the PCM signals at different sampling frequencies.
摘要翻译： 用于不同采样频率的PCM信号的数模转换器装置包括通过将与要再现的PCM信号相关联的采样频率转换为更高频率来扩展PCM信号频带和边带之间的频率距离的信号转换器。 利用该信号转换器，可以简化单个低通滤波器，具有用于去除边带的逐渐斜坡截止特性，其中通带截止频率和阻带截止频率可适应于低 以不同的采样频率对PCM信号进行滤波。
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公开(公告)号：US4611335A
公开(公告)日：1986-09-09
申请号：US422190
申请日：1982-09-23
申请人： Takao Arai , Masaharu Kobayashi , Takashi Takeuchi , Eiji Okubo , Hiroshi Endoh
发明人： Takao Arai , Masaharu Kobayashi , Takashi Takeuchi , Eiji Okubo , Hiroshi Endoh
CPC分类号： G11B20/1403 , G11B20/10527 , H04L7/0331 , H04L7/042
摘要： A circuit for reproducing a signal associated with synchronization with a digital data signal. The digital data signal includes a combination of a plurality of pulses each having a predetermined pulse width. The reproducing circuit comprises a logic circuit for discriminating the pulse width of at least one of the plurality of pulses, an oscillator and a frequency divider connected with the oscillator and responsive to the output of the logic circuit to generate a clock signal timed with the output of the logic circuit.
摘要翻译： 一种用于再现与数字数据信号同步的信号的电路。 数字数据信号包括具有预定脉冲宽度的多个脉冲的组合。 再现电路包括用于鉴别多个脉冲中的至少一个脉冲的脉冲宽度的逻辑电路，与振荡器连接的振荡器和分频器，并且响应逻辑电路的输出以产生与输出定时的时钟信号 的逻辑电路。
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公开(公告)号：US4562549A
公开(公告)日：1985-12-31
申请号：US434058
申请日：1982-10-13
申请人： Hiromichi Tanaka , Hiroyuki Kimura , Tsutomu Noda , Takao Arai , Masaharu Kobayashi , Shigeki Inoue
发明人： Hiromichi Tanaka , Hiroyuki Kimura , Tsutomu Noda , Takao Arai , Masaharu Kobayashi , Shigeki Inoue
IPC分类号： G01R29/027 , G11B19/28 , G11B20/10 , H03K5/01 , H03K5/22
CPC分类号： G11B19/28 , G01R29/0273 , G11B20/10 , Y10S388/912 , Y10S388/916
摘要： In a pulse width detector circuit, a high-level pulse width and a low-level pulse width of a digital signal derived by slicing an analog signal reproduced from a disc at a predetermined level are independently measured and maximum or minimum values thereof in a predetermined time interval are stored, and an average value, sum or difference of the maximum or minimum high-level pulse width and the maximum or minimum low-level pulse width is calculated to detect a correct pulse width of original data recorded on the disc.
摘要翻译： 在脉冲宽度检测电路中，独立地测量通过将从盘再现的模拟信号以预定水平进行分片而得到的数字信号的高电平脉冲宽度和低电平脉冲宽度，并且其预定的最大值或最小值 存储时间间隔，并且计算最大或最小高电平脉冲宽度与最大或最小低电平脉冲宽度的平均值，和或差，以检测记录在盘上的原始数据的正确脉冲宽度。
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公开(公告)号：US4539615A
公开(公告)日：1985-09-03
申请号：US386073
申请日：1982-06-07
CPC分类号： G11B15/06 , G11B5/4893 , G11B5/4969 , G11B5/5504 , G11B5/5513
摘要： An azimuthal magnetic recording and reproducing apparatus comprises a magnetic head including at least one head gap for the recording and reproduction of information on and from recording tracks extending in the longitudinal direction of a magnetic tape. In the apparatus, the head gap is disposed to make the recording and reproducing operation so that the direction of magnetization on one of the recording tracks differs from that on the adjacent one.
摘要翻译： 方位磁记录和重放装置包括磁头，该磁头包括至少一个磁头间隙，用于在磁带的纵向延伸的记录磁道上记录和再现信息。 在该装置中，设置头部间隙以进行记录和再现操作，使得在一个记录磁道上的磁化方向与相邻记录磁道上的磁化方向不同。
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公开(公告)号：US4420775A
公开(公告)日：1983-12-13
申请号：US305779
申请日：1981-09-25
申请人： Shigeru Yamazaki , Takao Arai , Masaharu Kobayashi , Takashi Hoshino , Chitoshi Hibino , Harukuni Kobari
发明人： Shigeru Yamazaki , Takao Arai , Masaharu Kobayashi , Takashi Hoshino , Chitoshi Hibino , Harukuni Kobari
摘要： A circuit for protecting a horizontal synchronous signal comprises a horizontal synchronous signal detecting circuit responsive to horizontal synchronous pulses included in a composite synchronous signal of a reproduced PCM signal, first and second horizontal synchronous pulse supplementing or adding circuits and an output switching circuit. The output switching circuit operates so that the first supplementing circuit delivers a first supplementary pulse in the absence of a single pulse of the original horizontal synchronous signal, and the second supplementing circuit produces one or more second supplementary pulses in the absence of a plurality of continuous pulses of the original horizontal synchronous signal. When the circuit returns to a condition in which produced horizontal synchronous pulses are synchronous with the original horizontal synchronous pulses, the time interval between adjacent pulses of the original pulses is detected to see whether the interval is either longer or shorter than a predetermined value. As a result, when a pulse first appeared after the returning point is within the predetermined interval, that pulse is removed so that the number of output horizontal synchronous pulses is correct.
摘要翻译： 用于保护水平同步信号的电路包括水平同步信号检测电路，其响应包括在再现的PCM信号的复合同步信号中的水平同步脉冲，第一和第二水平同步脉冲补充或加法电路以及输出切换电路。 输出切换电路操作，使得第一补充电路在没有原始水平同步信号的单个脉冲的情况下传送第一辅助脉冲，并且第二补充电路在没有多个连续的情况下产生一个或多个第二辅助脉冲 原始水平同步信号的脉冲。 当电路返回到产生的水平同步脉冲与原始水平同步脉冲同步的状态时，检测原始脉冲的相邻脉冲之间的时间间隔，以查看间隔是否比预定值更长或更短。 结果，当在返回点之后首先出现脉冲在预定间隔内时，该脉冲被去除，使得输出水平同步脉冲的数量是正确的。
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公开(公告)号：US4238770A
公开(公告)日：1980-12-09
申请号：US79252
申请日：1979-09-27
摘要： There is disclosed a vertical synchronizing signal detector circuit for use with a PCM recording/reproducing system which records and reproduces audio signals with pulse code modulation by the use of a home VTR system or a part thereof. The vertical synchronizing signal detector circuit comprises an input terminal for receiving a composite synchronizing signal including a horizontal synchronizing signal and a vertical synchronizing signal, an output terminal for providing a vertical synchronizing pulse synchronized with the vertical synchronizing signal, a clock pulse generator circuit connected to the input terminal and adapted to generate a clock pulse having half the period of the horizontal synchronizing signal and a phase lag therefrom of one-fourth the period thereof, a vertical synchronizing signal extractor circuit connected to the input terminal and the clock pulse generator circuit and adapted to compare the vertical synchronizing signal with a reference waveform pattern for the vertical synchronizing signal so as to generate a vertical synchronizing signal output synchronized with the vertical synchronizing signal only when the comparison results in a complete coincidence, and a vertical synchronizing signal compensator circuit connected to the vertical synchronizing signal extractor circuit and the clock pulse generator circuit and responsive to the vertical synchronizing signal output to provide this output at the output terminal and simultaneously store the same temporarily, the vertical synchronizing signal compensator circuit being also adapted to provide the stored vertical synchronizing signal output at the output terminal when the vertical synchronizing signal output is not received, whereby the vertical synchronizing pulse is produced at correct timing even if the vertical synchronizing signal is absent in the composite synchronizing signal because of a dropout or the like.
摘要翻译： 公开了一种与PCM记录/再现系统一起使用的垂直同步信号检测器电路，其通过使用家用VTR系统或其一部分来记录和再现具有脉冲编码调制的音频信号。 垂直同步信号检测电路包括：输入端子，用于接收包括水平同步信号和垂直同步信号的复合同步信号;输出端，用于提供与垂直同步信号同步的垂直同步脉冲;时钟脉冲发生器电路，连接到 所述输入端子适于产生具有所述水平同步信号的一半周期的时钟脉冲及其四分之一周期的相位滞后;垂直同步信号提取器电路，连接到所述输入端子和所述时钟脉冲发生器电路;以及 适于将垂直同步信号与用于垂直同步信号的参考波形图案进行比较，以便仅当比较导致完全符合时产生与垂直同步信号同步的垂直同步信号，并且垂直同步信号 l补偿电路连接到垂直同步信号提取器电路和时钟脉冲发生器电路，并且响应于垂直同步信号输出以在输出端提供该输出并同时暂时存储，垂直同步信号补偿器电路还适于 当没有接收到垂直同步信号输出时，在输出端提供所存储的垂直同步信号，由此，即使在复合同步信号中缺少垂直同步信号，因此在正确定时产生垂直同步脉冲， 喜欢。
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公开(公告)号：US4101841A
公开(公告)日：1978-07-18
申请号：US829244
申请日：1977-08-30
申请人： Shigeru Okada , Takao Arai , Kouichi Tomatsuri , Hiroshi Toeda
发明人： Shigeru Okada , Takao Arai , Kouichi Tomatsuri , Hiroshi Toeda
CPC分类号： H03G7/001 , H03G1/04 , H03G3/3005
摘要： Disclosed is a gain control circuit which comprises a gain control section including as its essential component a differential amplifier with which diodes or transistors arranged to act as diodes are connected as a load, and a control signal section including a logarithmic compression circuit and an exponential expansion circuit and providing a control signal for control of the gain of the gain control section. A temperature compensation circuit having a temperature dependence cancelling both the temperature dependence of the gain control section and that of the control signal section is provided in the bias circuit for the transistor in the last stage of the control signal section, so that the desired temperature compensation for the entire gain control circuit can be achieved at a single point.
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