Network system having a virtual-service-module
    41.
    发明授权
    Network system having a virtual-service-module 有权
    具有虚拟服务模块的网络系统

    公开(公告)号:US07197553B2

    公开(公告)日:2007-03-27

    申请号:US10126300

    申请日:2002-04-19

    CPC classification number: H04L41/12 H04L69/40

    Abstract: A method, apparatus, and system in which a network system includes a virtual graph composed of a plurality individual networks. A first individual network is associated with a first user. The first individual network includes a plurality of service modules modeled to be representing a first set of network elements. The second individual network is associated with a second user. The second individual network includes a plurality of service modules modeled to be representing a second set of network elements. The second set of network element differs in the type of network elements included in the second individual network and the topological order of the network elements in the second individual network than the first set of network elements.

    Abstract translation: 一种方法,装置和系统,其中网络系统包括由多个单独网络组成的虚拟图形。 第一单独网络与第一用户相关联。 第一单独网络包括被建模为表示第一组网络元件的多个服务模块。 第二单独网络与第二用户相关联。 第二单独网络包括被建模为表示第二组网络元件的多个服务模块。 第二组网络元件在第二个单独网络中包括的网络元件的类型和第二个单独网络中的网络元件的拓扑顺序不同于第一组网络元件。

    Reduction of excessive spectral power distribution from class-C
saturated amplification of a pulsed-carrier signal
    42.
    发明授权
    Reduction of excessive spectral power distribution from class-C saturated amplification of a pulsed-carrier signal 失效
    从脉冲载波信号的C级饱和放大中减少过多的频谱功率分布

    公开(公告)号:US5789979A

    公开(公告)日:1998-08-04

    申请号:US819308

    申请日:1997-03-18

    CPC classification number: H03G3/3047 H03F3/217

    Abstract: In an amplifier for amplifying a pulsed sinusoidal carrier signal, wherein the amplifier employs an amplifier element operative as Class-C with a saturation operation region which increases the sharpness of leading and trailing edges of a rectangular pulse envelope of the pulsed carrier signal for undesirable spectral spreading of energy of the signal, a method of reducing the spectral spreading of the energy employs a modification of the rectangular envelope of the pulsed carrier signal to a trapezoidal envelope. The leading and the trailing edges of the trapezoidal envelope constitute envelopes of sinusoidal waveforms of increasing and decreasing amplitude, respectively. The peak amplitudes of the largest amplitude sinusoidal of the leading and the trailing edges have powers which exceed a power level inducing the saturated operation of the amplifier element such that there is a decrement in incremental power gain by a factor of approximately 3 dB. In the pulse of carrier signal outputted by the amplifier element, the carrier in a central region thereof has a substantially square-wave configuration while, at the leading and the trailing edges, the cycles of the waveform are substantially sinusoidal. A bank of numerous amplifying channels, each of which contains the amplifier element, are fed the modified envelope by a common filter which produces the modification.

    Abstract translation: 在用于放大脉冲正弦载波信号的放大器中,其中放大器采用具有饱和运算区域作为C类工作的放大器元件,该饱和运算区域增加脉冲载波信号的矩形脉冲包络线的前沿和后沿的清晰度,用于不期望的频谱 扩展信号的能量,降低能量的频谱扩展的方法采用将脉冲载波信号的矩形包络线修改为梯形信封。 梯形包络线的前缘和后缘分别构成振幅递增和减小的正弦波形的包络。 前沿和后沿的最大幅度正弦曲线的峰值幅度具有超过功率电平的功率,该功率电平引起放大器元件的饱和操作,使得增量功率增益减小约3dB的系数。 在由放大器元件输出的载波信号的脉冲中,其中心区域中的载波具有大致矩形波形,而在前沿和后沿,波形的周期基本上是正弦的。 每个包含放大器元件的众多放大通道的一组通过产生修改的公共滤波器馈送到修改的封套。

    Digitally controlled monolithic switch matrix using selectable dual gate
FET power dividers and combiners
    43.
    发明授权
    Digitally controlled monolithic switch matrix using selectable dual gate FET power dividers and combiners 失效
    使用可选择的双栅极FET功率分配器和组合器的数字控制单片开关矩阵

    公开(公告)号:US5150083A

    公开(公告)日:1992-09-22

    申请号:US565877

    申请日:1990-08-09

    Abstract: There is described a 2.times.2 switch matrix which includes four 1.times.1 switch matrix modules. Each 1.times.1 switch matrix module consists of an active power divider switch (APDS), an active power combiner switch (APCS) and an air bridge crossover. Additional APDSs and APCSs are utilized in the matrix to compensate for path length differences between different input to output signal paths thus providing good phase and amplitude tracking. The basic switch matrix modules are utilized to form a 2.times.2 switch matrix whereby two primary input ports can be connected to any one of two primary output ports. The 2.times.2 switch matrix is utilized to formulate larger matrix arrays as N.times.M configuration. Each of the active power divider switches and power combiner switches utilize two separate dual gate FETs which are suitably interconnected, depending upon whether the circuit is to be used as a power combiner or power divider. The other gate electrodes of the dual gate FETs are used as control terminals to receive an adequate bias voltage to therefore determine the power distribution or power combination characteristics of each of the devices and hence to control the coupling between input and output terminals.

    Abstract translation: 描述了一个2x2开关矩阵,其包括四个1x1开关矩阵模块。 每个1x1开关矩阵模块由有源功率分配开关(APDS),有功功率组合器开关(APCS)和空气桥交叉组成。 在矩阵中使用附加的APDS和APCS来补偿不同输入到输出信号路径之间的路径长度差异,从而提供良好的相位和幅度跟踪。 基本的开关矩阵模块用于形成2x2开关矩阵,由此两个主输入端口可以连接到两个主输出端口中的任一个。 2x2开关矩阵用于制定较大的矩阵阵列作为NxM配置。 有源功率分配器开关和功率组合器开关中的每一个利用两个独立的双栅极FET,这两个FET是适当互连的,这取决于该电路是用作功率组合器还是功率分配器。 双栅极FET的其他栅电极用作控制端子以接收足够的偏置电压,从而确定每个器件的功率分配或功率组合特性,从而控制输入和输出端子之间的耦合。

    Monolithic double balanced mixer with high third order intercept point
employing an active distributed balun
    44.
    发明授权
    Monolithic double balanced mixer with high third order intercept point employing an active distributed balun 失效
    采用主动分布式平衡 - 不平衡转换器的高三阶截点的单片双平衡混频器

    公开(公告)号:US5060298A

    公开(公告)日:1991-10-22

    申请号:US282542

    申请日:1988-12-09

    Abstract: A monolithic double balanced mixer with a high third order intercept point employs a local oscillator signal which is applied to the input port of a first active distributed element balun. The balun has two outputs which are applied via amplifiers to respective inputs of a double balanced resistive FET quad mixer. The double balanced resistive FET quad mixer employs four MESFETs arranged in a ring configuration. Two additional inputs to the quad mixer are obtained from a second balun which is also of an active distributed element configuration and receives at the input the RF signal. The quad mixer operates to produce mixing of the LO and RF signals at the outputs thereof. The outputs of the quad mixer are applied to a combiner which operates to combine the outputs of the quad mixer to produce at the combiner output an IF signal. The combiner can be a common gate combiner configuration with active loads or a distributed configuration employing FET devices in a distributed transmission line type of circuit.

    Abstract translation: 具有高三阶截取点的单片双平衡混频器采用施加到第一有源分布元件平衡 - 不平衡变换器的输入端口的本地振荡器信号。 平衡 - 不平衡转换器有两个输出,通过放大器施加到双平衡电阻FET四通道混频器的相应输入。 双平衡电阻FET四通道混频器采用四个环形配置的MESFET。 从第二平衡 - 不平衡变换器获得四个混频器的两个附加输入,该平衡不平衡变换器也是有源分布元件配置,并在输入端接收RF信号。 四通道混频器的作用是在其输出端产生LO和RF信号的混频。 四通道混频器的输出被施加到组合器,该组合器操作以组合四通道混频器的输出,以在组合器输出端产生IF信号。 组合器可以是具有有源负载的公共栅极组合器配置或在分布式传输线路类型中使用FET器件的分布式配置。

    Microwave frequency power divider
    45.
    发明授权
    Microwave frequency power divider 失效
    微波功率分配器

    公开(公告)号:US4611184A

    公开(公告)日:1986-09-09

    申请号:US630840

    申请日:1984-07-13

    Applicant: Mahesh Kumar

    Inventor: Mahesh Kumar

    CPC classification number: H03H11/36

    Abstract: An in-phase power divider is constructed of a double field-effect transistor having a common source, first and second gates and first and second drains. The gates are coupled together and adapted to receive a radio frequency signal of power P to be power divided. The power divided output signals each at substantially P.div.2 or more appear at the drains. An alternative power divider for producing unequal power division is constructed of a double dual gate FET having, in addition to the above-mentioned elements, third and fourth gates. By appropriate unequal application of gate bias to the additional gates unequal power division is effected.

    Abstract translation: 同相功率分配器由具有共同源极,第一和第二栅极以及第一和第二漏极的双场效应晶体管构成。 门耦合在一起,适于接收功率分配的功率P的射频信号。 在漏极处出现基本上P DIVIDED 2或更大的功率分配输出信号。 用于产生不相等的功率分配的替代功率分配器由除了上述元件之外的第三和第四栅极的双重双栅极FET构成。 通过适当地不平等地对附加门施加栅极偏置,实现不均匀的功率分配。

    Predistortion circuit
    46.
    发明授权
    Predistortion circuit 失效
    预失真电路

    公开(公告)号:US4564816A

    公开(公告)日:1986-01-14

    申请号:US608415

    申请日:1984-05-09

    CPC classification number: H03F1/3241

    Abstract: A predistortion circuit for use with a solid state power amplifier or traveling wave tube amplifier which exhibits phase and amplitude nonlinearities. The predistortion circuit, which produces gain and phase distortion complementary to that of the associated power amplifier, comprises a hybrid circuit for splitting the input signal into two output signals at respective output terminals, the signals having a relative phase difference of 90.degree., a pair of dual gate FETs or other active nonlinear devices each connected to a different one of the two output terminals and a combiner for combining in-phase the outputs of the nonlinear devices. Bias on the nonlinear devices is adjusted to effect, in the predistortion circuit, nonlinearities complementary to those of the power amplifier.

    Abstract translation: 一种用于具有相位和幅度非线性的固态功率放大器或行波管放大器的预失真电路。 产生与相关功率放大器互补的增益和相位失真的预失真电路包括一个混合电路,用于将输入信号分成两个相应输出端的输出信号,该信号的相对相位差为90°,一对 的双栅极FET或其他有源非线性器件,每个连接到两个输出端子中的不同的一个,以及用于组合非线性器件的输出的同相的组合器。 在预失真电路中,非线性器件上的偏置被调整为与功率放大器互补的非线性。

    Power divider/combiner circuit as for use in a switching matrix
    47.
    发明授权
    Power divider/combiner circuit as for use in a switching matrix 失效
    功率分配器/组合器电路用于开关矩阵

    公开(公告)号:US4472691A

    公开(公告)日:1984-09-18

    申请号:US383960

    申请日:1982-06-01

    CPC classification number: H01P1/15 H01P5/12

    Abstract: A one port-to-M port passive signal power divider circuit (or combiner circuit) where M>2 and .noteq. 2.sup.N, M and N are integers, includes M - 1 two-way in-phase passive power dividers having a signal delay D through each path in one or more delay devices having delay D. Each output of each two-way power divider is coupled to an input of another power divider, a delay line or an output port, the arrangement being such that the delay through all ports of the power divider are equal. In accordance with a further embodiment of the invention the outputs of a passive power divider are connected to two-way switches using active components. The switches under control of a control circuit are utilized to switch the input signal to the power divider to any one of 2.multidot.M output terminals of the switches.

    Abstract translation: 一个端口到M端口的无源信号功率分配电路(或组合电路),其中M> 2和NOTEQUAL 2N,M和N是整数,包括具有信号延迟D的M-1个双向同相无源功率分配器 通过具有延迟D的一个或多个延迟装置中的每个路径。每个双向功率分配器的每个输出耦合到另一个功率分配器,延迟线或输出端口的输入,该布置使得通过所有端口 的功率分配器相等。 根据本发明的另一实施例,无源功率分配器的输出端使用有源部件连接到双向开关。 在控制电路的控制下的开关用于将输入信号切换到功率分配器到开关的2xM输出端中的任何一个。

    DC Capacitor Balancing
    48.
    发明申请
    DC Capacitor Balancing 有权
    直流电容平衡

    公开(公告)号:US20110227422A1

    公开(公告)日:2011-09-22

    申请号:US12725053

    申请日:2010-03-16

    Abstract: Methods and devices for balancing voltages of capacitors in an electronic circuit are provided. The device includes a chopper circuit having a chopper inductor. Further, the chopper circuit may detect voltages across capacitors as well as an output current of the electronic circuit. In addition, the device may include a chopper control unit receiving the output current then generating a signal representing charging of the chopper inductor based on the output current. Also, the chopper control unit may receive the voltages across the capacitors and detect an imbalance between the voltages based on a polarity of the output current. Additionally, the chopper control unit may transfer of charge between the two capacitors, using the chopper inductor. Further, the chopper inductor is substantially discharged, during the transfer of charge between the capacitors.

    Abstract translation: 提供了用于平衡电子电路中的电容器的电压的方法和装置。 该装置包括具有斩波电感器的斩波电路。 此外,斩波电路可以检测电容器两端的电压以及电子电路的输出电流。 此外,该装置可以包括接收输出电流的斩波控制单元,然后基于输出电流产生表示斩波电感器的充电的信号。 此外,斩波器控制单元可以接收电容器两端的电压,并且基于输出电流的极性来检测电压之间的不平衡。 此外,斩波控制单元可以使用斩波电感器在两个电容器之间传送电荷。 此外,在电容器之间的电荷转移期间,斩波电感器基本上被放电。

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