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    Integrated and combined phase shifter and isolation switch
    44.
    发明授权
    Integrated and combined phase shifter and isolation switch 有权

    公开(公告)号：US11742820B2

    公开(公告)日：2023-08-29

    申请号：US17381885

    申请日：2021-07-21

    Applicant: pSemi Corporation

    Inventor： Eric S. Shapiro ,  Peter Bacon

    IPC: H03H7/20

    CPC classification number: H03H7/20

    Abstract: A phase shifter unit cell or a connected set of such cells that can be well isolated from external circuitry and which do not introduce insertion loss into an RF signal path, exhibit good return loss, and further provides additional advantages when combined with bracketing attenuator circuits. More particularly, embodiments integrate a high-isolation function within a phase shifter circuit by breaking the complimentary nature of the control signals to a phase shifter cell to provide greater control of switch states internal to the phase shifter cell and thus enable a distinct high-isolation state, and by including a switchable shunt termination resistor for use in the high-isolation state. Some embodiments are serially coupled to attenuator circuits to enable synergistic interaction that reduces overall die size and/or increases isolation. One such embodiment positions a high-isolation phase shifter cell in accordance with the present invention between bracketing programmable attenuators.

    Programmable Voltage Variable Attenuator
    46.
    发明申请
    Programmable Voltage Variable Attenuator 有权

    公开(公告)号：US20220109432A1

    公开(公告)日：2022-04-07

    申请号：US17503721

    申请日：2021-10-18

    Applicant: pSemi Corporation

    Inventor： Peter Bacon

    IPC: H03H11/24

    Abstract: A programmable voltage variable attenuator (VVA) that enables selection among multiple analog, continuous attenuation ranges. Some embodiments include a dual-mode interface to enable digitally programming a DAC and provide the analog output to control the attenuation level of the VVA, or alternatively apply an externally provided analog voltage to directly control the VVA attenuation level. A VVA may be used in conjunction with a digital step attenuator (DSA). Some embodiments include circuitry for changing the VVA reference impedance. The attenuator architecture of the VVA includes one or more variable resistance shunt elements and/or series elements which may be a resistor and FET circuit controlled by a provided variable analog voltage. The multiple resistance element architecture may be implemented with stacked FET devices. Embodiments for the VVA may be based, for example, on T-type, Bridged-T type, Pi-type, L-pad type, reflection type, or balanced coupler type attenuators.

    Glitch Mitigation in Switched Reactance Phase Shifters
    48.
    发明申请
    Glitch Mitigation in Switched Reactance Phase Shifters 有权

    公开(公告)号：US20210021257A1

    公开(公告)日：2021-01-21

    申请号：US16943626

    申请日：2020-07-30

    Applicant: pSemi Corporation

    Inventor： Ravindranath Shrivastava ,  Peter Bacon

    IPC: H03H11/20 ,  H03H7/20

    Abstract: A phase shifter cell and multiple coupled phase shifter cells that mitigate signal glitches arising from phase state changes by a combination of design architecture and control signal timing. Specifically, one or more of the following three concepts are employed to mitigate insertion loss glitches and control phase behavior during phase state transitions: the timing of switching for each switched half-cell (e.g., including series and/or shunt reactance elements, such as inductors and/or capacitors) within a phase shifter cell is controlled in such a way that the reactance elements do not all switch at the same time; use of a “make before break” timing scheme for combination or “multi-state” phase shifter cells; and/or arranging the timing of each phase shifter cell in a set of multiple coupled phase shifter cells such that the individual cells do not all switch at the same time.

    Integrated and combined phase shifter and isolation switch
    49.
    发明授权
    Integrated and combined phase shifter and isolation switch 有权

    公开(公告)号：US10693435B2

    公开(公告)日：2020-06-23

    申请号：US16177097

    申请日：2018-10-31

    Applicant: pSemi Corporation

    Inventor： Eric S. Shapiro ,  Peter Bacon

    IPC: H03H7/20

    Abstract: A phase shifter unit cell or a connected set of such cells that can be well isolated from external circuitry and which do not introduce insertion loss into an RF signal path, exhibit good return loss, and further provides additional advantages when combined with bracketing attenuator circuits. More particularly, embodiments integrate a high-isolation function within a phase shifter circuit by breaking the complimentary nature of the control signals to a phase shifter cell to provide greater control of switch states internal to the phase shifter cell and thus enable a distinct high-isolation state, and by including a switchable shunt termination resistor for use in the high-isolation state. Some embodiments are serially coupled to attenuator circuits to enable synergistic interaction that reduces overall die size and/or increases isolation. One such embodiment positions a high-isolation phase shifter cell in accordance with the present invention between bracketing programmable attenuators.

    HIGH RESOLUTION ATTENUATOR OR PHASE SHIFTER WITH WEIGHTED BITS
    50.
    发明申请
    HIGH RESOLUTION ATTENUATOR OR PHASE SHIFTER WITH WEIGHTED BITS 审中-公开

    公开(公告)号：US20190393852A1

    公开(公告)日：2019-12-26

    申请号：US16013844

    申请日：2018-06-20

    Applicant: pSemi Corporation

    Inventor： Vikas Sharma ,  Peter Bacon

    IPC: H03H7/25 ,  H03H11/24 ,  H03H7/20 ,  H03H11/20 ,  H03K17/687

    Abstract: Digital step attenuator (DSA) and digital phase shifter (DPS) multi-stage circuit architectures that provide for high resolution. Embodiments use a dithering approach to weight bit positions to provide a much finer resolution than the lowest-valued individual stage. Bit position weights for stages are determined so as to enable selection of combinations of n bit positions that provide a desired total attenuation or phase shift range while allowing utilization of the large number of states (2n) available to produce fractional intermediate steps of attenuation or phase shift. The fractional intermediate steps have a resolution finer than the lowest-valued stage. Bit position weights may be determined using a weighting function, including weightings determined from a linear series, a geometric series, a harmonic series, or alternating variants of such series. In some embodiments, at least one bit position has a fixed value that is not determined by the bit position weighting function.

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