warneck
    41.
    发明授权
    warneck 失效

    公开(公告)号:US2734181A

    公开(公告)日:1956-02-07

    申请号:US2734181D

    CPC classification number: B60Q1/1407

    Constant Current Power Driver Circuit For Automotive Light Assembly

    公开(公告)号:US20180184491A1

    公开(公告)日:2018-06-28

    申请号:US15844727

    申请日:2017-12-18

    Abstract: A constant current driver circuit is provided for a vehicle light assembly having a plurality of light strings arranged in parallel with each other. Each light string in the plurality of light strings includes at least one light emitting diode (LED) electrically coupled in series with an LED driver. The driver circuit includes a bias circuit, a voltage regulator circuit and a sense circuit. The bias circuit is electrically coupled to each LED driver at a common node and, in absence of a trigger signal, operates to supply a bias voltage to each LED driver. The voltage regulator circuit is electrically coupled to the common node and regulates the bias voltage supplied by the bias circuit. The sense circuit is configured to detect on/off state of the voltage regulator and, in response to detecting an off state for the voltage regulator, provides a trigger signal to the bias circuit.

    Semiconductor device
    48.
    发明授权

    公开(公告)号:US09832824B2

    公开(公告)日:2017-11-28

    申请号:US15271513

    申请日:2016-09-21

    Inventor: Noriyuki Tanaka

    CPC classification number: H05B33/0815 B60Q1/1407 H02M3/156 H02M2001/0025

    Abstract: There was a problem that it was difficult for a semiconductor device in the related art to increase the switching frequency of a step-up circuit, and it was difficult to stabilize an output current and an output voltage. A semiconductor device controls a step-up circuit including an inductor and a drive transistor to drive the inductor. The semiconductor device calculates upper and lower limits which determine the variable range of an input current, based on an output current and an input voltage, controls the switch timing of the drive transistor based on the relation between the upper and lower limits and the magnitude of the input current, and at the same time, corrects the upper and lower limits to be calculated, based on the magnitude of the difference between the output current and a target output current value as an ideal value of the output current.

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