ELECTRONICS UNIT WITH INTEGRATED METALLIC PATTERN

    公开(公告)号:US20210242115A1

    公开(公告)日:2021-08-05

    申请号:US17165295

    申请日:2021-02-02

    Abstract: A non-conductive encapsulation cover is mounted on a support face of a support substrate to delimit, with the support substrate, an internal housing. An integrated circuit chip is mounted to the support substrate within the internal housing. A metal pattern is mounted to an internal wall of the non-conductive encapsulation cover in a position facing the support face. At least two U-shaped metal wires are provided within the internal housing, located to a side of the integrated circuit chip, and fixed at one end to the metallic pattern and at another end to the support face.

    POWER SUPPLY CONTROL METHOD
    524.
    发明申请

    公开(公告)号:US20210173469A1

    公开(公告)日:2021-06-10

    申请号:US17111877

    申请日:2020-12-04

    Inventor: Gerald BRIAT

    Abstract: A memory chip includes at least two memory blocks. In a method for controlling power supply for the memory blocks of the memory chip, each memory block receives a command for switching to standby mode. The commands are issued, for example by a processor, separately for each memory block in order to be able to individually place the memory block in standby mode.

    Method for arbitrating access to a shared memory, and corresponding electronic device

    公开(公告)号:US11023392B2

    公开(公告)日:2021-06-01

    申请号:US16794612

    申请日:2020-02-19

    Abstract: Access to a memory shared between a first interface and a second interface is arbitrated. Following a request to access the memory emanating from the second interface, while current access to the memory is granted to the first interface, a count is triggered having a maximum count time. A access to the memory is authorized for the second interface at the end of occupation of the access granted to the first interface if the end of occupation finishes before the end of the maximum count time, or otherwise at the end of the maximum count time.

    Method and device for decreasing the power supply voltage of a c-type USB receiver device supporting a USB power delivery mode

    公开(公告)号:US11018576B2

    公开(公告)日:2021-05-25

    申请号:US16379461

    申请日:2019-04-09

    Inventor: Christophe Lorin

    Abstract: A USB source device, supporting USB Power Delivery mode and coupled to a USB receiver device, includes a power converter delivering a supply voltage and a capacitive network coupled to the power converter. A method for managing the supply voltage on an output power supply pin of the USB source device includes discharging the capacitive network so as to reduce the supply voltage in response to a request to reduce the supply voltage by the USB receiver device to a target voltage. The method also includes delivering, to the power converter, a setpoint voltage for the supply voltage, a value of the setpoint voltage being reduced non-linearly so as to keep a temporal variation of the setpoint voltage lower than that of the supply voltage.

    Voltage Converter
    527.
    发明申请

    公开(公告)号:US20210135574A1

    公开(公告)日:2021-05-06

    申请号:US17089102

    申请日:2020-11-04

    Abstract: In an embodiment, a voltage converter includes: a first transistor coupled between an internal node and a first node receiving a supply voltage; a second transistor coupled between the internal node and a second node receiving a reference voltage; an inductance coupled between the internal node and an output node; a first circuit controlling the first and second transistors; and a second circuit configured to detect, when the first and second transistors are in the off state, when the voltage of the internal node is equal to the voltage of the output node, to condition a switching to the on state of the first transistor.

    Light sensor
    529.
    发明授权

    公开(公告)号:US10998455B2

    公开(公告)日:2021-05-04

    申请号:US16665119

    申请日:2019-10-28

    Abstract: A light sensor includes first and second neighboring photodiodes that are separated from each other by a space. A light-absorbing material is positioned at a location which is vertically above the space between the neighboring photodiodes. A first multilayer interference filter includes a central portion located vertically above the first photodiode and a peripheral portion that at least partly extends to rest on top of and in contact with the light-absorbing material.

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