公开(公告)号：US11515235B2

公开(公告)日：2022-11-29

申请号：US17117449

申请日：2020-12-10

Applicant: GaN Systems Inc.

Inventor： Ahmad Mizan ,  Edward MacRobbie

IPC: H01L23/482 ,  H01L29/778 ,  H01L29/20

Abstract: Circuit-Under-Pad (CUP) device topologies for high-current lateral power switching devices are disclosed, in which the interconnect structure and pad placement are configured for reduced source and common source inductance. In an example topology for a power semiconductor device comprising a lateral GaN HEMT, the source bus runs across a centre of the active area, substantially centered between first and second extremities of source finger electrodes, with laterally extending tabs contacting the underlying source finger electrodes. The drain bus is spaced from the source bus and comprises laterally extending tabs contacting the underlying drain finger electrodes. The gate bus is centrally placed and runs adjacent the source bus. Preferably, the interconnect structure comprises a dedicated gate return bus to separate the gate drive loop from the power loop. Proposed CUP device structures provide for lower source and common source inductance and/or higher current carrying capability per unit device area.

公开(公告)号：US11374489B2

公开(公告)日：2022-06-28

申请号：US17070309

申请日：2020-10-14

Applicant: GaN Systems Inc.

Inventor： Yajie Qiu ,  Xuechao Liu

IPC: H02M3/07 ,  H02M7/06

Abstract: A circuit for a multi-voltage input AC/DC charger, such as a Universal AC input AC/DC charger, is provided, comprising a plurality of capacitors having different voltage ratings that are connected in parallel, and a switching circuit comprising input voltage sensing and comparator drive circuitry, to allow for selective connection of one or more of the plurality of capacitors, responsive to a sensed input voltage. Since bulk capacitors occupy a significant proportion of the volume of an AC/DC charger, this solution provides for a reduction in system volume, with associated improvement in the power density of an isolated AC/DC charger.

公开(公告)号：US20220182048A1

公开(公告)日：2022-06-09

申请号：US17533365

申请日：2021-11-23

Applicant: GaN Systems Inc.

Inventor： Xuechao LIU ,  Ruoyu HOU

IPC: H03K17/082 ,  H02M1/00 ,  H02M1/32 ,  H02M3/335 ,  H01L29/20

Abstract: High accuracy current sense circuitry for power switching devices comprising GaN power transistors provides for current feedback functions, e.g. current loop control, over-current protection (OCP) and short-circuit protection (SCP). The current sense circuitry comprises a current mirror sense GaN transistor (Sense_GaN) and a power GaN transistor (Power_GaN) and a sampling circuit. The sampling circuit comprises first and second stage operational amplifiers to provide fast response and improved current sense accuracy, e.g. better than 1%, over a range of junction temperatures Tj. The Sense_GaN, Power_GaN and first stage operational amplifier have a common ground referenced to a Kelvin Source of the Power_GaN, so that the Sense_GaN and Power_GaN operate with the same gate-to-source voltage Vgs, to provide an accurate current ratio. Applications include current sensing for switching mode power supplies that need high speed and lossless current sense for current protection and feedback.

公开(公告)号：US20210398875A1

公开(公告)日：2021-12-23

申请号：US17465345

申请日：2021-09-02

Applicant: GaN Systems Inc.

Inventor： Juncheng LU ,  Di CHEN ,  Larry SPAZIANI ,  Peter Anthony DI MASO

IPC: H01L23/367 ,  H01L23/538 ,  H01L29/778 ,  H01L29/20 ,  H01L25/11 ,  H01L23/498

Abstract: Low inductance power modules for ultra-fast wide-bandgap semiconductor power switching devices are disclosed. Conductive tracks define power buses for a switching topology, e.g. comprising GaN E-HEMTs, with power terminals extending from the power buses through the housing to provide a heatsink-to-busbar distance which meets creepage and clearance requirements. Low-profile, low-inductance terminals for gate and source-sense connections extend from contact areas located adjacent each power switching device to provide for a low inductance gate drive loop, for high di/dt switching. The gate driver board is mounted on the low-profile terminals, inside or outside of the housing, with decoupling capacitors provided on the driver board. For paralleled switches, additional terminals, which are referred to as dynamic performance pins, are provided to the power buses. These pins are configured to provide a low inductance path for high-frequency current and balance inductances of the power commutation loops for each switch.

公开(公告)号：US20210367035A1

公开(公告)日：2021-11-25

申请号：US17393846

申请日：2021-08-04

Applicant: GaN Systems Inc.

Inventor： Ahmad MIZAN ,  Hossein MOUSAVIAN ,  Xiaodong CUI

IPC: H01L29/06 ,  H01L23/482 ,  H01L23/528 ,  H01L23/522 ,  H01L29/205 ,  H01L29/423

Abstract: Circuit-Under-Pad (CUP) device topologies for high current lateral GaN power transistors comprise source, drain and gate finger electrodes on active regions of a plurality of sections of a multi-section transistor, and a contact structure comprising source and drain contact areas, e.g. drain and source pads extending over active regions of each section, interconnected by conductive micro-vias to respective underlying drain and source finger electrodes. Alternatively, source contact areas comprise parts of a source bus which runs over inactive regions. For reduced gate loop inductance, the source bus may be routed over or under the to gate bus. The pad structure and the micro-via interconnections are configured to reduce current density in self-supported widths of the drain finger electrodes. Example CUP device structures provide for higher current carrying capability and reduced drain-source resistance.

公开(公告)号：US11082039B2

公开(公告)日：2021-08-03

申请号：US15807021

申请日：2017-11-08

Applicant: GaN Systems Inc.

Inventor： Di Chen ,  Larry Spaziani

IPC: H02H3/00 ,  H03K17/081 ,  H01L29/20 ,  H01L29/423 ,  H01L29/778 ,  H03K17/082 ,  H03K17/16 ,  H01L25/18 ,  H01L27/06 ,  H01L49/02

Abstract: A GaN power switching device comprises a GaN transistor switch SW_MAIN has an integrated drain voltage sense circuit, which comprises GaN sense transistor SW_SEN and GaN sense resistor RSEN, which at turn-on form a resistive divider for sensing the drain voltage of SW_MAIN to provide a drain voltage sense output VDSEN. Fault detection logic circuitry of a driver circuit generates a fault signal FLT when VDSEN reaches or exceeds a reference voltage Vref, which triggers fast turn-off of the gate of SW_MAIN, e.g. within less than 100 ns of an overcurrent or short circuit condition. During turn-off, RSEN resets VDSEN to zero. For two stage turn-off, the driver circuit further comprises fast soft turn-off circuitry which is triggered first by the fault signal to pull-down the gate voltage to the threshold voltage, followed by a delay before full turn-off of the gate of SW_MAIN by the gate driver.

公开(公告)号：US20210234471A1

公开(公告)日：2021-07-29

申请号：US17230390

申请日：2021-04-14

Applicant: GaN Systems Inc.

Inventor： Yajie QIU ,  Xuechao LIU

IPC: H02M7/217 ,  H02M1/36 ,  H02M1/08

Abstract: A bulk capacitor circuit for an AC input AC/DC Switching Mode Power Supply, such as an AC/DC adapter/charger without active power factor correction, is provided, comprising a plurality of bulk capacitors having different voltage ratings, and driver and control circuitry comprising AC input voltage sensing and comparator circuitry, which enables selective connection of one or more of the plurality of bulk capacitors, responsive to a sensed AC input voltage range. A startup circuit provides power to the driver circuit initially, so that the AC input voltage can be determined before power-up and enabling of the DC/DC converter. This solution provides for a reduction in capacitor volume, with associated improvement in the power density of an isolated AC/DC power supply, while the startup circuit ensures that an appropriate bulk capacitance is connected at startup for low line AC input, to maintain the ripple voltage in an appropriate range for reliable operation.

公开(公告)号：US20210111533A1

公开(公告)日：2021-04-15

申请号：US17047509

申请日：2020-02-27

Applicant: GaN Systems Inc.

Inventor： Hossein MOUSAVIAN ,  Larry SPAZIANI

IPC: H01S5/042 ,  H01S5/40 ,  G01S7/484 ,  G01S17/10 ,  H03K3/012

Abstract: Pulsed laser drivers are disclosed comprising Gallium Nitride (GaN) power transistors for driving diode laser systems requiring high current and fast pulses, such as laser drivers for LIDAR (Light Detection and Ranging) systems. Drivers are capable of delivering pulses with peak current ≥100 A, e.g. 170 A to provide high peak power, fast pulses with nanosecond rise times and nanosecond pulse duration, for driving multi-channel laser diode arrays with 40 A per channel for 120 W output per channel for a combined peak output of 480 W. For lower duty cycle, example driver circuits are disclosed comprising a high current power transistor for direct drive with drive assist. For higher duty cycle, example resonant driver circuits are disclosed comprising two high current power transistors. Implementation of resonant driver circuits with GaN technology provides fast charging for short pulse operation at higher repetition rates or for pulse code modulation.

公开(公告)号：US10778114B2

公开(公告)日：2020-09-15

申请号：US16251696

申请日：2019-01-18

Applicant: GaN Systems Inc.

Inventor： Juncheng Lu ,  Di Chen ,  Larry Spaziani

IPC: H02M7/487 ,  H02M7/537 ,  H03K17/0412 ,  H01L29/739 ,  H03K17/284 ,  H03K17/60 ,  H03K17/687 ,  H03K17/12 ,  H02M1/00

Abstract: A 3-level T-type neutral point clamped (NPC) inverter/rectifier is disclosed in which neutral point clamping is dynamically enabled/disabled responsive to load, e.g. enabled at low load for operation in a first mode as a 3-level inverter/rectifier and disabled at high/peak load for operation in a second mode as a 2-level inverter/rectifier. When the neutral clamping leg is enabled only under low load and low current, middle switches S2 and S3 can be smaller, lower cost devices with a lower current rating. Si, SiC, GaN and hybrid implementations provide options to optimize efficiency for specific load ratios and applications. For reduced switching losses and enhanced performance of inverters based on Si-IGBT power switches, a hybrid implementation of the dual-mode T-type NPC inverter is proposed, wherein switches S1 and S4 comprise Si-IGBTs and switches S2 and S3 of the neutral clamping leg comprise GaN HEMTs. Applications include electric vehicle traction inverters.

公开(公告)号：US20200185302A1

公开(公告)日：2020-06-11

申请号：US16705696

申请日：2019-12-06

Applicant: GaN Systems Inc.

Inventor： Juncheng LU ,  Di CHEN ,  Larry SPAZIANI ,  Peter Anthony DI MASO

IPC: H01L23/367 ,  H01L23/538 ,  H01L23/498 ,  H01L29/20 ,  H01L25/11 ,  H01L29/778

Abstract: Low inductance power modules for ultra-fast wide-bandgap semiconductor power switching devices are disclosed. Conductive tracks define power buses for a switching topology, e.g. comprising GaN E-HEMTs, with power terminals extending from the power buses through the housing to provide a heatsink-to-busbar distance which meets creepage and clearance requirements. Low-profile, low-inductance terminals for gate and source-sense connections extend from contact areas located adjacent each power switching device to provide for a low inductance gate drive loop, for high di/dt switching. The gate driver board is mounted on the low-profile terminals, inside or outside of the housing, with decoupling capacitors provided on the driver board. For paralleled switches, additional terminals, which are referred to as dynamic performance pins, are provided to the power buses. These pins are configured to provide a low inductance path for high-frequency current and balance inductances of the power commutation loops for each switch.