公开(公告)号：US08753068B2

公开(公告)日：2014-06-17

申请号：US13096419

申请日：2011-04-28

申请人： Noriaki Matsunaga ,  Hiroki Aso

发明人： Noriaki Matsunaga ,  Hiroki Aso

IPC分类号： F04D29/041

CPC分类号： F04D13/0633 ,  F04D29/0473

摘要： A highly efficient and long-life pump is provided through improvement of pump efficiency by extending an effective length of a blade of an impeller and through reduction of friction loss of a thrust bearing. In a pump 110, a suction direction X and a discharge direction Y of a liquid are approximately perpendicular to each other. The pump 100 includes a shaft 27 positioned downstream of a suction inlet 22; an impeller 25 configured in a disk shape that rotates around the shaft 27, the impeller 25 having a plurality of blades 25c formed radially in a radial direction from a center area located at a center portion of the disk shape as seen in the suction direction X, the plurality of blades 25c being positioned at an approximately same longitudinal position as a longitudinal position of a discharge outlet 23; and a bearing (18-1) that receives the shaft 27, the bearing (18-1) being positioned at the center area of the impeller 25 and having a through hole (18-1c) as a guide portion for guiding the liquid drawn in from the suction inlet 22 to the discharge outlet 23.

摘要翻译： 通过延长叶轮的叶片的有效长度并减少推力轴承的摩擦损失，提高了泵效率的高效率和寿命长的泵。 在泵110中，液体的吸入方向X和排出方向Y大致垂直。 泵100包括位于吸入口22下游的轴27; 叶轮25，其构造成围绕轴27旋转的盘状，叶轮25具有多个叶片25c，该多个叶片25c从位于盘形状的中心部分的沿吸入方向X看的中心区域径向地形成 多个叶片25c位于与排出口23的纵向位置大致相同的纵向位置; 和承载轴27的轴承（18-1），轴承（18-1）位于叶轮25的中心区域，并具有通孔（18-1c）作为引导部分，用于引导液体 从吸入口22到排出口23。

公开(公告)号：US08358008B2

公开(公告)日：2013-01-22

申请号：US12726520

申请日：2010-03-18

申请人： Makoto Wada ,  Noriaki Matsunaga ,  Yosuke Akimoto

发明人： Makoto Wada ,  Noriaki Matsunaga ,  Yosuke Akimoto

IPC分类号： H01L23/532

CPC分类号： H01L23/53238 ,  H01L21/76807 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76862 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53276 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device according to one embodiment includes: a semiconductor substrate; an insulating film provided on the semiconductor substrate and containing a wiring trench; a first catalyst layer provided directly or via another member on side and bottom surfaces of the wiring trench; and a first graphene layer provided in the wiring trench so as to be along the side and bottom surface of the wiring trench, the first graphene layer being provided on the first catalyst layer so as to be in contact with the first catalyst layer.

摘要翻译： 根据一个实施例的半导体器件包括：半导体衬底; 绝缘膜，设置在所述半导体基板上并且包含布线沟槽; 第一催化剂层，直接地或经由布线沟槽的侧表面和底表面上的另一个构件提供; 以及设置在所述布线沟槽中以沿着所述布线沟槽的侧面和底面的第一石墨烯层，所述第一石墨烯层设置在所述第一催化剂层上以与所述第一催化剂层接触。

公开(公告)号：US07999390B2

公开(公告)日：2011-08-16

申请号：US12137623

申请日：2008-06-12

申请人： Takeshi Ishigaki ,  Noriaki Matsunaga

发明人： Takeshi Ishigaki ,  Noriaki Matsunaga

IPC分类号： H01L23/48

CPC分类号： H01L21/76816 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor integrated circuit according to an example of the present invention includes a first interconnect extending in a first direction, a second interconnect arranged over the first interconnect and extending in a second direction intersecting the first direction, a first via for connecting a first contact part of the first interconnect and a second contact part of the second interconnect, and a second via for connecting a third contact part of the first interconnect and a fourth contact part of the second interconnect. The first and third contact parts are arranged by being aligned in the first direction, and the second and fourth contact parts are arranged by being aligned in the second direction.

摘要翻译： 根据本发明的示例的半导体集成电路包括：沿第一方向延伸的第一互连，布置在第一互连上并沿与第一方向相交的第二方向延伸的第二互连;第一通孔，用于连接第一接触部分 和第二互连的第二接触部分，以及用于连接第一互连的第三接触部分和第二互连的第四接触部分的第二通孔。 第一接触部和第三接触部通过沿第一方向排列配置，第二接触部和第四接触部通过沿第二方向对准而配置。

公开(公告)号：US20110177687A1

公开(公告)日：2011-07-21

申请号：US13075374

申请日：2011-03-30

申请人： Noriaki MATSUNAGA

发明人： Noriaki MATSUNAGA

IPC分类号： H01L21/768

CPC分类号： H01L23/53295 ,  H01L21/76801 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a plurality of first group wiring layers laminated on a substrate, and each of the first group wiring layers having a wire formed with a first minimum wire width and a main dielectric film portion; and a plurality of second group wiring layers laminated on a top layer of the plurality of first group wiring layers and each of the second group wiring layers having a wire formed with a second minimum wire width greater than the first minimum wire width and a main dielectric film portion, wherein a main dielectric film portion in a bottom layer of the plurality of second group wiring layers has a relative dielectric constant which is substantially identical to a relative dielectric constant of main dielectric film portions of the other second group wiring layers, and Young's modulus of the main dielectric film portion in the bottom layer of the plurality of second group wiring layers is smaller than those of the main dielectric film portions of the other second group wiring layers and larger than those of main dielectric film portions of the first group wiring layers.

摘要翻译： 半导体器件包括层叠在基板上的多个第一组布线层，并且每个第一组布线层具有形成有第一最小布线宽度的线和主电介质膜部分; 以及多个第二组布线层，层叠在多个第一组布线层的顶层上，并且每个第二组布线层具有形成有大于第一最小布线宽度的第二最小布线宽度的导线，以及主电介质 其中，所述多个第二组布线层的底层中的主电介质膜部分具有与其它第二组布线层的主电介质膜部分的相对介电常数基本相同的相对介电常数，并且Young 多个第二组布线层的底层中的主电介质膜部分的模量小于其它第二组布线层的主电介质膜部分的模量，并且大于第一组布线的主电介质膜部分的模量 层。

公开(公告)号：US20090283913A1

公开(公告)日：2009-11-19

申请号：US12435485

申请日：2009-05-05

申请人： Yumi HAYASHI ,  Noriaki Matsunaga ,  Takamasa Usui

发明人： Yumi HAYASHI ,  Noriaki Matsunaga ,  Takamasa Usui

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L21/76846 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76877 ,  H01L21/76886 ,  H01L21/76888 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a copper (Cu) wire having a first region and a second region in which densities of silicon (Si) and oxygen (O) atoms are higher than in the first region; a compound film that is selectively formed on the Cu wire and contains Cu and Si; and a dielectric film formed on a side surface side of the Cu wire.

摘要翻译： 半导体器件包括：铜（Cu）线，其具有第一区域和第二区域，其中硅（Si）和氧（O）原子的密度高于第一区域; 选择性地形成在Cu线上并含有Cu和Si的复合膜; 以及形成在Cu线的侧面侧的电介质膜。

公开(公告)号：US07459391B2

公开(公告)日：2008-12-02

申请号：US11208000

申请日：2005-08-22

申请人： Takahiko Yoshizawa ,  Noriaki Matsunaga ,  Naofumi Nakamura

发明人： Takahiko Yoshizawa ,  Noriaki Matsunaga ,  Naofumi Nakamura

IPC分类号： H01L21/4763

CPC分类号： H01L21/02115 ,  H01L21/0337 ,  H01L21/3105 ,  H01L21/31144 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76822 ,  H01L21/76826 ,  H01L21/76832 ,  H01L21/76835

摘要： The semiconductor device fabrication method according the present invention having, forming an interlayer dielectric film containing carbon above a semiconductor substrate, forming a protective film on that portion of the interlayer dielectric film, which is close to the surface and in which the carbon concentration is low, forming a trench by selectively removing a desired region of the interlayer dielectric film and protective film, such that the region extends from the surface of the protective film to the bottom surface of the interlayer dielectric film, supplying carbon to the interface between the interlayer dielectric film and protective film, and forming a conductive layer by burying a conductive material in the trench.

摘要翻译： 根据本发明的半导体器件制造方法，在半导体衬底上形成含有碳的层间电介质膜，在层间电介质膜的与表面接近的部分形成保护膜，其中碳浓度低 通过选择性地去除层间电介质膜和保护膜的期望区域形成沟槽，使得该区域从保护膜的表面延伸到层间电介质膜的底表面，将碳供应到层间电介质 膜和保护膜，并且通过在沟槽中埋入导电材料形成导电层。

公开(公告)号：US20060226393A1

公开(公告)日：2006-10-12

申请号：US10766961

申请日：2004-01-30

申请人： Takako Takei ,  Takeshi Araki ,  Takanori Sone ,  Hiroyuki Teramoto ,  Takayuki Hanaki ,  Noriaki Matsunaga

发明人： Takako Takei ,  Takeshi Araki ,  Takanori Sone ,  Hiroyuki Teramoto ,  Takayuki Hanaki ,  Noriaki Matsunaga

IPC分类号： H01F1/00

CPC分类号： H01F1/083 ,  H01F1/0578 ,  H01F1/113 ,  H01F41/0273

摘要： The present invention provides a plastic magnet precursor which can be supplied to a step of molding a plastic magnet at a constant composition without requiring a kneading step in which a resin is melted and sheared. Through injection molding using the precursor, a plastic magnet having little deterioration of magnetic properties and a small variation in quality is obtained. The plastic magnet precursor according to the present invention includes an Nd—Fe—B isotropic magnet powder (1) and a ferrite anisotropic magnet powder subjected to a coating treatment with a titanate coupling agent (4), and a thermoplastic resin powder (2) is adhered around the magnet powder (1) to form a powder shape.

摘要翻译： 本发明提供一种塑料磁体前体，其可以被供给到以恒定组成成型塑料磁体的步骤，而不需要将树脂熔融和剪切的捏合步骤。 通过使用前体的注射成型，可以获得磁性能变差小，质量变化小的塑料磁体。 根据本发明的塑料磁体前体包括Nd-Fe-B各向同性磁体粉末（1）和用钛酸酯偶联剂（4）进行涂覆处理的铁氧体各向异性磁体粉末和热塑性树脂粉末（2） 粘附在磁体粉末（1）周围以形成粉末形状。

公开(公告)号：US07091618B2

公开(公告)日：2006-08-15

申请号：US10806413

申请日：2004-03-23

申请人： Takahiko Yoshizawa ,  Noriaki Matsunaga ,  Naofumi Nakamura

发明人： Takahiko Yoshizawa ,  Noriaki Matsunaga ,  Naofumi Nakamura

IPC分类号： H01L23/532

CPC分类号： H01L21/76831 ,  H01L21/76808 ,  H01L21/76811 ,  H01L21/76829 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： An insulating film having dielectric constant not greater than 2.7 is provided above a semiconductor substrate. A via comprises a conductive material, which is provided in a via hole formed in the insulating film. A first interconnection comprises a conductive material, which is provided in an interconnection trench formed on the via in the insulating film. A first high-density region is formed in the insulating film, and has a cylindrical shape surrounding the via, an inner surface common to the boundary of the via hole, and a film density higher than the insulating film.

摘要翻译： 介电常数不大于2.7的绝缘膜设置在半导体衬底之上。 通孔包括导电材料，其设置在形成在绝缘膜中的通孔中。 第一互连包括导电材料，其设置在形成在绝缘膜中的通孔上的互连沟槽中。 第一高密度区域形成在绝缘膜中，并且具有围绕通孔的圆柱形状，通孔的边界共有的内表面和高于绝缘膜的膜密度。

公开(公告)号：US07084510B2

公开(公告)日：2006-08-01

申请号：US10765833

申请日：2004-01-29

申请人： Kazuyuki Higashi ,  Noriaki Matsunaga

发明人： Kazuyuki Higashi ,  Noriaki Matsunaga

IPC分类号： H01L29/40 ,  H01L21/44

CPC分类号： H01L21/76844 ,  H01L21/76874 ,  H01L21/76877 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device has an active element structure formed on a semiconductor substrate. A first insulating film is provided above the semiconductor substrate. A first interconnect layer composed of copper is provided in a surface of the first insulating film. A second insulating film is provided on the first insulating film. A connection hole is formed in the second insulating film and has its bottom connected to the first insulating layer. A connection plug composed of a single crystal of copper is filled in the connection hole so that no other crystals of copper are provided in the connection hole. An interconnect trench is formed in a surface of the second insulating film and has its bottom connected to the connection hole. A second interconnect layer is provided in the interconnect trench.

摘要翻译： 半导体器件具有形成在半导体衬底上的有源元件结构。 第一绝缘膜设置在半导体衬底的上方。 由铜构成的第一互连层设置在第一绝缘膜的表面上。 在第一绝缘膜上设置第二绝缘膜。 连接孔形成在第二绝缘膜中，并且其底部连接到第一绝缘层。 在连接孔中填充由铜单晶组成的连接插头，使得连接孔中不设置其他的铜晶体。 互连沟槽形成在第二绝缘膜的表面中，并且其底部连接到连接孔。 第二互连层设置在互连沟槽中。

公开(公告)号：US20060121734A1

公开(公告)日：2006-06-08

申请号：US11095567

申请日：2005-04-01

申请人： Kazuyuki Higashi ,  Masaki Yamada ,  Noriaki Matsunaga

发明人： Kazuyuki Higashi ,  Masaki Yamada ,  Noriaki Matsunaga

IPC分类号： H01L21/44 ,  H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/76834 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76867 ,  Y10S438/927

摘要： A semiconductor device, in which a semiconductor integrated circuit having a multi-level interconnection structure is formed, according to an embodiment of the present invention, comprises a copper wiring and an insulating layer formed on a top surface of the copper wiring, wherein the copper wiring includes an additive for improving adhesion between the copper wiring and the insulating layer, and a profile of the additive has a gradient in which a concentration is gradually reduced as it goes from the top surface of the copper wiring toward the inside thereof, and has the highest concentration on the top surface of the copper wiring.

摘要翻译： 根据本发明实施例的形成有多层互连结构的半导体集成电路的半导体器件包括在铜布线的上表面上形成的铜布线和绝缘层，其中铜 布线包括用于改善铜布线和绝缘层之间的粘附性的添加剂，并且添加剂的轮廓具有随着从铜布线的顶表面朝向其内部逐渐减小浓度的梯度，并且具有 在铜线上表面最高的浓度。