公开(公告)号：US20210057356A1

公开(公告)日：2021-02-25

申请号：US16547539

申请日：2019-08-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package device includes a wiring structure, a semiconductor chip and an encapsulant. The semiconductor chip is electrically connected to the wiring structure. The encapsulant is disposed on the wiring structure and covers the semiconductor chip. A roughness (Ra) of a surface of the encapsulant is about 5 nm to about 50 nm.

公开(公告)号：US20210035933A1

公开(公告)日：2021-02-04

申请号：US16528347

申请日：2019-07-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/48 ,  H01L23/31 ,  H01L23/498

Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a first semiconductor element and a first bonding structure. The first semiconductor element has a first element top surface and a first element bottom surface opposite to the element top surface. The first bonding structure is disposed adjacent to the element top surface of the first semiconductor element and includes a first electrical connector, a first insulation layer surrounding the first electrical connector, and a first metal layer surrounding the first insulation layer.

公开(公告)号：US20200251420A1

公开(公告)日：2020-08-06

申请号：US16264603

申请日：2019-01-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/544 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device package is provided, which includes a substrate, a semiconductor device and an alignment structure. The semiconductor device and the alignment structure are disposed on the substrate. The alignment structure is in direct contact with the semiconductor device.

公开(公告)号：US20200075540A1

公开(公告)日：2020-03-05

申请号：US16118235

申请日：2018-08-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU ,  Jen-Kuang FANG

IPC: H01L23/00 ,  H01L21/762 ,  H01L23/498 ,  H01L23/28

Abstract: A substrate panel structure includes a plurality of sub-panels and a dielectric portion. Each of the sub-panels includes a plurality of substrate units. The dielectric portion is disposed between the sub-panels.

公开(公告)号：US20190363064A1

公开(公告)日：2019-11-28

申请号：US15990210

申请日：2018-05-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

Abstract: A semiconductor device package includes a circuit layer, an electronic component, an electronic component, a first passivation layer and a second passivation layer. The circuit layer has a first surface. The electronic component is disposed on the first surface of the circuit layer. The first passivation layer is disposed on the first surface of the circuit layer. The first passivation layer has a first surface facing away the circuit layer. The second passivation layer is disposed on the first surface of the first passivation layer. The second passivation layer has a second surface facing away the circuit layer. A uniformity of the first surface of the first passivation layer is greater than a uniformity of the second surface of the second passivation layer.

公开(公告)号：US20190131231A1

公开(公告)日：2019-05-02

申请号：US15801108

申请日：2017-11-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/3157 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/5226 ,  H01L23/528 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/131 ,  H01L2224/16013 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/3841 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/013 ,  H01L2924/00014

Abstract: At least some embodiments of the present disclosure relate to a substrate for packaging a semiconductor device. The substrate includes a first dielectric layer having a first surface and a second surface opposite to the first surface, a first patterned conductive layer adjacent to the first surface of the first dielectric layer, a second patterned conductive layer adjacent to the second surface of the first dielectric layer and electrically connected to the first patterned conductive layer, and an external connection pad tapered from a top surface to a bottom surface. The second patterned conductive layer includes a pad and a trace adjacent to the pad. The external connection pad is disposed on the pad of the second patterned conductive layer. A bottom width of the external connection pad is greater than or equal to a width of the pad of the second patterned conductive layer.

公开(公告)号：US20190131220A1

公开(公告)日：2019-05-02

申请号：US15795201

申请日：2017-10-26

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: A substrate structure includes a dielectric layer, a first circuit layer, a second circuit layer and at least one conductive pillar. The dielectric layer has a first surface and a second surface opposite to the first surface. The first circuit layer is disposed adjacent to the first surface of the dielectric layer. The second circuit layer is disposed adjacent to the second surface of the dielectric layer and electrically connected to the first circuit layer. The second circuit layer includes a plurality of pads and at least one trace disposed between two adjacent pads of the plurality of pads. The at least one conductive pillar is tapered toward the second circuit layer and disposed on one of the pads. A portion of the second surface of the dielectric layer is exposed from the second surface layer.

公开(公告)号：US20190096823A1

公开(公告)日：2019-03-28

申请号：US15717705

申请日：2017-09-27

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jen-Kuang FANG ,  Wen-Long LU

IPC: H01L23/00 ,  H01L23/538 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package device comprises an electronic component, a conductive bump and a first conductive layer. The electronic component has a top surface. The conductive bump is disposed on the top surface of the electronic component. The conductive bump includes a main body and a protruding portion. The first conductive layer covers a portion of the protruding portion. The first conductive layer has a first upper surface and a second upper surface. The first upper surface and the second upper surface are not coplanar.

公开(公告)号：US20190053373A1

公开(公告)日：2019-02-14

申请号：US15673235

申请日：2017-08-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H05K1/11 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H05K1/111 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/02351 ,  H01L2224/0391 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/13024 ,  H01L2224/13147 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/18161 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A semiconductor package device comprises a passivation layer, a conductive element, a redistribution layer (RDL) and an electronic component. The passivation layer has a first surface and second surface opposite to the first surface. The conductive element is within the passivation layer. The conductive element defines a recess facing the second surface of the passivation layer. The RDL is on the passivation layer and electrically connected with the conductive element. The electronic component is disposed on the RDL and electrically connected with the RDL.

公开(公告)号：US20220367304A1

公开(公告)日：2022-11-17

申请号：US17317770

申请日：2021-05-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kuoching CHENG ,  Yuan-Feng CHIANG ,  Ya Fang CHAN ,  Wen-Long LU ,  Shih-Yu WANG

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/16 ,  H01L23/538 ,  H01L21/56

Abstract: An electronic device package and a method for manufacturing an electronic device package are provided. The electronic device package includes electronic device structure which includes a first electronic device and a first encapsulant, a second electronic device, and a second encapsulant. The first encapsulant encapsulates the first electronic device. The second electronic device is adjacent to the electronic device structure. The second encapsulant encapsulates the electronic device structure and the second electronic device. A first extension line along a lateral surface of the first electronic device and a second extension line along a lateral surface of the first encapsulant define a first angle, the second extension line along the lateral surface of the first encapsulant and a third extension line along a lateral surface of the second electronic device define a second angle, and the first angle is different from the second angle.