公开(公告)号：US09218992B2

公开(公告)日：2015-12-22

申请号：US14166715

申请日：2014-01-28

申请人： Applied Materials, Inc.

发明人： Saravjeet Singh ,  Brad Eaton ,  Ajay Kumar ,  Wei-Sheng Lei ,  James M. Holden ,  Madhava Rao Yalamanchili ,  Todd J. Egan

IPC分类号： H01L21/00 ,  H01L21/67 ,  H01L21/78 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/683 ,  H01L21/687 ,  B23K26/06 ,  B23K26/36 ,  B23K26/40

CPC分类号： H01L21/67069 ,  B23K26/0624 ,  B23K26/064 ,  B23K26/36 ,  B23K26/364 ,  B23K26/40 ,  B23K26/402 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/67092 ,  H01L21/67207 ,  H01L21/6836 ,  H01L21/68707 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/68377

摘要： Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The semiconductor wafer is supported by a substrate carrier. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits while supported by the substrate carrier.

摘要翻译： 对具有多个集成电路的各晶片的切割半导体晶片的方法和装置进行说明。 一种方法包括在半导体晶片上形成掩模，掩模由覆盖并保护集成电路的层组成。 半导体晶片由衬底载体支撑。 然后用激光划线工艺对掩模进行构图，以提供具有间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以在由衬底载体支撑的同时对集成电路进行分离。

公开(公告)号：US08993414B2

公开(公告)日：2015-03-31

申请号：US13938570

申请日：2013-07-10

申请人： Applied Materials, Inc.

发明人： Brad Eaton ,  Saravjeet Singh ,  Wei-Sheng Lei ,  Madhava Rao Yalamanchili ,  Tong Liu ,  Ajay Kumar

IPC分类号： H01L21/78 ,  H01L21/3065

CPC分类号： H01L21/67161 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/50 ,  H01J37/32651 ,  H01J37/32788 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/67069 ,  H01L21/67115 ,  H01L21/67742 ,  H01L21/78 ,  Y10T29/5124

摘要： In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a multi-plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch. The isotropic etch removes anisotropic etch byproducts, roughness, and/or scalloping from the anisotropically etched die sidewalls after die singulation.

摘要翻译： 在实施例中，实施涉及初始激光划片和随后的等离子体蚀刻的混合晶片或衬底切割工艺用于裸片切割。 激光划片工艺可用于清洁地去除掩模层，有机和无机介电层以及器件层。 然后可以在曝光或部分蚀刻晶片或衬底时终止激光蚀刻工艺。 在实施例中，采用多等离子体蚀刻方法来骰子晶片，其中采用各向同性蚀刻来改善各向异性蚀刻后的管芯侧壁。 各向同性蚀刻在单片切割之后从各向异性蚀刻的模具侧壁去除各向异性蚀刻副产物，粗糙度和/或扇贝。

公开(公告)号：US08846498B2

公开(公告)日：2014-09-30

申请号：US14148499

申请日：2014-01-06

申请人： Applied Materials, Inc.

发明人： Wei-Sheng Lei ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar

IPC分类号： H01L21/00 ,  H01L21/78

CPC分类号： H01L21/78 ,  B23K26/0608 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  H01L21/3086

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a multi-step laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 一种方法包括在半导体晶片上形成掩模。 掩模由覆盖和保护集成电路的层组成。 用多步骤激光划线工艺对掩模进行图案化以提供具有间隙的图案化掩模。 图案化使得集成电路之间的半导体晶片的区域露出。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以对集成电路进行分离。

公开(公告)号：US08652940B2

公开(公告)日：2014-02-18

申请号：US13851442

申请日：2013-03-27

申请人： Applied Materials, Inc.

发明人： Wei-Sheng Lei ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar

IPC分类号： H01L21/00

CPC分类号： H01L21/78 ,  B23K26/0608 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  H01L21/3086

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a multi-step laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 一种方法包括在半导体晶片上形成掩模。 掩模由覆盖和保护集成电路的层组成。 用多步骤激光划线工艺对掩模进行图案化以提供具有间隙的图案化掩模。 图案化使得集成电路之间的半导体晶片的区域露出。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以对集成电路进行分离。