Abstract:
A method for forming a semiconductor device includes forming a photoresist layer over a substrate and patterning the photoresist layer to form photoresist portions. A second layer is formed over the substrate in areas not covered by the photoresist portions and the photoresist portions are removed. After removing the photoresist portions, the second layer is used to modify the substrate to create at least a portion of the semiconductor device.
Abstract:
A methodology for doing process control by using a heating apparatus comprising heating zones is revealed. First, a target CD (critical dimension) map is assigned. A baseline CD map corresponding to a substrate processed with the heating apparatus at a baseline setting is also obtained. An original CD map corresponding to a substrate processed at an original setting is obtained. For each heating zone, a perturbed CD map corresponding to a substrate processed at a perturbed setting is also obtained. The temperature distribution of the heating apparatus is adjusted according to the error CD map defined by the baseline CD map and the target CD map, basis functions defined by the original CD map and perturbed CD maps, and expansion coefficients expanding the error CD map with basis functions.
Abstract:
An apparatus for mounting at least one hard pellicle to a mask which includes an enclosure having an interior cavity, demounting means for removing a protective cover from a mask, mounting means for mounting at least one hard pellicle to the mask and conduit means for pumping a light-transmitting gas into the interior cavity between the hard pellicle and the mask.
Abstract:
A multi-station Step and Repeat Apparatus (Stepper) for imaging semiconductor wafers. The stepper has at least 2 stations, at least one of which is for imaging. The second station may be used for image field characterization, or image defect correction, or for Phase Shift Mask (PSM) loop cutting. Multiple laser beams directed in orthogonal directions provide interferometric monitoring to track wafer locations for wafers on the stepper.
Abstract:
A dynamic pattern display and optical data processing system is provided including magnetic bubble devices which may be operated in real-time to produce a multi-tone (gray scale) two dimensional pattern. The display pattern is obtained by directing a light beam, which in certain applications may be linearly polarized, through a plurality of two-dimensional magnetic bubble arrays combined in a stack arrangement. Each magnetic bubble array constitutes a layer which differs in thickness from the other magnetic bubble layers. Each magnetic bubble array is also electronically driven by its own bubble propagating circuit which produces, in most embodiments, a different "local transmissivity" which is determined by whether a bubble or an empty space is propagated to the location. The degree of transmitted intensity is an exponential function of the number of magnetic bubble layers, thus n layers provides 2.sup.n steps of transmitted intensity and a four layer structure provides a sixteen tone gray scale display. The electronic portion of the structure may be driven by signals representing mathematical expressions, patterns, manual inputs and the like to generate holograms, holographic complex filters, three-dimensional television pictures, spatial intensity filters, or ordinary two-dimensional multi-tone television pictures.
Abstract:
The present disclosure provides a method of increasing the wafer throughput by an electron beam lithography system. The method includes scanning a wafer using the maximum scan slit width (MSSW) of the electron beam writer. By constraining the integrated circuit (IC) field size to allow the MSSW to cover a complete field, the MSSW is applied to decrease the scan lanes of a wafer and thereby increase the throughput. When scanning the wafer with the MSSW, the next scan lane data can be rearranged and loaded into a memory buffer. Thus, once one scan lane is finished, the next scan lane data in the memory buffer is read for scanning.
Abstract:
A method and material layer for forming a pattern are disclosed. The method includes providing a substrate; forming a first material layer over the substrate; forming a second material layer over the first material layer, wherein the second material layer comprises a photoacid generator and a photobase generator; and exposing one or more portions of the second material layer.
Abstract:
A method of via patterning mask assignment for a via layer using double patterning technology, the method includes determining, using a processor, if a via of the via layer intercepts an underlying or overlaying metal structure assigned to a first metal mask. If the via intercepts the metal structure assigned to the first metal mask, assigning the via to a first via mask, wherein the first via mask aligns with the first metal mask. Otherwise, assigning the via to a second via mask, wherein the second via mask aligns with a second metal mask different from the first metal mask.
Abstract:
A lithography apparatus includes an imaging lens module, a substrate table positioned underlying the imaging lens module and configured to hold a substrate, and a cleaning module adapted to clean the lithography apparatus. The cleaning module comprises one inlet and one outlet for providing a cleaning fluid to and from a portion of the lithography apparatus to be cleaned, and an ultrasonic unit configured to provide ultrasonic energy to the cleaning fluid.
Abstract:
A method for fabricating a semiconductor device is disclosed. An exemplary method includes receiving an integrated circuit (IC) layout design including a target pattern on a grid. The method further includes receiving a multiple-grid structure. The multiple-grid structure includes a number of exposure grid segments offset one from the other by an offset amount in a first direction. The method further includes performing a multiple-grid exposure to expose the target pattern on a substrate and thereby form a circuit feature pattern on the substrate. Performing the multiple-grid exposure includes scanning the substrate with the multiple-grid structure in a second direction such that a sub-pixel shift of the exposed target pattern occurs in the first direction, and using a delta time (Δt) such that a sub-pixel shift of the exposed target pattern occurs in the second direction.