公开(公告)号：US07872262B2

公开(公告)日：2011-01-18

申请号：US12700678

申请日：2010-02-04

Applicant: Hsiang-Lin Lin ,  Sung-Kao Liu

Inventor： Hsiang-Lin Lin ,  Sung-Kao Liu

IPC: H01L29/04 ,  H01L29/10 ,  H01L31/00

CPC classification number: G02F1/136227 ,  G02F1/136213 ,  G02F2001/13606 ,  G02F2001/136218

Abstract: A method of manufacturing a pixel structure is provided. A first patterned conductive layer including a gate and a data line is formed on a substrate. A gate insulating layer is formed to cover the first patterned conductive layer and a semiconductor channel layer is formed on the gate insulating layer above the gate. A second patterned conductive layer including a scan line, a common line, a source and a drain is formed on the gate insulating layer and the semiconductor channel layer. The scan line is connected to the gate and the common line is located above the data line. The source and drain are located on the semiconductor channel layer, and the source is connected to the data line. A passivation layer is formed on the substrate to cover the second patterned conductive layer. A pixel electrode connected to the drain is formed on the passivation layer.

公开(公告)号：US20100315569A1

公开(公告)日：2010-12-16

申请号：US12483390

申请日：2009-06-12

Applicant: Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

Inventor： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

IPC: G02F1/1368 ,  H01L21/28

CPC classification number: G02F1/136213 ,  G02F1/136209 ,  G02F1/136286 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/124 ,  H01L27/1255

Abstract: This invention in one aspect relates to a pixel structure. In one embodiment, the pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode having a first portion and a second portion extending from the first portion, and formed over the scan line, the data line and the switch, where the first portion is overlapped with the switch and the second portion is overlapped with the data line, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode in the pixel area, where the first portion is overlapped with the first portion of the shielding electrode so as to define a storage capacitor therebetween and the second portion has no overlapping with the second portion of the shielding electrode.

Abstract translation: 本发明在一个方面涉及像素结构。 在一个实施例中，像素结构包括形成在衬底上的扫描线和形成在衬底上的限定像素区域的数据线，形成在衬底上的像素区域内的开关，具有第一部分和第二部分的屏蔽电极 从第一部分延伸并且在扫描线上形成数据线和开关，其中第一部分与开关重叠，并且第二部分与数据线重叠，并且具有第一部分和第二部分的像素电极 第二部分从第一部分延伸并且形成在像素区域中的屏蔽电极之上，其中第一部分与屏蔽电极的第一部分重叠，以便在其间限定存储电容器，并且第二部分与第二部分不重叠 屏蔽电极的第二部分。

公开(公告)号：US20100301345A1

公开(公告)日：2010-12-02

申请号：US12623497

申请日：2009-11-23

Applicant: Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

Inventor： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

IPC: H01L27/06 ,  H01L21/8234

CPC classification number: H01L27/124

Abstract: An array substrate and method for manufacturing the same is provided, wherein a data line is composed of first and second segments connected by a contact pad. First and second insulation layers are disposed between the first segment of the data line and a shielding electrode. In addition, the first insulation layer is disposed between the second segment of the data line and a gate line in their overlapping area. Accordingly, the coupling effect between the conductive layers can be reduced. For example, the RC delay problem due to parasitic capacitance between the shielding electrode and the data line is solved. As a result of the design of the two insulator layers between the first segment of the data line and the shielding electrode, the shorting between the conductive layers can also be simultaneously solved and the product yield can be increased.

Abstract translation: 提供阵列基板及其制造方法，其中数据线由通过接触焊盘连接的第一和第二部分组成。 第一和第二绝缘层设置在数据线的第一段和屏蔽电极之间。 此外，第一绝缘层设置在数据线的第二段和其重叠区域中的栅极线之间。 因此，可以降低导电层之间的耦合效应。 例如，解决了由于屏蔽电极和数据线之间的寄生电容引起的RC延迟问题。 作为数据线的第一段与屏蔽电极之间的两个绝缘体层的设计的结果，导电层之间的短路也可以同时解决，并且可以提高产品的产率。

公开(公告)号：US07842954B2

公开(公告)日：2010-11-30

申请号：US12775493

申请日：2010-05-07

Applicant: Wei-Sheng Yu ,  Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Hsien-Chieh Tseng ,  Han-Tu Lin

Inventor： Wei-Sheng Yu ,  Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Hsien-Chieh Tseng ,  Han-Tu Lin

IPC: H01L33/00

CPC classification number: H01L27/124 ,  H01L27/1248 ,  H01L27/1288

Abstract: An active matrix array structure, disposed on a substrate, includes a first patterned conductive layer, a patterned gate insulating layer, a patterned semiconductor layer, a second patterned conductive layer, a patterned overcoat layer and a transparent conductive layer. The patterned gate insulating layer has first openings that expose a part of the first patterned conductive layer. The patterned semiconductor layer is disposed on the patterned gate insulating layer. The second patterned conductive layer is disposed on the patterned semiconductor layer. The patterned overcoat layer has second openings that expose a part of the first patterned conductive layer and a part of the second patterned conductive layer. The transparent conductive layer is completely disposed on the substrate. The transparent conductive layer disposed in the first openings and the second openings is broken off at a position that is in between the substrate and the patterned overcoat layer.

Abstract translation: 设置在基板上的有源矩阵阵列结构包括第一图案化导电层，图案化栅极绝缘层，图案化半导体层，第二图案化导电层，图案化外涂层和透明导电层。 图案化栅极绝缘层具有暴露第一图案化导电层的一部分的第一开口。 图案化的半导体层设置在图案化的栅极绝缘层上。 第二图案化导电层设置在图案化的半导体层上。 图案化的外涂层具有暴露第一图案化导电层的一部分和第二图案化导电层的一部分的第二开口。 透明导电层完全设置在基板上。 设置在第一开口和第二开口中的透明导电层在基板和图案化外涂层之间的位置处断开。

公开(公告)号：US07768015B2

公开(公告)日：2010-08-03

申请号：US12269027

申请日：2008-11-11

Applicant: Te-Chun Huang ,  Kuo-Yu Huang ,  Hsiang-Lin Lin

Inventor： Te-Chun Huang ,  Kuo-Yu Huang ,  Hsiang-Lin Lin

IPC: H01L21/14

CPC classification number: H01L28/40 ,  H01L27/1255 ,  H01L27/1288

Abstract: A pixel structure of a display panel is provided. The pixel structure includes a first storage capacitor formed by a pixel electrode and a common electrode pattern, and a second storage capacitor formed by an electrode pattern and the common electrode pattern. Accordingly, the storage capacitance is greatly improved without sacrificing the aperture ratio, or the aperture ratio is improved by reducing the area of the storage capacitor while the storage capacitance is maintained.

Abstract translation: 提供了显示面板的像素结构。 像素结构包括由像素电极和公共电极图案形成的第一存储电容器和由电极图案和公共电极图案形成的第二存储电容器。 因此，在不牺牲开口率的情况下大大提高存储电容，或者通过在维持保持电容的同时减小存储电容器的面积来提高开口率。

公开(公告)号：US20090289259A1

公开(公告)日：2009-11-26

申请号：US12269027

申请日：2008-11-11

Applicant: Te-Chun Huang ,  Kuo-Yu Huang ,  Hsiang-Lin Lin

Inventor： Te-Chun Huang ,  Kuo-Yu Huang ,  Hsiang-Lin Lin

IPC: H01L33/00 ,  H01L21/336

CPC classification number: H01L28/40 ,  H01L27/1255 ,  H01L27/1288

Abstract: A pixel structure of a display panel is provided. The pixel structure includes a first storage capacitor formed by a pixel electrode and a common electrode pattern, and a second storage capacitor formed by an electrode pattern and the common electrode pattern. Accordingly, the storage capacitance is greatly improved without sacrificing the aperture ratio, or the aperture ratio is improved by reducing the area of the storage capacitor while the storage capacitance is maintained.

Abstract translation: 提供了显示面板的像素结构。 像素结构包括由像素电极和公共电极图案形成的第一存储电容器和由电极图案和公共电极图案形成的第二存储电容器。 因此，在不牺牲开口率的情况下大大提高存储电容，或者通过在维持保持电容的同时减小存储电容器的面积来提高开口率。

公开(公告)号：US20090033815A1

公开(公告)日：2009-02-05

申请号：US11941534

申请日：2007-11-16

Applicant: Hsiang-Lin Lin ,  Seok-Lyul Lee ,  Tun-Chun Yang

Inventor： Hsiang-Lin Lin ,  Seok-Lyul Lee ,  Tun-Chun Yang

IPC: G02F1/1343 ,  H01L27/088 ,  H01L21/84

CPC classification number: G02F1/133707 ,  G02F1/134336 ,  G02F2201/40 ,  H01L27/124 ,  H01L29/42384

Abstract: A pixel structure is provided. The pixel structure comprises a lower substrate with a transistor and pixel area; a first patterned conductive layer, which has a data line and a gate within the transistor area that is disposed on the lower substrate; a patterned insulator layer covering the first patterned conductive layer; an active layer disposed on the patterned insulator layer above the gate; a second patterned conductive layer with a gate line disposed on the patterned insulator layer, source and drain, wherein the source and the drain are disposed on the active layer; a pixel electrode disposed on the patterned insulator layer and electrically connected to the drain; a patterned passivation layer disposed on the patterned insulator layer, gate line, source, drain and pixel electrode; and a third patterned conductive layer, which has a data line connecting electrode, a gate line connecting electrode, at least one alignment electrode and a common electrode. The data line is electrically connected to the source through the data line connecting electrode; the gate line is electrically connected to the gate through the gate line connecting electrode; the alignment electrode is electrically connected to the pixel electrode; and a portion of the common electrode is disposed above the data line.

Abstract translation: 提供像素结构。 像素结构包括具有晶体管和像素区域的下基板; 第一图案化导电层，其具有设置在下基板上的晶体管区域内的数据线和栅极; 覆盖所述第一图案化导电层的图案化绝缘体层; 设置在栅极上方的图案化绝缘体层上的有源层; 第二图案化导电层，其栅极线设置在图案化绝缘体层，源极和漏极上，其中源极和漏极设置在有源层上; 设置在所述图案化绝缘体层上并电连接到所述漏极的像素电极; 布置在图案化绝缘体层，栅极线，源极，漏极和像素电极上的图案化钝化层; 以及具有数据线连接电极，栅极线连接电极，至少一个取向电极和公共电极的第三图案化导电层。 数据线通过数据线连接电极与源极电连接; 栅极线通过栅极线连接电极电连接到栅极; 对准电极电连接到像素电极; 并且公共电极的一部分设置在数据线的上方。

公开(公告)号：US20080111138A1

公开(公告)日：2008-05-15

申请号：US11692248

申请日：2007-03-28

Applicant: Hsiang-Lin Lin ,  Liu-Chung Lee ,  Kuo-Yu Huang

Inventor： Hsiang-Lin Lin ,  Liu-Chung Lee ,  Kuo-Yu Huang

IPC: H01L33/00

CPC classification number: G02F1/136213 ,  G02F2001/136218

Abstract: A pixel structure is disclosed. The pixel structure includes a substrate, a first data line having at least one end formed on the substrate, a first insulation layer overlying the first data line and exposing a part of the end of the first data line, a shielding electrode disposed on the first insulation layer and overlapped with the first data line, a second data line formed on the first insulation layer and electrically connected to the exposed end of the first data line, a second insulation layer overlying the shielding electrode and the second data line, and a pixel electrode formed on the second insulation layer and overlapped with the shielding electrode. The invention also provides a method for fabricating the pixel structure.

Abstract translation: 公开了像素结构。 像素结构包括基板，具有至少一个端部形成在基板上的第一数据线，覆盖第一数据线并暴露第一数据线的端部的一部分的第一绝缘层，设置在第一数据线上的屏蔽电极 绝缘层并且与第一数据线重叠，形成在第一绝缘层上并电连接到第一数据线的暴露端的第二数据线，覆盖屏蔽电极和第二数据线的第二绝缘层，以及像素 电极，形成在第二绝缘层上并与屏蔽电极重叠。 本发明还提供了一种用于制造像素结构的方法。

公开(公告)号：US20070236414A1

公开(公告)日：2007-10-11

申请号：US11382059

申请日：2006-05-08

Applicant: Hsiang-Lin Lin

Inventor： Hsiang-Lin Lin

IPC: G09G3/28

CPC classification number: G02F1/134309 ,  G02F1/136213 ,  G02F1/136286 ,  G02F2001/13606

Abstract: A liquid crystal display includes: a substrate; a plurality of pixel electrodes formed on the substrate and arranged corresponding to a pixel array; a first data line and a second data line formed on the substrate; a plurality of scan lines formed on the substrate, in which the scan lines cross the first data line and the second data line; a first branch electrode electrically connects a pixel electrode and partially overlaps the first data line; and a second branch electrode electrically connects the pixel electrode and partially overlaps the second data line, in which the first branch electrode and the second branch electrode are disposed opposite to the pixel electrode.

Abstract translation: 液晶显示器包括：基板; 多个像素电极，其形成在所述基板上并且对应于像素阵列排列; 形成在所述基板上的第一数据线和第二数据线; 形成在所述基板上的扫描线，其中所述扫描线与所述第一数据线和所述第二数据线交叉; 第一分支电极电连接像素电极并与第一数据线部分重叠; 并且第二分支电极电连接像素电极，并且与第二数据线部分重叠，其中第一分支电极和第二分支电极与像素电极相对设置。

公开(公告)号：US20070171320A1

公开(公告)日：2007-07-26

申请号：US11382712

申请日：2006-05-11

Applicant: Hsiang-Lin Lin

Inventor： Hsiang-Lin Lin

IPC: G02F1/136

CPC classification number: G02F1/136286 ,  G02F2001/13606 ,  G02F2001/136218 ,  G02F2201/40

Abstract: A pixel structure of a liquid crystal display (LCD) includes a scan line, a data line and a thin film transistor (TFT) disposed on the substrate. The TFT has a source electrically connected to the date line and a gate electrically connected to the scan line. A shielding electrode disposes on the substrate, wherein the same metal layer makes the shielding electrode, the source and the drain. Furthermore, the data line makes at least two different patterned metal, layers which are not formed simultaneously and the patterned metal layers are electrically connected to each other. A pixel electrode covers the part of the shielding electrode and electrically connects to the drain.

Abstract translation: 液晶显示器（LCD）的像素结构包括设置在基板上的扫描线，数据线和薄膜晶体管（TFT）。 TFT具有电连接到日期线的源极和电连接到扫描线的栅极。 屏蔽电极配置在基板上，其中相同的金属层形成屏蔽电极，源极和漏极。 此外，数据线使得至少两个不同的图案化金属层不同时形成，并且图案化的金属层彼此电连接。 像素电极覆盖屏蔽电极的一部分并电连接到漏极。