公开(公告)号：US07220632B2

公开(公告)日：2007-05-22

申请号：US11065324

申请日：2005-02-24

申请人： Robert E. Jones

发明人： Robert E. Jones

IPC分类号： H01L21/336 ,  H01L33/00

CPC分类号： H01L21/84 ,  H01L27/1203 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14683 ,  H01L31/103 ,  Y10S438/933

摘要： An integration process where a first semiconductor protective layer and a second semiconductor protective layer are formed to protect the first and second semiconductor materials, respectfully, during processing to form an optical device, such as a photodetector, and a transistor on the same semiconductor. The first semiconductor protective layer protects the semiconductor substrate during formation of the second semiconductor layer, and the second semiconductor layer protects the second semiconductor material during subsequent processing of the first semiconductor. In one embodiment, the first semiconductor includes silicon and the second semiconductor material includes germanium.

摘要翻译： 形成第一半导体保护层和第二半导体保护层以形成在相同半导体上形成诸如光电检测器和晶体管的光学器件的处理期间保护第一和第二半导体材料的积分过程。 第一半导体保护层在形成第二半导体层期间保护半导体衬底，并且第二半导体层在第一半导体的后续处理期间保护第二半导体材料。 在一个实施例中，第一半导体包括硅，第二半导体材料包括锗。

公开(公告)号：US07074664B1

公开(公告)日：2006-07-11

申请号：US11092418

申请日：2005-03-29

申请人： Ted R. White ,  Olubunmi O. Adetutu ,  Robert E. Jones

发明人： Ted R. White ,  Olubunmi O. Adetutu ,  Robert E. Jones

IPC分类号： H01L21/8238

CPC分类号： H01L21/823842

摘要： A semiconductor fabrication process includes patterning a first gate electrode layer overlying a gate dielectric. A second gate electrode layer is formed overlying the first gate electrode layer and the gate dielectric. Portions of the second gate electrode layer overlying the first gate electrode layer are removed until the first and second gate electrode layers have the same thickness. A third gate electrode layer may be formed overlying the first and second gate electrode layers. The first gate electrode layer may comprise TiN and reside primarily overlying PMOS regions while the second gate electrode layer may comprise TaC or TaSiN and primarily overlie NMOS regions. Removing portions of the second gate electrode layer may include performing a chemical mechanical process (CMP) without masking the second gate electrode layer or forming a resist mask and etching exposed portions of the second gate electrode layer.

摘要翻译： 半导体制造工艺包括图案化覆盖栅极电介质的第一栅极电极层。 第二栅极电极层形成在第一栅极电极层和栅极电介质上。 去除覆盖在第一栅极电极层上的第二栅极电极层的部分，直到第一和第二栅电极层具有相同的厚度。 可以形成第三栅极电极层，覆盖第一和第二栅电极层。 第一栅极电极层可以包括TiN并且主要驻留在PMOS区域上，而第二栅极电极层可以包括TaC或TaSiN并且主要覆盖NMOS区域。 去除第二栅极电极层的部分可以包括在不掩蔽第二栅电极层或形成抗蚀剂掩模并蚀刻第二栅电极层的暴露部分的情况下执行化学机械处理（CMP）。

公开(公告)号：US5885078A

公开(公告)日：1999-03-23

申请号：US919904

申请日：1997-08-28

申请人： David R. Cagna ,  Robert E. Jones ,  Rajiv V. Nambiar

发明人： David R. Cagna ,  Robert E. Jones ,  Rajiv V. Nambiar

IPC分类号： A61C13/00 ,  A61C13/12

CPC分类号： A61C13/0003 ,  A61C8/0048

摘要： The present invention discloses a device and method of achieving a passive fit between a dental implant-supported metal bar or framework and dental implants located within a patient's mouth. The present invention comprises the steps of fabricating the dental implant-supported metal bar, contacting the metal bar and the plurality of dental implant analogs within a dental cast, and correcting the fit of the metal bar by inductively heating the dental implant-supported bar, thereby achieve the desired passive fit.

摘要翻译： 本发明公开了一种在牙科植入物支撑的金属棒或框架和位于患者口内的牙科植入物之间实现被动配合的装置和方法。 本发明包括以下步骤：制造牙科植入物支撑的金属棒，使金属棒和牙科铸件内的多个牙科植入物类似物接触，并通过感应加热牙植入物支撑的杆来校正金属棒的配合， 从而实现所需的被动配合。

公开(公告)号：US4882916A

公开(公告)日：1989-11-28

申请号：US317969

申请日：1989-03-02

申请人： Robert E. Jones

发明人： Robert E. Jones

IPC分类号： D04B35/12

CPC分类号： D04B35/12

摘要： The stop motion activator includes a solenoid coil with an elongate armature core supported for axial movement within the solenoid coil. The armature core is movable inwardly to a first axial position within the solenoid coil when the solenoid coil is energized and is manually movable outwardly to a second axial position when the solenoid coil is deenergized. A control switch is operatively associated with the movement of the armature core and is in a closed position to permit energization of the solenoid coil when the armature core is in the second axial position and is moved to an open position as soon as the armature core is moved inwardly to the first axial position to immediately deenergize the coil after the core has moved inwardly. The armature core is operatively connected to the stop mechanism of the knitting machine to immediately stop the operation of the knitting machine when a malfunction is detected.

摘要翻译： 停止运动激活器包括具有被支撑以在螺线管线圈内轴向移动的细长电枢铁芯的螺线管线圈。 当螺线管线圈被通电时，电枢铁芯可向内移动到螺线管线圈内的第一轴向位置，并且当螺线管线圈断电时可以手动地向外移动到第二轴向位置。 控制开关与电枢铁芯的运动可操作地相关联并且处于关闭位置，以便当电枢铁芯处于第二轴向位置时，螺线管线圈通电，并且一旦电枢铁芯是 向内移动到第一轴向位置，以在芯已经向内移动之后马上使线圈断电。 当检测到故障时，电枢铁芯可操作地连接到针织机的停止机构，以便立即停止针织机的操作。

公开(公告)号：US4119217A

公开(公告)日：1978-10-10

申请号：US768723

申请日：1977-02-15

申请人： Robert E. Jones

发明人： Robert E. Jones

IPC分类号： B65G57/26

CPC分类号： B65G57/26 ,  Y10S414/11

摘要： Method and apparatus for hacking green bricks for eventual introduction into a kiln; wherein bricks are placed on a spread table in parallel rows, and the spread table is actuated to space each of the rows of bricks from each other at distances greater than spacings that will be required when the bricks are being fired in a kiln. A brick gripping head having a plurality of elongated brick gripping members is positioned over the spread bricks on the spread table with the brick gripping members extending vertically in the spaces between the rows of bricks and horizontally along the opposite sides of the bricks. The spread table is then actuated to reduce the spacings between the bricks to predetermined final spacings required during firing of the bricks in the kiln. Simultaneously with such retraction of the spread table, the brick gripping members are also moved laterally towards each other to accommodate the decreased spacings between the bricks. In the preferred embodiment, the brick gripping members include air bags which are inflatable for gripping the sides of the brick and deflatable for releasing the brick. When the desired final spacing is achieved by retraction of the spread table, the air bags are inflated to grip the brick for delivery onto a brick stack on a kiln car or pallet which will be taken to the kiln. The next group of bricks to be spaced on the spread table are treated in the same manner, however, prior to stacking on the kiln car, they are rotated as a unit ninety degrees in a horizontal plane by rotating the brick gripping head so that when stacked, the rows of bricks extend at right angles to the rows of bricks previously stacked on the kiln car.

摘要翻译： 用于黑砖绿砖的最终引入窑的方法和装置; 其中砖以平行排放置在展开台上，并且展开台被致动以使砖的每排彼此间隔大于当砖在窑中被点燃时所需的间隔。 具有多个细长砖夹持构件的砖夹头位于铺展台上的铺展砖上方，砖夹持构件在砖块之间的空间中垂直延伸并且沿着砖的相对侧水平延伸。 然后启动扩展台以将砖之间的间距减小到在窑炉中的砖的焙烧期间所需的预定最终间距。 在扩展台的这种缩回的同时，砖夹持构件也横向移动朝向彼此移动以适应砖之间的减小的间隔。 在优选实施例中，砖夹持构件包括可充气以夹持砖的侧面并可放气以释放砖的气囊。 当通过展开台的缩回实现期望的最终间隔时，气囊被充气以夹持砖以便输送到将被带到窑的窑车或托盘上的砖堆上。 在铺展台上分隔的下一组砖块以相同的方式处理，然而，在堆窑车之前，它们通过旋转砖夹头而在水平面中以单位90度旋转，使得当 堆叠的砖块与先前堆叠在窑车上的砖排成直角延伸。

公开(公告)号：US3978472A

公开(公告)日：1976-08-31

申请号：US573189

申请日：1975-04-30

申请人： Robert E. Jones

发明人： Robert E. Jones

IPC分类号： H03M1/46 ,  G01R19/255 ,  H03M1/00 ,  H03K13/17

CPC分类号： G01R19/255 ,  H03M1/0607

摘要： A low-cost but highly accurate ohmmeter for measuring milliohm resistances is disclosed. The instrument employs a digital voltmeter (analog-to-digital converter) having an add-subtract mode which nulls any drift voltage following each measurement. A self biasing current source which eliminates common mode voltages to the high gain amplifier portion of the converter is used for resistance measurements.

公开(公告)号：US08242564B2

公开(公告)日：2012-08-14

申请号：US13313806

申请日：2011-12-07

申请人： Gregory S. Spencer ,  Jill C. Hildreth ,  Robert E. Jones

发明人： Gregory S. Spencer ,  Jill C. Hildreth ,  Robert E. Jones

IPC分类号： H01L27/12

CPC分类号： G02B6/12004 ,  H01L21/76283 ,  H01L27/1203 ,  H01L31/028 ,  H01L31/112

摘要： A semiconductor structure having a transistor region and an optical device region includes a transistor in a first semiconductor layer of the semiconductor structure, wherein the first semiconductor layer is over a first insulating layer, the first insulating layer is over a second semiconductor layer, and the second semiconductor layer is over a second insulating layer. A gate dielectric of the transistor is in physical contact with a top surface of the first semiconductor layer, and the transistor is formed in the transistor region of the semiconductor structure. A waveguide device in the optical device region and a third semiconductor layer over a portion of the second semiconductor layer.

摘要翻译： 具有晶体管区域和光学器件区域的半导体结构包括在半导体结构的第一半导体层中的晶体管，其中第一半导体层在第一绝缘层之上，第一绝缘层在第二半导体层上，并且 第二半导体层在第二绝缘层之上。 晶体管的栅极电介质与第一半导体层的顶表面物理接触，并且晶体管形成在半导体结构的晶体管区域中。 光学器件区域中的波导器件和第二半导体层的一部分上的第三半导体层。

公开(公告)号：US07887550B2

公开(公告)日：2011-02-15

申请号：US12847948

申请日：2010-07-30

申请人： Terry D. Daglow ,  Robert E. Jones

发明人： Terry D. Daglow ,  Robert E. Jones

IPC分类号： A61B19/00

CPC分类号： A61B90/10 ,  A61B2090/103

摘要： In one embodiment, an apparatus comprises: a base structure adapted to be inserted within the burr hole; a lead securing member for securing the lead, the lead securing member comprising a first arm structure and a second arm structure, at least one spring loaded structure adapted to exert a force to bring the first arm structure and the second arm structure together; and a positioning tool having a distal end adapted to be inserted within the lead securing member. When the positioning tool is positioned within the lead securing member, the distal end holds the first and second arm structures a sufficient distance apart to receive a lead between the first and second arm structures; wherein the positioning tool comprises a control structure at a proximal end that, when engaged, causes the distal end of the positioning tool to be released from between the first and second arm structures.

摘要翻译： 在一个实施例中，一种装置包括：适于插入钻孔内的基座结构; 用于固定所述引线的引线固定构件，所述引线固定构件包括第一臂结构和第二臂结构，至少一个弹簧加载结构，其适于施加力以使所述第一臂结构和所述第二臂结构在一起; 以及定位工具，其具有适于插入到所述引线固定构件内的远端。 当定位工具定位在引线固定构件内时，远端将第一和第二臂结构保持足够的距离，以在第一和第二臂结构之间接收引线; 其中所述定位工具包括在近端处的控制结构，所述控制结构在接合时使所述定位工具的远端从所述第一和第二臂结构之间释放。

公开(公告)号：US07741218B2

公开(公告)日：2010-06-22

申请号：US11679512

申请日：2007-02-27

申请人： Terry G. Sparks ,  Robert E. Jones

发明人： Terry G. Sparks ,  Robert E. Jones

IPC分类号： H01L21/44

CPC分类号： H01L21/76898 ,  H01L21/2885 ,  H01L21/76879 ,  H01L2224/05567 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A method for forming a conductive via is discussed and includes forming a seed layer over a first side of a semiconductor substrate, wherein the semiconductor substrate includes a first side opposite a second side, forming a via hole in a semiconductor substrate from the second side of the semiconductor substrate, wherein the via hole exposes the seed layer; and electroplating a conductive via material in the via hole from the seed layer. In one embodiment, a continuous conductive layer is formed over and electrically coupled to the seed layer. The continuous conductive layer can serve as the current source while electroplating the conductive via material.

摘要翻译： 讨论了一种用于形成导电通孔的方法，包括在半导体衬底的第一侧上形成晶种层，其中半导体衬底包括与第二侧相对的第一侧，从半导体衬底的第二侧形成通孔 所述半导体衬底，其中所述通孔暴露所述种子层; 以及从所述种子层电镀所述通孔中的导电通孔材料。 在一个实施例中，在种子层上方形成连续的导电层，并电耦合到晶种层。 连续导电层可用作电流源，同时电镀导电通孔材料。

公开(公告)号：US07715227B2

公开(公告)日：2010-05-11

申请号：US11865991

申请日：2007-10-02

申请人： Syed M. Alam ,  Robert E. Jones

发明人： Syed M. Alam ,  Robert E. Jones

IPC分类号： G11C11/50

CPC分类号： G11C17/14 ,  H01L25/18 ,  H01L27/112 ,  H01L27/11226 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2924/0002 ,  Y10T29/49002 ,  H01L2924/00

摘要： A read only memory implemented as a 3D integrated device has a first stratum, a second stratum, and bonded inter-strata connections for coupling the first stratum to the second stratum. The physical bonding between the two strata implements the programming of the read only memory. The stratum may be in wafer form or in die form. The first stratum includes functional active devices and at least one non-programmed active device. The second stratum includes at least conductive routing to be associated with the at least one non-programmed active device. The bonded inter-strata connections include at least one bonded programmable inter-strata connection for programming the at least one non-programmed active device and for providing conductive routing to the programmed active device. The two strata thus form a programmed ROM. Other types of programmable storage devices may be implemented by bonding the two strata.

摘要翻译： 实现为3D集成设备的只读存储器具有用于将第一层耦合到第二层的第一层，第二层和粘结层间连接。 两层之间的物理绑定实现了只读存储器的编程。 层可以是晶片形式或模具形式。 第一层包括功能性有源器件和至少一个非编程有源器件。 第二层包括至少与至少一个非编程的有源设备相关联的导电路由。 所述接合的层间连接包括用于对所述至少一个非编程的有源器件进行编程以及为所述编程的有源器件提供导电路由的至少一个结合的可编程层间连接。 因此，这两个层由此形成一个编程的ROM。 其他类型的可编程存储设备可以通过键合两个层来实现。