MOS structures with remote contacts and methods for fabricating the same
    51.
    发明授权
    MOS structures with remote contacts and methods for fabricating the same 有权
    具有远程触点的MOS结构及其制造方法

    公开(公告)号:US07989891B2

    公开(公告)日:2011-08-02

    申请号:US11755930

    申请日:2007-05-31

    Abstract: MOS structures with remote contacts and methods for fabricating such MOS structures are provided. In one embodiment, a method for fabricating an MOS structure comprises providing a semiconductor layer that is at least partially surrounded by an isolation region and that has an impurity-doped first portion. First and second MOS transistors are formed on and within the first portion. The transistors are substantially parallel and define a space therebetween. An insulating material is deposited overlying the first portion of the semiconductor layer and at least a portion of the isolation region. A contact is formed through the insulating material outside the space such that the contact is in electrical communication with the transistors.

    Abstract translation: 提供具有远程触点的MOS结构和用于制造这种MOS结构的方法。 在一个实施例中,一种用于制造MOS结构的方法包括提供半导体层,该半导体层至少部分地被隔离区包围,并且具有杂质掺杂的第一部分。 第一和第二MOS晶体管形成在第一部分内部和第一部分内。 晶体管基本上平行并且在它们之间限定了一个空间。 沉积覆盖半导体层的第一部分和隔离区域的至少一部分的绝缘材料。 通过空间外部的绝缘材料形成触点,使得触点与晶体管电连通。

    Automatic load balancing of a 3D graphics pipeline
    52.
    发明授权
    Automatic load balancing of a 3D graphics pipeline 有权
    3D图形管道的自动负载平衡

    公开(公告)号:US07940261B2

    公开(公告)日:2011-05-10

    申请号:US11621917

    申请日:2007-01-10

    CPC classification number: G06T15/005 G06T1/20

    Abstract: A device has a processor for processing a vertex processing stage, a sub-screen dividing stage and a pixel rendering stage of a three-dimensional (3D) graphics pipeline. The processor includes processing threads which balance the work load of the 3D graphics pipeline by prioritizing processing for the pixel rendering stage over other stages. Each processing thread, operating in parallel and independently, checks a level of tasks in a Task list of sub-screen tasks. If the level is below a threshold value, empty or the sub-screen tasks are all locked, the processing thread loops to the vertex processing stage. Otherwise, the processing thread processes a sub-screen task during the pixel rendering stage.

    Abstract translation: 一种设备具有用于处理三维(3D)图形流水线的顶点处理阶段,子屏幕划分阶段和像素渲染阶段的处理器。 该处理器包括处理线程,其平衡3D图形流水线的工作负载,通过对像素渲染阶段的处理优先于其他阶段。 并行和独立运行的每个处理线程检查子屏幕任务的任务列表中的任务级别。 如果该级别低于阈值,则清空或子屏幕任务都被锁定,则处理线程循环到顶点处理阶段。 否则,处理线程在像素渲染阶段处理子屏幕任务。

    METHOD AND SYSTEM FOR 3-D COLOR ADJUSTMENT BASED ON COLOR REGION DEFINITION USING PWL MODULES
    53.
    发明申请
    METHOD AND SYSTEM FOR 3-D COLOR ADJUSTMENT BASED ON COLOR REGION DEFINITION USING PWL MODULES 审中-公开
    基于使用PWL模块的颜色区域定义进行三维颜色调整的方法和系统

    公开(公告)号:US20090180028A1

    公开(公告)日:2009-07-16

    申请号:US12354268

    申请日:2009-01-15

    CPC classification number: H04N9/68 H04N9/643

    Abstract: A video processing system may be operable to utilize one-dimensional (1-D) piecewise linear (PWL) functions to adjust chroma and/or luma parameters corresponding to pixels that are determined to fall within one or more N-dimensional color adjustment regions in spatial representation of pixels' chroma and luma information. The chroma and/or luma parameters comprise Y, Cb, Cr, saturation and/or hue parameters in systems using Y′CbCr color coding. The 1-D PWL functions are operable to generate adjustment data corresponding to one of chroma and/or luma parameters, wherein the adjustment data comprise offset or gain data. The 1-D PWL functions are reprogrammable. The 1-D PWL functions may enable smooth transitions in boundary areas of at least some of the N-dimensional color adjustment regions. Determination of whether pixels fall within the color adjustment regions is based on a plurality of boundary points and/or criteria. Adjustment data corresponding to overlapped regions are aggregated.

    Abstract translation: 视频处理系统可以可操作以利用一维(1-D)分段线性(PWL)函数来调整对应于被确定落入一个或多个N维颜色调整区域内的像素的色度和/或亮度参数 像素色度和亮度信息的空间表示。 在使用Y'CbCr颜色编码的系统中,色度和/或亮度参数包括Y,Cb,Cr,饱和度和/或色调参数。 1-D PWL功能可操作以产生对应于色度和/或亮度参数之一的调节数据,其中调整数据包括偏移或增益数据。 1-D PWL功能可重新编程。 1-D PWL功能可以实现至少一些N维颜色调整区域的边界区域中的平滑过渡。 像素落在颜色调整区域内的确定是基于多个边界点和/或标准。 对应于重叠区域的调整数据进行聚合。

    METHOD AND SYSTEM FOR ASYNCHRONOUS PIPELINE ARCHITECTURE FOR MULTIPLE INDEPENDENT DUAL/STEREO CHANNEL PCM PROCESSING
    55.
    发明申请
    METHOD AND SYSTEM FOR ASYNCHRONOUS PIPELINE ARCHITECTURE FOR MULTIPLE INDEPENDENT DUAL/STEREO CHANNEL PCM PROCESSING 有权
    用于多个独立双/立体声通道PCM处理的异步管道结构的方法和系统

    公开(公告)号:US20080114477A1

    公开(公告)日:2008-05-15

    申请号:US11558145

    申请日:2006-11-09

    Applicant: David Wu

    Inventor: David Wu

    Abstract: Aspects of a method and system for an asynchronous pipeline architecture for multiple independent dual/stereo channel PCM processing are provided. Asynchronously pipeline processing of audio information comprised within a decoded PCM frame may be based on metadata information generated from the decoded PCM frame and an output decoding rate. The asynchronously pipeline processing may comprise mixing a primary audio information portion and a secondary audio information, portion, sample rate converting the audio information, and buffering the audio information. The asynchronously pipeline processing may comprise multiple pipeline stages. Feeding back an output of one of the pipeline stages to an input of a previous one of the pipeline stages may be enabled. The metadata information may comprise a frame start indicator associated with the decoded PCM frame and/or a plurality of mixing coefficients.

    Abstract translation: 提供了用于多个独立双/立体声信道PCM处理的异步流水线架构的方法和系统的方面。 包含在解码的PCM帧内的音频信息的异步​​流水线处理可以基于从解码的PCM帧生成的元数据信息和输出解码速率。 异步流水线处理可以包括混合主音频信息部分和次要音频信息,部分,转换音频信息的采样率,以及缓冲音频信息。 异步流水线处理可以包括多个流水线级。 可以启用将一个流水线级的输出反馈到前一个流水线级的输入。 元数据信息可以包括与解码的PCM帧相关联的帧开始指示符和/或多个混合系数。

    Test structure and method for measuring the resistance of line-end vias
    57.
    发明授权
    Test structure and method for measuring the resistance of line-end vias 失效
    用于测量线端通孔电阻的测试结构和方法

    公开(公告)号:US07271047B1

    公开(公告)日:2007-09-18

    申请号:US11327641

    申请日:2006-01-06

    CPC classification number: H01L22/34 H01L22/14

    Abstract: A test structure and methods of using and making the same are provided. In one aspect, a test structure is provided that includes a first conductor that has a first end and a second conductor that has a second end positioned above the first end. A third conductor is positioned between the first end of the first conductor and the second end of the second conductor. A first electrode is coupled to the first conductor at a first distance from the third conductor and a second electrode coupled to the first conductor at a second distance from the third conductor. A third electrode is coupled to the second conductor at a third distance from the third conductor and a fourth electrode is coupled to the second conductor at a fourth distance from the third conductor. The first through fourth electrodes provide voltage sense taps and the first and second conductors provide current sense taps from which the resistance of the third conductor may be derived.

    Abstract translation: 提供了测试结构及其使用和制造方法。 在一个方面,提供一种测试结构,其包括具有第一端和第二导体的第一导体,第二导​​体具有位于第一端上方的第二端。 第三导体位于第一导体的第一端和第二导体的第二端之间。 第一电极以距离第三导体第一距离的第一导体耦合到第一导体,第二电极以距离第三导体第二距离的方式耦合到第一导体。 第三电极以距离第三导体第三距离的方式耦合到第二导体,并且第四电极在距离第三导体的第四距离处耦合到第二导体。 第一至第四电极提供电压检测抽头,并且第一和第二导体提供电流检测抽头,从该第三导体提供第三导体的电阻。

    Preparation and diabetic use of Gibberellins
    58.
    发明申请
    Preparation and diabetic use of Gibberellins 有权
    制备和糖尿病使用赤霉素

    公开(公告)号:US20070197456A1

    公开(公告)日:2007-08-23

    申请号:US11508897

    申请日:2006-08-24

    CPC classification number: A61K31/22 A61K31/19 A61K31/704

    Abstract: The present invention relates to application of compounds of formula (1) (Gibberellins) and their derivatives for the preparation of a pharmaceutical composition or medicaments for the treatment of diabetes, its complications and associated conditions, including obesity, micro and macro vascular diseases, nephropathy, neuropathy, eye diseases, diabetic ulcerations and the like. The method results the normalization of serum glucose level and other physiological conditions.

    Abstract translation: 本发明涉及式(1)化合物(赤霉素)及其衍生物在制备用于治疗糖尿病及其并发症及相关病症的药物组合物或药物中的应用,包括肥胖症,微血管病变和大血管病,肾病 ,神经病,眼病,糖尿病性溃疡等。 该方法使血清葡萄糖水平和其他生理条件正常化。

    Computer-implemented method, apparatus, and computer program product for transmitting information between CORBA applications and servers utilizing HTTP
    60.
    发明申请
    Computer-implemented method, apparatus, and computer program product for transmitting information between CORBA applications and servers utilizing HTTP 有权
    计算机实现的方法,设备和计算机程序产品,用于在CORBA应用程序和使用HTTP的服务器之间传输信息

    公开(公告)号:US20070124741A1

    公开(公告)日:2007-05-31

    申请号:US11289717

    申请日:2005-11-29

    Applicant: Suhong Ma David Wu

    Inventor: Suhong Ma David Wu

    CPC classification number: G06F9/548 G06F9/465 G06F9/541

    Abstract: A computer-implemented method, apparatus, and computer program product in a data processing environment for transmitting information between a CORBA application executing within a client and a server utilizing HTTP are disclosed. An application that is being executed by a client requests a CORBA IDL stub to invoke a method. The CORBA IDL stub transmits requests to a server utilizing Internet Inter-ORB Protocol (IIOP). An HTTP stub is generated that transmits requests utilizing HTTP. The HTTP stub corresponds to the CORBA IDL stub such that the CORBA IDL stub and the HTTP stub define the same methods. The HTTP stub transmits the request of the CORBA IDL stub to invoke the method to the server utilizing HTTP.

    Abstract translation: 公开了一种数据处理环境中的计算机实现的方法,装置和计算机程序产品,用于在客户端中执行的CORBA应用程序和使用HTTP的服务器之间传输信息。 正在由客户端执行的应用程序请求一个CORBA IDL存根来调用一个方法。 CORBA IDL存根使用Internet Inter-ORB协议(IIOP)将请求发送到服务器。 生成使用HTTP传输请求的HTTP存根。 HTTP存根对应于CORBA IDL存根,使得CORBA IDL存根和HTTP存根定义相同的方法。 HTTP存根传输CORBA IDL存根的请求,以使用HTTP将该方法调用到服务器。

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