公开(公告)号：US6008576A

公开(公告)日：1999-12-28

申请号：US879133

申请日：1997-06-19

申请人： Tadashi Nakatani ,  Keiichi Betsui

发明人： Tadashi Nakatani ,  Keiichi Betsui

IPC分类号： H01J9/02 ,  H01J3/02 ,  H01J29/04 ,  H01J29/94 ,  H01J31/12

CPC分类号： H01J3/022 ,  H01J29/94 ,  H01J31/127

摘要： A flat display is provided, which includes: a cathode plate including emitter electrode lines each having emitter tips provided in pixel areas, and gate electrode lines crossing the emitter electrode lines at the pixel areas; and an anode plate spaced a predetermined distance from the cathode plate in an opposed relation and having an anode conductive layer and fluorescent layers formed on the anode conductive layer in the respective pixel areas; the emitter electrode lines and the gate electrode lines each having transparent portions formed of a transparent conductive film at least in the pixel areas so that light emission from the fluorescent layers can be viewed through the transparent portions.

摘要翻译： 提供一种平板显示器，其包括：阴极板，包括各自具有设置在像素区域中的发射极尖端的发射极电极线以及在像素区域处与发射极电极线交叉的栅电极线; 以及与相对的阴极板隔开预定距离的阳极板，并且在相应像素区域中具有形成在阳极导电层上的阳极导电层和荧光层; 所述发射极电极线和栅极电极线至少在像素区域中具有由透明导电膜形成的透明部分，使得可以通过透明部分观察来自荧光层的发光。

公开(公告)号：US5775968A

公开(公告)日：1998-07-07

申请号：US699482

申请日：1996-08-19

申请人： Osamu Toyoda ,  Keiichi Betsui ,  Shinya Fukuta ,  Tadashi Nakatani

发明人： Osamu Toyoda ,  Keiichi Betsui ,  Shinya Fukuta ,  Tadashi Nakatani

IPC分类号： H01J1/304 ,  H01J9/02 ,  H01J31/12 ,  H01J1/30

CPC分类号： B82Y10/00 ,  H01J1/3042 ,  H01J31/127 ,  H01J9/025

摘要： A cathode device includes a plurality of emitter tips having conical tip end portions to emit electrons therefrom. A gate electrode layer has an opening through which the tip end portion of each of the emitter tips is exposed. The diameter of the opening in the gate electrode layer is made smaller than that of the portion of the emitter tip at the juncture thereof with the substrate. In the fabrication of the cathode device, an oxide layer is formed at least on the surface of the formed emitter tip to sharpen the latter. By removing the oxide layer, an inner circumferential wall of the opening of the gate electrode layer is formed on the outside of the conical tip end portion of the emitter tip and extends approximately in parallel to the conical tip end portion of the emitter tip.

摘要翻译： 阴极装置包括多个具有从其发射电子的锥形尖端部分的发射器尖端。 栅电极层具有开口，每个发射极尖端的前端部分露出。 栅电极层中的开口的直径比发射极尖端的与基板的接合部的直径小。 在阴极器件的制造中，至少在形成的发射极尖端的表面上形成氧化物层，以使其锐化。 通过去除氧化物层，在发射极尖端的锥形末端部分的外侧形成栅极电极层的开口的内周壁，并且大致平行于发射极尖端的锥形末端部分延伸。

公开(公告)号：US5614725A

公开(公告)日：1997-03-25

申请号：US610190

申请日：1996-03-04

申请人： Yoshihisa Oae ,  Tomohiko Abe ,  Soichiro Arai ,  Shigeru Maruyama ,  Hiroshi Yasuda ,  Kenichi Miyazawa ,  Junichi Kai ,  Takamasa Satoh ,  Keiichi Betsui ,  Hideki Nasuno

发明人： Yoshihisa Oae ,  Tomohiko Abe ,  Soichiro Arai ,  Shigeru Maruyama ,  Hiroshi Yasuda ,  Kenichi Miyazawa ,  Junichi Kai ,  Takamasa Satoh ,  Keiichi Betsui ,  Hideki Nasuno

IPC分类号： H01J37/147 ,  H01J37/30 ,  H01J37/302 ,  H01J37/304 ,  H01J37/317

CPC分类号： H01J37/3174 ,  B82Y10/00 ,  B82Y40/00 ,  H01J37/3023 ,  H01J37/3177 ,  H01J2237/0435 ,  H01J2237/30416 ,  H01J2237/31762 ,  H01L2223/54466

摘要： A charged particle beam exposure method includes the steps of creating dot pattern data indicative of a pattern to be exposed, storing the dot pattern data in a first storage device having a first access speed, transferring the dot pattern data from the first storage device to a second storage device having a second, higher access speed, reading the dot pattern data out from the second storage device, and producing a plurality of charged particle beams in response to the dot pattern data read out from the second storage device by means of a blanking aperture array, wherein the blanking aperture array includes a plurality of apertures each causing turning-on and turning-off of a changed particle beam pertinent to the aperture in response to the dot pattern data.

摘要翻译： 带电粒子束曝光方法包括以下步骤：创建指示要曝光的图案的点阵图形数据，将点图案数据存储在具有第一存取速度的第一存储装置中，将点图案数据从第一存储装置传送到 第二存储装置具有第二较高访问速度，从第二存储装置读出点阵图形数据，并响应于通过消隐从第二存储装置读出的点图形数据产生多个带电粒子束 孔径阵列，其中消隐孔阵列包括多个孔，每个孔响应于点图案数据而导致与孔相关的改变的粒子束的导通和关断。

公开(公告)号：US5489933A

公开(公告)日：1996-02-06

申请号：US829882

申请日：1992-02-03

申请人： Keiichi Betsui ,  Hiroshi Inoue ,  Shin'ya Fukuta

发明人： Keiichi Betsui ,  Hiroshi Inoue ,  Shin'ya Fukuta

IPC分类号： H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J31/12 ,  B41J2/435 ,  G09G3/10

CPC分类号： H01J9/025 ,  H01J1/3042 ,  H01J3/022 ,  H01J31/127

摘要： In a field emission microcathode array, a plurality of cones are arranged in a plurality of blocks, each of plural cones, on the main surface of a substrate, each cone having a sharp tip. A plurality of gate electrode portions respectively correspond to the blocks, each portion having a plurality of openings therein corresponding to the plurality of cones of the respective block, each opening being aligned with and disposed in surrounding relationship relative to the corresponding tip of the respectively associated cone. A plurality of lead electrodes, each configured as a fuse, are respectively connected to the plurality of gate electrode portions and each lead electrode provides an independent connection of the respective gate electrode portion to the common power source. In another embodiment, each gate electrode portion and wiring films connected thereto have respectively high and low resistances. In a further embodiment, each gate electrode portion includes openings of different sizes surrounding tips of the cones.

摘要翻译： 在场致发射微阴极阵列中，在基板的主表面上的多个块（多个锥体）中设置多个锥体，每个锥体具有尖锐的尖端。 多个栅电极部分别对应于块，每个部分在其中具有多个开口，其中对应于相应块的多个锥，每个开口与相应的相应 锥体。 分别连接到多个栅电极部分的多个引线电极，各自构成熔丝，并且每个引线电极提供相应的栅电极部分与公共电源的独立连接。 在另一个实施例中，每个栅电极部分和与其连接的布线膜分别具有高电阻和低电阻。 在另一实施例中，每个栅电极部分包括围绕锥体尖端的不同尺寸的开口。

公开(公告)号：US5378658A

公开(公告)日：1995-01-03

申请号：US951801

申请日：1992-09-28

申请人： Osamu Toyoda ,  Keiichi Betsui

发明人： Osamu Toyoda ,  Keiichi Betsui

IPC分类号： C23C14/04 ,  H01J9/02 ,  H01L21/302 ,  H01L21/3065 ,  H05K3/14 ,  H01L21/31

CPC分类号： C23C14/042 ,  H01J9/025 ,  H05K3/143

摘要： A process for forming a pattern on a substrate which includes depositing a film-forming material from above a mask formed on the substrate and forming a film on the mask and in regions of the substrate not covered by the mask, wherein the film formation is carried out while irradiating an ion beam towards the mask so that the deposition on the side surface portion of a deposition material being deposited on the mask is inhibited by ion milling. An electronic device such as a micro field emission cathode or a multi-layer circuit structure is effectively formed using the process.

摘要翻译： 一种在衬底上形成图案的工艺，其包括从形成在衬底上的掩模上方沉积成膜材料并在掩模上形成膜并且在未被掩模覆盖的衬底的区域中进行成膜 同时向掩模照射离子束，使得沉积在掩模上的沉积材料的侧表面部分上的沉积被离子研磨抑制。 使用该方法有效地形成诸如微场发射阴极或多层电路结构的电子器件。

公开(公告)号：US08692463B2

公开(公告)日：2014-04-08

申请号：US12863640

申请日：2008-11-28

申请人： Minoru Hasegawa ,  Shinya Fukuta ,  Keiichi Betsui ,  Yasunobu Hashimoto

发明人： Minoru Hasegawa ,  Shinya Fukuta ,  Keiichi Betsui ,  Yasunobu Hashimoto

IPC分类号： H01J17/49

CPC分类号： H01J11/40 ,  H01J9/02 ,  H01J11/12 ,  H01J11/38

摘要： A protective film (6) having a high secondary-emission coefficient is formed on a dielectric layer (5) so as to lower the discharge voltage of a plasma display panel. When the protective film (6) is exposed to the air, it will transform or become cloudy, or the secondary-emission coefficient will lower. To prevent this problem, an inert film (60) is formed on the surface of the protective film (6). As the inert film (60), a film of a metal oxide such as SiO2 and a film of a metal such as Tb are simultaneously formed. Thus, an inert film (60) excellent in barrier property against oxygen and water in the air and enabling easy sputtering from near the discharge electrode at the aging step can be obtained. With this, a plasma display panel exhibiting a low discharge voltage can be realized.

摘要翻译： 在电介质层（5）上形成具有高二次发射系数的保护膜（6），以降低等离子体显示面板的放电电压。 当保护膜（6）暴露在空气中时，会变形或变得浑浊，或者二次发射系数降低。 为了防止这个问题，在保护膜（6）的表面上形成有惰性膜（60）。 作为惰性膜（60），同时形成诸如SiO 2的金属氧化物的膜和诸如Tb的金属的膜。 因此，可以获得在老化步骤中在空气中对氧气和水的隔离性优异的惰性膜（60），并能够在放电电极附近进行溅射。 由此，能够实现显示低放电电压的等离子体显示面板。

公开(公告)号：US08207672B2

公开(公告)日：2012-06-26

申请号：US12674131

申请日：2007-10-02

申请人： Keiichi Betsui ,  Shinya Fukuta ,  Tadayoshi Kosaka ,  Minoru Hasegawa ,  Hajime Inoue ,  Yoshiho Seo ,  Tomonari Misawa

发明人： Keiichi Betsui ,  Shinya Fukuta ,  Tadayoshi Kosaka ,  Minoru Hasegawa ,  Hajime Inoue ,  Yoshiho Seo ,  Tomonari Misawa

IPC分类号： H01J17/49 ,  H01J9/00 ,  H01J9/24

CPC分类号： H01J11/12 ,  H01J11/40 ,  Y10T428/2991

摘要： A technique for achieving both discharge voltage reduction and discharge stabilization in a PDP and the like is provided. This PDP manufacturing method includes, for a structure of a front plate structure (11) to be exposed to a discharge space (30) to be filled with a discharge gas, a step of forming a first layer (4) having an effect of discharge protective layer on a dielectric layer (3), a step of forming a second layer (5) for protecting the first layer on the first layer, and a step of forming a third layer (6) of a powder for discharge stabilization to be exposed to the discharge space (30), the steps being performed in vacuum manufacturing process. And, the structure is made such that a surface of the first layer is exposed to the discharge space (30) by a step of removing the second layer by an aging discharge in the discharge space (30).

摘要翻译： 提供了用于实现PDP等中的放电电压降低和放电稳定化的技术。 该PDP制造方法包括：对于要暴露于要填充放电气体的放电空间（30）的前板结构（11）的结构，包括形成具有放电效果的第一层（4）的步骤 保护层，介电层（3）的保护层，形成用于保护第一层上的第一层的第二层（5）的步骤和形成用于放电稳定化的粉末的第三层（6）暴露的步骤 到放电空间（30），这些步骤在真空制造过程中进行。 并且，通过在放电空间（30）中通过老化放电去除第二层的步骤，使第一层的表面暴露于放电空间（30）的结构。

公开(公告)号：US20110018786A1

公开(公告)日：2011-01-27

申请号：US12863616

申请日：2008-04-07

申请人： Keiichi Betsui ,  Tomonari Misawa ,  Tadayoshi Kosaka ,  Yoshiho Seo ,  Hajime Inoue ,  Shinya Fukuta ,  Minoru Hasegawa

发明人： Keiichi Betsui ,  Tomonari Misawa ,  Tadayoshi Kosaka ,  Yoshiho Seo ,  Hajime Inoue ,  Shinya Fukuta ,  Minoru Hasegawa

IPC分类号： G09G3/28

CPC分类号： H01J11/40 ,  H01J11/12

摘要： There is provided a technique for discharge stabilization of a plasma display panel by forming magnesium oxide with a large diameter and adjusting residual amounts of impurities contained in the magnesium oxide. That is, discharge stabilization material particle, which is coated on a protective-film layer of protecting electrodes and supplies sufficient amount of priming particles into a discharge gap, is focused. By setting each impurity concentration in the magnesium oxide used as the discharge stabilization material particle to 20 ppm or lower, discharge time lag is suppressed.

摘要翻译： 通过形成具有大直径的氧化镁并调节氧化镁中所含杂质的残留量，提供了等离子体显示面板的放电稳定化技术。 也就是说，聚焦放电稳定材料颗粒，其涂覆在保护电极的保护膜层上并将足够量的引发颗粒提供到放电间隙中。 通过将用作放电稳定材料颗粒的氧化镁中的每个杂质浓度设定为20ppm以下，可以抑制放电时间滞后。

公开(公告)号：US20100194727A1

公开(公告)日：2010-08-05

申请号：US12676603

申请日：2007-12-11

申请人： Yoshiho Seo ,  Keiichi Betsui ,  Tadayoshi Kosaka

发明人： Yoshiho Seo ,  Keiichi Betsui ,  Tadayoshi Kosaka

IPC分类号： G06F3/038

CPC分类号： H01J11/22 ,  G09G3/296 ,  G09G2320/041 ,  H01J11/12 ,  H01J2211/62

摘要： In a plasma display device, a temperature-monitoring electrode for monitoring a panel temperature is parallely arranged with at least either one of a display electrode and a scan electrode, or an address electrode in a PDP. And, a resistance-value monitoring circuit for monitoring a resistance value of the temperature-monitoring electrode is connected to the temperature-monitoring electrode, and further, a temperature-converting circuit for converting the resistance value monitored by the resistance-value monitoring circuit into a temperature is connected to the resistance-value monitoring circuit. And, respective driver drives respective electrode with applying a driving waveform and/or a driving voltage suitable for the temperature converted by the temperature-converting circuit, so that a useless margin design is unnecessary, and as a result, a performance in a normal-use situation can be improved.

摘要翻译： 在等离子体显示装置中，用于监视面板温度的温度监视电极与PDP中的显示电极和扫描电极或地址电极中的至少一个平行布置。 另外，用于监视温度监视电极的电阻值的电阻值监测电路与温度监视电极连接，另外，还设有用于将由电阻值监视电路监视的电阻值变换为 温度连接到电阻值监视电路。 并且，各驱动器通过施加适合于由温度转换电路转换的温度的驱动波形和/或驱动电压驱动各个电极，从而不需要无用的余量设计，结果， 使用情况可以改善。

公开(公告)号：US20080194165A1

公开(公告)日：2008-08-14

申请号：US12062893

申请日：2008-04-04

申请人： Kazunori INOUE ,  Shigeo Kasahara ,  Koichi Sakita ,  Osamu Toyoda ,  Minoru Hasegawa ,  Hideki Harada ,  Keiichi Betsui

发明人： Kazunori INOUE ,  Shigeo Kasahara ,  Koichi Sakita ,  Osamu Toyoda ,  Minoru Hasegawa ,  Hideki Harada ,  Keiichi Betsui

IPC分类号： H01J9/00

CPC分类号： H01J11/12 ,  H01J9/02 ,  H01J11/40

摘要： The present invention provides a method of manufacturing a plasma display panel that includes forming an electrode on a substrate, forming a dielectric layer which covers the electrode on the substrate, and forming a protective layer which covers the dielectric layer, wherein the protective layer is in contact with a discharge space of the plasma display panel, and wherein the protective layer includes MgO and at least one compound selected from the group consisting of an Al compound, a Y compound, a Ti compound, a Zn compound, a Zr compound, a Ta compound and SiC having an ultraviolet shielding function.

摘要翻译： 本发明提供一种等离子体显示面板的制造方法，其包括在基板上形成电极，形成覆盖基板上的电极的电介质层，形成覆盖电介质层的保护层，其中保护层位于 与等离子体显示面板的放电空间接触，其中保护层包括MgO和至少一种选自Al化合物，Y化合物，Ti化合物，Zn化合物，Zr化合物， Ta化合物和具有紫外线屏蔽功能的SiC。