公开(公告)号：US20210118986A1

公开(公告)日：2021-04-22

申请号：US17111551

申请日：2020-12-04

Applicant: Infineon Technologies AG

Inventor： Thomas Aichinger ,  Wolfgang Bergner ,  Paul Ellinghaus ,  Rudolf Elpelt ,  Romain Esteve ,  Florian Grasse ,  Caspar Leendertz ,  Shiqin Niu ,  Dethard Peters ,  Ralf Siemieniec ,  Bernd Zippelius

IPC: H01L29/06 ,  H01L29/16 ,  H01L21/265 ,  H01L29/423 ,  H01L29/66 ,  H01L27/088

Abstract: A semiconductor device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. A trench interval which defines a space between adjacent gate trenches extends in a second direction perpendicular to the first direction. Source regions of a first conductivity type formed in the SiC substrate occupy a first part of the space between adjacent gate trenches. Body regions of a second conductivity type opposite the first conductivity type formed in the SiC substrate and below the source regions occupy a second part of the space between adjacent gate trenches. Body contact regions of the second conductivity type formed in the SiC substrate occupy a third part of the space between adjacent gate trenches. Shielding regions of the second conductivity type formed deeper in the SiC substrate than the body regions adjoin a bottom of at least some of the gate trenches.

公开(公告)号：US10915029B2

公开(公告)日：2021-02-09

申请号：US16153186

申请日：2018-10-05

Applicant: Infineon Technologies AG

Inventor： Roland Rupp ,  Rudolf Elpelt ,  Romain Esteve

IPC: H01L29/16 ,  H01L29/36 ,  H01L29/66 ,  G03F7/20 ,  H01L21/04 ,  H01J37/317 ,  H01L29/861 ,  H01L21/027 ,  H01L23/544 ,  H01L29/06

Abstract: A semiconductor device is provided that includes a silicon carbide substrate including a main surface at which a plurality of doped zones are formed in a junction termination extension zone of the silicon carbide substrate, the plurality of doped zones are arranged such that a lateral dopant concentration gradient is formed that decreases from a central region of the silicon carbide substrate to an outer edge region of the silicon carbide substrate.

公开(公告)号：US20190355815A1

公开(公告)日：2019-11-21

申请号：US16415365

申请日：2019-05-17

Applicant: Infineon Technologies AG

Inventor： Thomas Basler ,  Rudolf Elpelt ,  Hans-Joachim Schulze

IPC: H01L29/06 ,  H01L29/16

Abstract: The disclosure relates to a semiconductor component having an SiC semiconductor body and a first load terminal on a first surface of the SiC semiconductor body. A second load terminal is formed on a second surface of the SiC semiconductor body opposite the first surface. The semiconductor component has a drift zone of a first conductivity type in the SiC semiconductor body and a first semiconductor area of a second conductivity type which is electrically connected to the first load terminal. A pn junction between the drift zone and the first semiconductor area defines a voltage blocking strength of the semiconductor component.

公开(公告)号：US20190341447A1

公开(公告)日：2019-11-07

申请号：US16404284

申请日：2019-05-06

Applicant: Infineon Technologies AG

Inventor： Ralf Siemieniec ,  Thomas Aichinger ,  Thomas Basler ,  Wolfgang Bergner ,  Rudolf Elpelt ,  Romain Esteve ,  Michael Hell ,  Daniel Kueck ,  Caspar Leendertz ,  Dethard Peters ,  Hans-Joachim Schulze

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/10 ,  H01L21/04 ,  H01L29/66 ,  H01L29/16

Abstract: A semiconductor component has a gate structure that extends from a first surface into an SiC semiconductor body. A body area in the SiC semiconductor body adjoins a first side wall of the gate structure. A first shielding area and a second shielding area of the conductivity type of the body area have at least twice as high a level of doping as the body area. A diode area forms a Schottky contact with a load electrode between the first shielding area and the second shielding area.

公开(公告)号：US20190165159A1

公开(公告)日：2019-05-30

申请号：US16197151

申请日：2018-11-20

Applicant: Infineon Technologies AG

Inventor： Larissa Wehrhahn-Kilian ,  Rudolf Elpelt ,  Roland Rupp ,  Ralf Siemieniec ,  Bernd Zippelius

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/16 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417

Abstract: A semiconductor component includes a SiC semiconductor body having an active region and an edge termination structure at least partly surrounding the active region. A drift zone of a first conductivity type is formed in the SiC semiconductor body. The edge termination structure includes: a first doped region of a second conductivity type between a first surface of the SiC semiconductor body and the drift zone, the first doped region at least partly surrounding the active region and being spaced apart from the first surface; a plurality of second doped regions of the second conductivity type between the first surface and the first doped region; and third doped regions of the first conductivity type separating adjacent second doped regions of the plurality of second doped regions from one another in a lateral direction.

公开(公告)号：US20190131447A1

公开(公告)日：2019-05-02

申请号：US16171911

申请日：2018-10-26

Applicant: Infineon Technologies AG

Inventor： Rudolf Elpelt ,  Roland Rupp ,  Reinhold Schoerner ,  Larissa Wehrhahn-Kilian ,  Bernd Zippelius

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/10 ,  H01L21/04 ,  H01L29/861 ,  H01L29/66 ,  H01L29/06

Abstract: In termination regions of a silicon carbide substrate field zones are formed by ion implantation. By laterally modulating a distribution of dopants entering the silicon carbide substrate by the ion implantation, a horizontal net dopant distribution in the field zones is set to fall from a maximum net dopant concentration Nmax to Nmax/e within at least 200 nm, with e representing Euler's number. The field zones form first pn junctions with a drift layer.

公开(公告)号：US09035322B2

公开(公告)日：2015-05-19

申请号：US13850374

申请日：2013-03-26

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Christian Hecht ,  Roland Rupp ,  Rudolf Elpelt

IPC: H01L29/15 ,  H01L29/16 ,  H01L21/04 ,  H01L29/872 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L29/0623 ,  H01L21/046 ,  H01L21/2652 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/872

Abstract: A silicon carbide device includes an epitaxial silicon carbide layer including a first conductivity type and a buried lateral silicon carbide edge termination region located within the epitaxial silicon carbide layer including a second conductivity type. The buried lateral silicon carbide edge termination region is covered by a silicon carbide surface layer including the first conductivity type.

Abstract translation: 碳化硅器件包括包括第一导电类型的外延碳化硅层和位于包含第二导电类型的外延碳化硅层内的埋入横向碳化硅边缘终止区。 埋入的侧面碳化硅边缘终端区域由包括第一导电类型的碳化硅表面层覆盖。

公开(公告)号：US20140291697A1

公开(公告)日：2014-10-02

申请号：US14033631

申请日：2013-09-23

Applicant: Infineon Technologies AG

Inventor： Roland Rupp ,  Christian Hecht ,  Jens Konrath ,  Wolfgang Bergner ,  Hans-Joachim Schulze ,  Rudolf Elpelt

IPC: H01L29/16

CPC classification number: H01L29/1608 ,  H01L21/045 ,  H01L21/046 ,  H01L21/047 ,  H01L21/0495 ,  H01L21/565 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3135 ,  H01L23/3171 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/7811 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A silicon carbide device includes a silicon carbide substrate, an inorganic passivation layer structure and a molding material layer. The inorganic passivation layer structure laterally covers at least partly a main surface of the silicon carbide substrate and the molding material layer is arranged adjacent to the inorganic passivation layer structure.

Abstract translation: 碳化硅器件包括碳化硅衬底，无机钝化层结构和成型材料层。 无机钝化层结构至少部分地覆盖碳化硅衬底的主表面，并且模制材料层被布置成与无机钝化层结构相邻。

公开(公告)号：US20140291695A1

公开(公告)日：2014-10-02

申请号：US13850374

申请日：2013-03-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Hans-Joachim Schulze ,  Christian Hecht ,  Roland Rupp ,  Rudolf Elpelt

IPC: H01L29/06 ,  H01L29/16 ,  H01L21/265

CPC classification number: H01L29/0623 ,  H01L21/046 ,  H01L21/2652 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/872

Abstract: A silicon carbide device includes an epitaxial silicon carbide layer including a first conductivity type and a buried lateral silicon carbide edge termination region located within the epitaxial silicon carbide layer including a second conductivity type. The buried lateral silicon carbide edge termination region is covered by a silicon carbide surface layer including the first conductivity type.

Abstract translation: 碳化硅器件包括包括第一导电类型的外延碳化硅层和位于包含第二导电类型的外延碳化硅层内的埋入横向碳化硅边缘终止区。 埋入的侧面碳化硅边缘终端区域由包括第一导电类型的碳化硅表面层覆盖。