公开(公告)号：US20070187846A1

公开(公告)日：2007-08-16

申请号：US11737245

申请日：2007-04-19

申请人： Myung-Koo Kang ,  Hyun-Jae Kim ,  Sook-Young Kang

发明人： Myung-Koo Kang ,  Hyun-Jae Kim ,  Sook-Young Kang

IPC分类号： H01L21/027

CPC分类号： H01L21/02675 ,  H01L21/02532 ,  H01L21/0268 ,  H01L21/2026 ,  H01L29/66757 ,  H01L29/78675 ,  Y10S260/35

摘要： A mask for forming polysilicon has a first slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, a second slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while baring the same width, a third slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, and a fourth slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width. The slit patterns arranged at the first to fourth slit regions are sequentially enlarged in width in the horizontal direction in multiple proportion to the width d of the slit pattern at the first slit region. The centers of the slit patterns arranged at the first to fourth slit regions in the horizontal direction are placed at the same line. The slit patterns arranged at the respective slit regions in the vertical direction are spaced from each other with a distance 8*d. Alternatively, the first to fourth slit regions may be arranged in reverse order, or in the vertical direction.

摘要翻译： 用于形成多晶硅的掩模具有第一狭缝区域，其中垂直方向上布置多个水平狭缝图案，同时承载相同的宽度;第二狭缝区域，其中沿垂直方向布置多个水平狭缝图案，同时使其相同 宽度，在垂直方向上布置多个水平狭缝图案同时具有相同宽度的第三狭缝区域，以及沿垂直方向布置多个水平狭缝图案的第四狭缝区域，同时承载相同的宽度。 布置在第一至第四狭缝区域的狭缝图案在第一狭缝区域上与狭缝图案的宽度d成一定比例地沿水平方向的宽度依次增大。 沿水平方向布置在第一至第四狭缝区域处的狭缝图案的中心位于相同的线上。 在垂直方向的各个狭缝区域上排列的狭缝图案间隔8 * d。 或者，第一至第四狭缝区域可以以相反的顺序或在垂直方向上布置。

公开(公告)号：US20070042575A1

公开(公告)日：2007-02-22

申请号：US10549334

申请日：2004-03-12

申请人： Su-Gyeong Lee ,  Dong-Byum Kim ,  Myung-Koo Kang ,  Ui-Jin Chung ,  Hyun-Jae Kim

发明人： Su-Gyeong Lee ,  Dong-Byum Kim ,  Myung-Koo Kang ,  Ui-Jin Chung ,  Hyun-Jae Kim

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/02675 ,  B23K26/0604 ,  B23K26/067 ,  B23K26/0673 ,  H01L21/02532 ,  H01L21/02678 ,  H01L21/2026 ,  H01L21/268

摘要： A plurality laser beams generated by a plurality of beam generators are synthesized by a beam synthesizer. The synthesized beam is splitted into a plurality of beamlets and provided for a plurality of optical units controlling the beamlets. Each beamlet controlled by each optical unit is illuminated onto an amorphous silicon layer deposited on a substrate that is mounted on a plurality of stages to be polycrystallized.

摘要翻译： 由多个光束发生器产生的多个激光束由光束合成器合成。 合成的光束被分裂成多个子束并且被设置用于控制子束的多个光学单元。 由每个光学单元控制的每个子束被照射到沉积在基板上的非晶硅层上，所述非晶硅层安装在多个阶段上以进行多晶化。

公开(公告)号：US20060148165A1

公开(公告)日：2006-07-06

申请号：US10547070

申请日：2004-02-24

申请人： Ui-Jin Chung ,  Dong-Byum Kim ,  Su-Gyeong Lee ,  Myung-Koo Kang ,  Hyun-Jae Kim

发明人： Ui-Jin Chung ,  Dong-Byum Kim ,  Su-Gyeong Lee ,  Myung-Koo Kang ,  Hyun-Jae Kim

IPC分类号： H01L21/8238

CPC分类号： B23K26/0676 ,  B23K26/06 ,  B23K26/064 ,  B23K26/0643 ,  B23K26/066 ,  B23K26/067 ,  B23K26/0732 ,  B23K2101/40 ,  H01L21/02532 ,  H01L21/0268 ,  H01L21/02686 ,  H01L21/02691 ,  H01L21/268 ,  H01L27/1285

摘要： A silicon crystallization system includes a beam generator generating a laser beam, first and second optical units for controlling the laser beam from the beam generator; and a stage for mounting a panel including an amorphous silicon layer to be polycrystallized by the laser beam from the optical units. The first optical unit makes the laser beam have a transverse edge and a longitudinal edge longer than the transverse edge, and the second optical unit makes the laser beam have a transverse edge and a longitudinal edge shorter than the transverse edge.

摘要翻译： 硅结晶系统包括产生激光束的光束发生器，用于控制来自光束发生器的激光束的第一和第二光学单元; 以及用于安装包括由来自光学单元的激光束多晶化的非晶硅层的面板的台。 第一光学单元使得激光束具有比横向边缘长的横向边缘和纵向边缘，并且第二光学单元使得激光束具有比横向边缘更短的横向边缘和纵向边缘。

公开(公告)号：US07011911B2

公开(公告)日：2006-03-14

申请号：US10663081

申请日：2003-09-16

申请人： Hyun-Jae Kim ,  Sook-Young Kang ,  Myung-Koo Kang

发明人： Hyun-Jae Kim ,  Sook-Young Kang ,  Myung-Koo Kang

IPC分类号： G03F9/00

CPC分类号： H01L29/66757 ,  H01L29/78675

摘要： In a method of manufacturing a thin film transistor according to the present invention, an amorphous silicon thin film is firstly formed on an insulating substrate and a planarization layer is formed thereon. Thereafter, the amorphous silicon thin film is crystallized by a solidification process using a laser-irradiation to form a polysilicon thin film. Next, the polysilicon thin film and the planarization layer are patterned to form a semiconductor layer, and a gate insulating layer covering the semiconductor layer is formed. Then, a gate electrode is formed on the gate insulating layer opposite the semiconductor layer. Next, impurities are implanted into the semiconductor layer to form a source region and a drain region opposite each other with respect to the gate electrode, and a source electrode and a drain electrode electrically connected to the source region and the drain region, respectively, are formed.

摘要翻译： 在本发明的薄膜晶体管的制造方法中，首先在绝缘基板上形成非晶硅薄膜，在其上形成平坦化层。 此后，通过使用激光照射的固化工艺使非晶硅薄膜结晶，形成多晶硅薄膜。 接下来，对多晶硅薄膜和平坦化层进行构图以形成半导体层，并且形成覆盖半导体层的栅极绝缘层。 然后，在与半导体层相对的栅极绝缘层上形成栅电极。 接下来，将杂质注入到半导体层中以形成相对于栅极彼此相对的源极区域和漏极区域，并且分别与源极区域和漏极区域电连接的源极电极和漏极电极是 形成。

公开(公告)号：US06906349B2

公开(公告)日：2005-06-14

申请号：US10752510

申请日：2004-01-08

申请人： Hyun-Jae Kim ,  Sook-Young Kang ,  Dong-Byum Kim ,  Su-Gyeong Lee ,  Myung-Koo Kang

发明人： Hyun-Jae Kim ,  Sook-Young Kang ,  Dong-Byum Kim ,  Su-Gyeong Lee ,  Myung-Koo Kang

IPC分类号： H01L51/50 ,  G09F9/30 ,  H01L21/00 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/01 ,  H01L27/08 ,  H01L27/12 ,  H01L27/32 ,  H01L29/04 ,  H01L29/786 ,  H01L29/788 ,  H01L31/036 ,  H01L31/0392 ,  H01L31/20 ,  H05B33/14

CPC分类号： H01L21/02678 ,  C30B13/24 ,  C30B29/06 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/2026 ,  H01L27/1229 ,  H01L27/1285 ,  H01L27/1296 ,  Y10T428/24273

摘要： A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.

公开(公告)号：US20050079693A1

公开(公告)日：2005-04-14

申请号：US10495673

申请日：2002-01-24

申请人： Myung-Koo Kang ,  Hyun-Jae Kim ,  Sook-Young Kang

发明人： Myung-Koo Kang ,  Hyun-Jae Kim ,  Sook-Young Kang

IPC分类号： G02F1/1368 ,  H01L21/20 ,  H01L21/336 ,  H01L29/786

CPC分类号： H01L21/02675 ,  H01L21/02532 ,  H01L21/0268 ,  H01L21/2026 ,  H01L29/66757 ,  H01L29/78675 ,  Y10S260/35

摘要： A mask for forming polysilicon has a first slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, a second slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, a third slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, and a fourth slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width. The slit patterns arranged at the first to fourth slit regions are sequentially enlarged in width in the horizontal direction in multiple proportion to the width d of the slit pattern at the first slit region. The centers of the slit patterns arranged at the first to fourth slit regions in the horizontal direction are placed at the same line. The slit patterns arranged at the respective slit regions in the vertical direction are spaced from each other with a distance of 8*d. Alternatively, the first to fourth slit regions may be arranged in reverse order, or in the vertical direction.

摘要翻译： 用于形成多晶硅的掩模具有第一狭缝区域，其中垂直方向上布置多个水平狭缝图案，同时承载相同的宽度，在垂直方向上布置多个水平狭缝图案的第二狭缝区域，同时承载相同的宽度 宽度，在垂直方向上布置多个水平狭缝图案同时具有相同宽度的第三狭缝区域，以及沿垂直方向布置多个水平狭缝图案的第四狭缝区域，同时承载相同的宽度。 布置在第一至第四狭缝区域的狭缝图案在第一狭缝区域上与狭缝图案的宽度d成一定比例地沿水平方向的宽度依次增大。 沿水平方向布置在第一至第四狭缝区域处的狭缝图案的中心位于相同的线上。 在垂直方向的各个狭缝区域上排列的狭缝图案彼此间隔8 * d。 或者，第一至第四狭缝区域可以以相反的顺序或在垂直方向上布置。

公开(公告)号：US08717914B2

公开(公告)日：2014-05-06

申请号：US12770210

申请日：2010-04-29

申请人： Sung Kyung Kim ,  Sung Cheol Chang ,  Hyun-Jae Kim ,  Won-Ik Kim ,  Chul Sik Yoon ,  Jee Hwan Ahn

发明人： Sung Kyung Kim ,  Sung Cheol Chang ,  Hyun-Jae Kim ,  Won-Ik Kim ,  Chul Sik Yoon ,  Jee Hwan Ahn

IPC分类号： H04L12/26 ,  H04L12/28 ,  H04B7/00

CPC分类号： H04W16/10 ,  H04L5/0073 ,  H04W16/08 ,  H04W72/082

摘要： A method for controlling interference between a plurality of neighboring base stations for a terminal by a serving base station of the terminal in a communication system is provided. The method includes receiving interference amount information on a first region of a downlink frame from the terminal, determining an interference amount estimate for the first region based on the received interference amount information, comparing the determined interference amount estimate with an interference amount tolerance for the first region; and transmitting an interference indicator requesting reduction in transmission power for the first region to the plurality of neighboring base stations when the interference amount estimate exceeds the interference amount tolerance.

摘要翻译： 提供了一种用于在通信系统中控制终端的服务基站的终端的多个相邻基站之间的干扰的方法。 该方法包括从终端接收关于下行链路帧的第一区域的干扰量信息，基于接收到的干扰量信息确定第一区域的干扰量估计，将确定的干扰量估计与第一区域的干扰量容限进行比较 地区; 以及当所述干扰量估计超过所述干扰量容差时，向所述多个相邻基站发送请求减少所述第一区域的发射功率的干扰指示符。

公开(公告)号：US08682359B2

公开(公告)日：2014-03-25

申请号：US13378456

申请日：2010-06-17

申请人： Won-Ik Kim ,  Jae Sun Cha ,  Sung Cheol Chang ,  Kwang Jae Lim ,  Hyun-Jae Kim ,  Sung Kyung Kim ,  Chul Sik Yoon

发明人： Won-Ik Kim ,  Jae Sun Cha ,  Sung Cheol Chang ,  Kwang Jae Lim ,  Hyun-Jae Kim ,  Sung Kyung Kim ,  Chul Sik Yoon

IPC分类号： H04W68/00

摘要： A base station management method according to the present invention is a method for managing an operation mode of a base station, and includes determining whether a terminal exists in a cell managed by the base station and operating in a low duty operation mode (LDM) when no terminal exists in the cell.

公开(公告)号：US20120094654A1

公开(公告)日：2012-04-19

申请号：US13378456

申请日：2010-06-17

申请人： Won-Ik Kim ,  Jae Sun Cha ,  Sung Cheol Chang ,  Kwang Jae Lim ,  Hyun-Jae Kim ,  Sung Kyung Kim ,  Chul Sik Yoon

发明人： Won-Ik Kim ,  Jae Sun Cha ,  Sung Cheol Chang ,  Kwang Jae Lim ,  Hyun-Jae Kim ,  Sung Kyung Kim ,  Chul Sik Yoon

IPC分类号： H04W68/00 ,  H04W56/00

CPC分类号： H04W52/0206 ,  H04W8/005 ,  H04W84/045 ,  Y02D70/1226

摘要： A base station management method according to the present invention is a method for managing an operation mode of a base station, and includes determining whether a terminal exists in a cell managed by the base station and operating in a low duty operation mode (LDM) when no terminal exists in the cell.

摘要翻译： 根据本发明的基站管理方法是用于管理基站的操作模式的方法，并且包括确定终端是否存在于由基站管理的小区中并且以低占空比操作模式（LDM）操作， 细胞中不存在末端。

公开(公告)号：US20110216684A1

公开(公告)日：2011-09-08

申请号：US13126897

申请日：2009-10-30

申请人： Eunkyung Kim ,  Juhee Kim ,  Hyun-Jae Kim ,  Kyung Soo Kim

发明人： Eunkyung Kim ,  Juhee Kim ,  Hyun-Jae Kim ,  Kyung Soo Kim

IPC分类号： H04W52/02

CPC分类号： H04W52/0229 ,  H04L5/001 ,  H04L5/008 ,  H04L5/0098 ,  H04L5/02 ,  H04L27/2601 ,  H04W36/24 ,  H04W52/0206 ,  H04W52/0216 ,  H04W72/042 ,  H04W72/0453 ,  Y02D70/20

摘要： A multi-carriers management device of a communication system supporting multi-carriers requests a terminal attempting to enter a sleep window to change a primary carrier, and transmits a control message to the terminal through the changed primary carrier during the sleep window.

摘要翻译： 支持多载波的通信系统的多载波管理装置请求尝试进入睡眠窗口的终端来改变主载波，并且在睡眠窗口期间通过改变的主载波向终端发送控制消息。