Method and system for planar regrowth in GAN electronic devices
    51.
    发明授权
    Method and system for planar regrowth in GAN electronic devices 有权
    GAN电子设备中平面再生长的方法和系统

    公开(公告)号:US09117839B2

    公开(公告)日:2015-08-25

    申请号:US13465812

    申请日:2012-05-07

    摘要: A vertical JFET includes a III-nitride substrate and a III-nitride epitaxial layer of a first conductivity type coupled to the III-nitride substrate. The first III-nitride epitaxial layer has a first dopant concentration. The vertical JFET also includes a III-nitride epitaxial structure coupled to the first III-nitride epitaxial layer. The III-nitride epitaxial structure includes a set of channels of the first conductivity type and having a second dopant concentration, a set of sources of the first conductivity type, having a third dopant concentration greater than the first dopant concentration, and each characterized by a contact surface, and a set of regrown gates interspersed between the set of channels. An upper surface of the set of regrown gates is substantially coplanar with the contact surfaces of the set of sources.

    摘要翻译: 垂直JFET包括III族氮化物衬底和与III族氮化物衬底耦合的第一导电类型的III族氮化物外延层。 第一III族氮化物外延层具有第一掺杂剂浓度。 垂直JFET还包括耦合到第一III族氮化物外延层的III族氮化物外延结构。 III族氮化物外延结构包括一组第一导电类型的沟道并且具有第二掺杂剂浓度,第一导电类型的一组源,其具有大于第一掺杂剂浓度的第三掺杂剂浓度,并且各自的特征在于: 接触表面,以及一组重新生长的门,散布在通道组之间。 该组再生栅极的上表面与该组源的接触表面基本共面。

    Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode by regrowth and etch back
    52.
    发明授权
    Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode by regrowth and etch back 有权
    通过再生长和回蚀刻制造氮化镓合并的P-i-N肖特基(MPS)二极管的方法

    公开(公告)号:US08969994B2

    公开(公告)日:2015-03-03

    申请号:US13585121

    申请日:2012-08-14

    摘要: An MPS diode includes a III-nitride substrate characterized by a first conductivity type and a first dopant concentration and having a first side and a second side. The MPS diode also includes a III-nitride epitaxial structure comprising a first III-nitride epitaxial layer coupled to the first side of the substrate, wherein a region of the first III-nitride epitaxial layer comprises an array of protrusions. The III-nitride epitaxial structure also includes a plurality of III-nitride regions of a second conductivity type, each partially disposed between adjacent protrusions. Each of the plurality of III-nitride regions of the second conductivity type comprises a first section laterally positioned between adjacent protrusions and a second section extending in a direction normal to the first side of the substrate. The MPS diode further includes a first metallic structure electrically coupled to one or more of the protrusions and to one or more of the second sections.

    摘要翻译: MPS二极管包括以第一导电类型和第一掺杂剂浓度为特征的III族氮化物衬底,其具有第一侧和第二侧。 MPS二极管还包括III族氮化物外延结构,其包括耦合到衬底的第一侧的第一III族氮化物外延层,其中第一III族氮化物外延层的区域包括突起阵列。 III族氮化物外延结构还包括多个第二导电类型的III族氮化物区域,每个部分设置在相邻的突起之间。 第二导电类型的多个III族氮化物区域中的每一个包括横向位于相邻突起之间的第一部分和沿着垂直于衬底的第一侧的方向延伸的第二部分。 MPS二极管还包括电耦合到一个或多个突起和一个或多个第二部分的第一金属结构。

    Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode
    53.
    发明授权
    Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode 有权
    制造氮化镓合并的P-i-N肖特基(MPS)二极管的方法

    公开(公告)号:US08778788B2

    公开(公告)日:2014-07-15

    申请号:US13270625

    申请日:2011-10-11

    IPC分类号: H01L21/28

    摘要: A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial structure including a first III-nitride epitaxial layer coupled to the first side of the III-nitride substrate and a plurality of III-nitride regions of a second conductivity type. The plurality of III-nitride regions have at least one III-nitride epitaxial region of the first conductivity type between each of the plurality of III-nitride regions. The semiconductor structure further includes a first metallic structure electrically coupled to one or more of the plurality of III-nitride regions and the at least one III-nitride epitaxial region. A Schottky contact is created between the first metallic structure and the at least one III-nitride epitaxial region.

    摘要翻译: 半导体结构包括具有第一侧和与第一侧相对的第二侧的III族氮化物衬底。 III族氮化物衬底的特征在于第一导电类型和第一掺杂剂浓度。 半导体结构还包括III族氮化物外延结构,其包括耦合到III族氮化物衬底的第一侧的第一III族氮化物外延层和多个第二导电类型的III族氮化物区域。 多个III族氮化物区域在多个III族氮化物区域中的每一个之间具有至少一个第一导电类型的III族氮化物外延区域。 半导体结构还包括电耦合到多个III族氮化物区域和至少一个III族氮化物外延区域中的一个或多个的第一金属结构。 在第一金属结构和至少一个III族氮化物外延区之间产生肖特基接触。

    METHOD OF FABRICATING A GALLIUM NITRIDE MERGED P-I-N SCHOTTKY (MPS) DIODE BY REGROWTH AND ETCH BACK
    54.
    发明申请
    METHOD OF FABRICATING A GALLIUM NITRIDE MERGED P-I-N SCHOTTKY (MPS) DIODE BY REGROWTH AND ETCH BACK 有权
    通过调整和回填制备氮化镓合并的P-I-N肖特基(MPS)二极体的方法

    公开(公告)号:US20140048902A1

    公开(公告)日:2014-02-20

    申请号:US13585121

    申请日:2012-08-14

    IPC分类号: H01L21/329 H01L29/872

    摘要: An MPS diode includes a III-nitride substrate characterized by a first conductivity type and a first dopant concentration and having a first side and a second side. The MPS diode also includes a III-nitride epitaxial structure comprising a first III-nitride epitaxial layer coupled to the first side of the substrate, wherein a region of the first III-nitride epitaxial layer comprises an array of protrusions. The III-nitride epitaxial structure also includes a plurality of III-nitride regions of a second conductivity type, each partially disposed between adjacent protrusions. Each of the plurality of III-nitride regions of the second conductivity type comprises a first section laterally positioned between adjacent protrusions and a second section extending in a direction normal to the first side of the substrate. The MPS diode further includes a first metallic structure electrically coupled to one or more of the protrusions and to one or more of the second sections.

    摘要翻译: MPS二极管包括以第一导电类型和第一掺杂剂浓度为特征的III族氮化物衬底,其具有第一侧和第二侧。 MPS二极管还包括III族氮化物外延结构,其包括耦合到衬底的第一侧的第一III族氮化物外延层,其中第一III族氮化物外延层的区域包括突起阵列。 III族氮化物外延结构还包括多个第二导电类型的III族氮化物区域,每个部分设置在相邻的突起之间。 第二导电类型的多个III族氮化物区域中的每一个包括横向位于相邻突起之间的第一部分和沿着垂直于衬底的第一侧的方向延伸的第二部分。 MPS二极管还包括电耦合到一个或多个突起和一个或多个第二部分的第一金属结构。

    GaN-based Schottky barrier diode with field plate
    55.
    发明授权
    GaN-based Schottky barrier diode with field plate 有权
    具有场板的GaN基肖特基势垒二极管

    公开(公告)号:US08643134B2

    公开(公告)日:2014-02-04

    申请号:US13300028

    申请日:2011-11-18

    IPC分类号: H01L29/47

    摘要: A method for fabricating a III-nitride semiconductor device includes providing a III-nitride substrate having a first surface and a second surface opposing the first surface, forming a III-nitride epitaxial layer coupled to the first surface of the III-nitride substrate, and removing at least a portion of the III-nitride epitaxial layer to form a first exposed surface. The method further includes forming a dielectric layer coupled to the first exposed surface, removing at least a portion of the dielectric layer, and forming a metallic layer coupled to a remaining portion of the dielectric layer such that the remaining portion of the dielectric layer is disposed between the III-nitride epitaxial layer and the metallic layer.

    摘要翻译: 一种制造III族氮化物半导体器件的方法包括提供具有第一表面和与第一表面相对的第二表面的III族氮化物衬底,形成耦合到III族氮化物衬底的第一表面的III族氮化物外延层,以及 去除所述III族氮化物外延层的至少一部分以形成第一暴露表面。 该方法还包括形成耦合到第一暴露表面的电介质层,去除电介质层的至少一部分,以及形成耦合到电介质层的剩余部分的金属层,使得电介质层的剩余部分被布置 在III族氮化物外延层和金属层之间。

    FABRICATION OF FLOATING GUARD RINGS USING SELECTIVE REGROWTH
    56.
    发明申请
    FABRICATION OF FLOATING GUARD RINGS USING SELECTIVE REGROWTH 失效
    使用选择性重制的浮动护环的制造

    公开(公告)号:US20130164893A1

    公开(公告)日:2013-06-27

    申请号:US13335355

    申请日:2011-12-22

    IPC分类号: H01L21/337 H01L21/20

    摘要: A method for fabricating edge termination structures in gallium nitride (GaN) materials includes providing a n-type GaN substrate having a first surface and a second surface, forming an n-type GaN epitaxial layer coupled to the first surface of the n-type GaN substrate, and forming a growth mask coupled to the n-type GaN epitaxial layer. The method further includes patterning the growth mask to expose at least a portion of the n-type GaN epitaxial layer, and forming at least one p-type GaN epitaxial structure coupled to the at least a portion of the n-type GaN epitaxial layer. The at least one p-type GaN epitaxial structure comprises at least one portion of an edge termination structure. The method additionally includes forming a first metal structure electrically coupled to the second surface of the n-type GaN substrate.

    摘要翻译: 一种用于制造氮化镓(GaN)材料中的边缘端接结构的方法包括提供具有第一表面和第二表面的n型GaN衬底,形成耦合到n型GaN的第一表面的n型GaN外延层 并且形成耦合到n型GaN外延层的生长掩模。 该方法进一步包括图案化生长掩模以暴露n型GaN外延层的至少一部分,以及形成耦合到n型GaN外延层的至少一部分的至少一个p型GaN外延结构。 所述至少一个p型GaN外延结构包括边缘端接结构的至少一部分。 该方法还包括形成电耦合到n型GaN衬底的第二表面的第一金属结构。

    METHOD AND SYSTEM FOR A GAN VERTICAL JFET UTILIZING A REGROWN GATE
    60.
    发明申请
    METHOD AND SYSTEM FOR A GAN VERTICAL JFET UTILIZING A REGROWN GATE 有权
    用于使用注射门的GAN垂直JFET的方法和系统

    公开(公告)号:US20130032811A1

    公开(公告)日:2013-02-07

    申请号:US13198655

    申请日:2011-08-04

    摘要: A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction.

    摘要翻译: 垂直III族氮化物场效应晶体管包括:包含第一III族氮化物材料的漏极,与漏极电耦合的漏极接触点;以及漂移区域,包括耦合到漏极并邻近漏极设置的第二III族氮化物材料 垂直方向 场效应晶体管还包括沟道区,该沟道区包括耦合到漂移区的第三III族氮化物材料,至少部分围绕沟道区的栅极区和电耦合到栅极区的栅极接触。 场效应晶体管还包括耦合到沟道区的源极和电耦合到源极的源极接触。 沟道区域沿着垂直方向设置在漏极和源极之间,使得垂直III族氮化物场效应晶体管的工作期间的电流沿垂直方向。