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122 条记录 (耗时 0.038 秒)

    Programming management data for NAND memories
    51.
    发明授权
    Programming management data for NAND memories 有权
    NAND存储器的编程管理数据

    公开(公告)号：US07861139B2

    公开(公告)日：2010-12-28

    申请号：US11698455

    申请日：2007-01-26

    申请人： Michael Murray ,  William Henry Radke

    发明人： Michael Murray ,  William Henry Radke

    IPC分类号： G11C29/00

    CPC分类号： G06F11/1008 ,  G06F11/1072 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C29/00 ,  G11C2211/5642

    摘要： Methods, apparatus, systems, and data structures may operate to generate or store error correction data for each of a plurality of sectors of a page except for a particular sector in the page and combining a block management data with the particular sector to generate a modified sector. Additionally, various methods, apparatus, systems, and data structures may operate to generate or store error correction data for the modified sector and combining the plurality of sectors, the error correction data for each of the plurality of sectors other than the particular page, and the block management data and the error correction data for the modified sector.

    摘要翻译： 方法，装置，系统和数据结构可以操作以生成或存储除了页面中的特定扇区之外的页面的多个扇区中的每一个的纠错数据，并且将块管理数据与特定扇区组合以生成修改的 部门。 此外，各种方法，装置，系统和数据结构可以操作以产生或存储修改的扇区的纠错数据并组合多个扇区，除了特定页面之外的多个扇区中的每一个的纠错数据，以及 块管理数据和修改扇区的纠错数据。

    Diamond medical devices
    52.
    发明授权
    Diamond medical devices 有权
    钻石医疗器械

    公开(公告)号：US07829377B2

    公开(公告)日：2010-11-09

    申请号：US11329959

    申请日：2006-01-11

    申请人： Robert C. Linares ,  Patrick J. Doering ,  Bryant Linares ,  Alfred R. Genis ,  William W. Dromeshauser ,  Michael Murray ,  Alicia E. Novak ,  John M. Abrahams

    发明人： Robert C. Linares ,  Patrick J. Doering ,  Bryant Linares ,  Alfred R. Genis ,  William W. Dromeshauser ,  Michael Murray ,  Alicia E. Novak ,  John M. Abrahams

    IPC分类号： H01L21/00

    CPC分类号： H01L21/0405 ,  B81C1/00634

    摘要： Masked and controlled ion implants, coupled with annealing or etching are used in CVD formed single crystal diamond to create structures for both optical applications, nanoelectromechanical device formation, and medical device formation. Ion implantation is employed to deliver one or more atomic species into and beneath the diamond growth surface in order to form an implanted layer with a peak concentration of atoms at a predetermined depth beneath the diamond growth surface. The composition is heated in a non-oxidizing environment under suitable conditions to cause separation of the diamond proximate the implanted layer. Further ion implants may be used in released structures to straighten or curve them as desired. Boron doping may also be utilized to create conductive diamond structures.

    摘要翻译： 在CVD形成的单晶金刚石中使用掩蔽和控制的离子植入物，与退火或蚀刻相结合，以产生用于光学应用，纳米机电装置形成和医疗装置形成的结构。 使用离子注入将一种或多种原子物质输送到金刚石生长表面中和其下方，以便在金刚石生长表面下方的预定深度处形成具有原子峰值浓度的注入层。 在合适的条件下，在非氧化环境中加热组合物，使金刚石在植入层附近分离。 另外的离子植入物可以用于释放的结构中，以根据需要矫直或曲线。 也可以利用硼掺杂来形成导电金刚石结构。

    Apparatus, method, and system of NAND defect management
    53.
    发明授权
    Apparatus, method, and system of NAND defect management 有权
    NAND缺陷管理的设备，方法和系统

    公开(公告)号：US07669092B2

    公开(公告)日：2010-02-23

    申请号：US11710794

    申请日：2007-02-26

    申请人： Michael Murray

    发明人： Michael Murray

    IPC分类号： G11C29/00 ,  G11C16/04

    CPC分类号： G11C29/04 ,  G06F12/0246 ,  G06F2212/7201 ,  G11C29/08 ,  G11C29/76

    摘要： Various embodiments comprise apparatus, methods, and systems that include an apparatus comprising a memory device configurable as a plurality of erase block groups including a base erase block group, wherein each of the plurality of erase block groups comprises a plurality of erase blocks each identified by a matching unique plurality of erase block numbers unique within the plurality of erase blocks and matching across the plurality of erase block groups; and a mapping table coupled to the plurality of erase block groups to store at least one group address number corresponding to one of the matching unique plurality of erase block numbers identifying a non-defective erase block in the base erase block group, and corresponding to several of the matching unique plurality of erase block numbers identifying a single non-defective erase block in each of the plurality of erase block groups other than the base erase block group.

    摘要翻译： 各种实施例包括装置，方法和系统，其包括装置，其包括可配置为包括基本擦除块组的多个擦除块组的存储器件，其中多个擦除块组中的每一个包括多个擦除块，每个擦除块由 在多个擦除块内唯一的匹配唯一的多个擦除块号，并且跨越多个擦除块组进行匹配; 以及映射表，其耦合到所述多个擦除块组，以存储对应于所述基本擦除块组中识别无缺陷擦除块的匹配唯一多个擦除块号中的一个的至少一个组地址号， 识别除了基本擦除块组之外的多个擦除块组中的每一个中的单个无缺陷擦除块的匹配的唯一多个擦除块号。

    HYBRID MEMORY MANAGEMENT
    54.
    发明申请
    HYBRID MEMORY MANAGEMENT 有权
    混合记忆管理

    公开(公告)号：US20090300269A1

    公开(公告)日：2009-12-03

    申请号：US12127945

    申请日：2008-05-28

    申请人： William H. Radke ,  Michael Murray ,  Martin Ragnar Furuhjelm ,  John Geldman

    发明人： William H. Radke ,  Michael Murray ,  Martin Ragnar Furuhjelm ,  John Geldman

    IPC分类号： G06F12/02

    CPC分类号： G06F12/0246 ,  G06F2212/1016 ,  G06F2212/1036 ,  G06F2212/7201 ,  G06F2212/7211 ,  G11C16/349 ,  G11C2211/5641

    摘要： Methods and apparatus for managing data storage in hybrid memory devices utilizing single level and multi level memory cells. Logical addresses can be distributed between single level and multilevel memory cells based on a frequency of write operations performed. Initial storage of data corresponding to a logical address in memory can be determined by various methods including initially writing all data to single level memory or initially writing all data to multilevel memory. Other methods permit a host to direct logical address writes to single level or multilevel memory cells based on anticipated usage.

    摘要翻译： 用于使用单级和多级存储器单元来管理混合存储器件中的数据存储的方法和装置。 逻辑地址可以基于执行的写操作的频率在单级和多级存储器单元之间分配。 可以通过各种方法来确定与存储器中的逻辑地址相对应的数据的初始存储，包括首先将所有数据写入单级存储器或者首先将所有数据写入多级存储器。 其他方法允许主机根据预期用途将逻辑地址写入指向单级或多级存储器单元。

    Methods of automatically generating dummy fill having reduced storage size
    55.
    发明申请
    Methods of automatically generating dummy fill having reduced storage size 审中-公开
    自动生成减少存储大小的虚拟填充的方法

    公开(公告)号：US20080121939A1

    公开(公告)日：2008-05-29

    申请号：US11593892

    申请日：2006-11-06

    申请人： Michael Murray ,  Van Nguyen

    发明人： Michael Murray ,  Van Nguyen

    IPC分类号： H01L27/10 ,  G06F17/50

    CPC分类号： H01L22/20 ,  G03F1/36 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The disclosure relates generally to production of lithography masks such as used in mass production of monolithic integrated circuits (IC's). Layers of such IC's often need to be filled with dummy-fill. In accordance with the disclosure, dummy-objects are first generated by a conventional flat-fill technique and then they are automatically surrounded by outlines that are substantially wrinkle-free. The outlines are cleared of the original flat-fill and then used as areas that are to be automatically tiled by an auto-tiling program. Tiles are then re-filled with array definitions of regularly-spaced dummy-objects. The arrays consume less data storage space than do the original, individually-specified (flat-filled) dummy-objects. The array data is appended to layout data of functional objects in a layer of the integrated monolithic device (IC) to thereby generate a dummy-filled tapeout file. The dummy-filled tapeout file is subjected to pre-tapeout rules checking and then transmitted via a network to a mask house for production of a corresponding lithography mask. The lithography mask is used to mass produce corresponding integrated circuits.

    摘要翻译： 本公开通常涉及用于批量生产单片集成电路（IC）的光刻掩模的生产。 这种IC的层通常需要填充虚拟填充。 根据本公开，虚拟物体首先通过常规的平填技术生成，然后它们被基本上无皱纹的轮廓自动地包围。 轮廓线被清除原始的平面填充，然后被用作自动平铺程序自动平铺的区域。 然后使用规则间隔的虚拟对象的数组定义重新填充瓷砖。 与原始的，单独指定的（平坦填充的）虚拟对象相比，阵列消耗的数据存储空间较少。 将阵列数据附加到集成单片设备（IC）的层中的功能对象的布局数据，从而生成虚拟填充的流图文件。 虚拟填充的流图文件经受预先流图规则检查，然后经由网络传输到掩模室，以生产相应的光刻掩模。 光刻掩模用于批量生产相应的集成电路。

    CATHETER PRODUCT PACKAGE AND METHOD OF FORMING SAME
    57.
    发明申请
    CATHETER PRODUCT PACKAGE AND METHOD OF FORMING SAME 有权
    导管产品包装及其形成方法

    公开(公告)号：US20070289887A1

    公开(公告)日：2007-12-20

    申请号：US11760545

    申请日：2007-06-08

    申请人： Michael Murray ,  Kai Jorgensen

    发明人： Michael Murray ,  Kai Jorgensen

    IPC分类号： B65D69/00 ,  A61B19/02 ,  B65D83/10

    CPC分类号： B65D51/00 ,  A61M25/002 ,  A61M25/0111

    摘要： A catheter product package and method of forming same in which the package comprises a sheet material wrapped about the catheter product to form a package for the catheter product. The catheter product extends generally longitudinally within the package, and the sheet material extends from a point beyond the proximal end to a point beyond the distal end of the catheter product. The sheet material of the package is wrapped about the catheter product in a manner defining confronting proximal end edges, confronting distal end edges, and confronting side edges. The confronting proximal end edges, distal end edges and side edges of the sheet material are joined by a seal after the sheet material is wrapped about the catheter product to define a sealed cavity. The sheet material has a tear strip affixed to it which causes the sheet material to tear along the tear strip to thereby cause the package to open along an intended opening line. A method of forming a package for a catheter product comprises the steps of providing a sheet material for the package and placing the catheter product on the sheet material. It also includes affixing a tear strip to the sheet material and wrapping the sheet material around the catheter product. Further, the method includes the step of sealing the sheet material to form a sealed cavity with the catheter product being disposed within the sealed cavity.

    摘要翻译： 导管产品包装及其形成方法，其中包装包括围绕导管产品缠绕的片材以形成用于导管产品的包装。 导管产品在包装内大致纵向地延伸，并且片材从超过近端的点延伸到超过导管产品的远端的点。 包装的片材以围绕近端边缘，面对远端边缘和面对侧边缘的方式围绕导管产品缠绕。 在片材围绕导管产品缠绕以限定密封空腔之后，片材的面对的近端边缘，远端边缘和侧边缘通过密封件接合。 片材具有固定到其上的撕裂条，其导致片材沿着撕裂带撕裂，从而使包装沿着预期的开口线打开。 形成用于导管产品的包装的方法包括以下步骤：提供用于包装的片材材料并将导管产品放置在片材上。 它还包括将撕裂带固定在片材上并将片材缠绕在导管产品周围。 此外，该方法包括密封片材以形成密封空腔的步骤，导管产品设置在密封腔内。

    MRI biopsy apparatus incorporating an imageable penetrating portion
    58.
    发明申请
    MRI biopsy apparatus incorporating an imageable penetrating portion 有权
    MRI活检装置结合有可成像的穿透部分

    公开(公告)号：US20070167736A1

    公开(公告)日：2007-07-19

    申请号：US11323535

    申请日：2005-12-30

    申请人： Timothy Dietz ,  Keshava Datta ,  John Hibner ,  Michael Murray ,  Robert Hughes

    发明人： Timothy Dietz ,  Keshava Datta ,  John Hibner ,  Michael Murray ,  Robert Hughes

    IPC分类号： A61B5/05

    CPC分类号： G01R33/286 ,  A61B5/05 ,  A61B5/055 ,  A61B10/0041 ,  A61B10/0275 ,  A61B90/11 ,  A61B2010/045 ,  A61B2090/374 ,  A61B2090/3908 ,  A61B2090/3954 ,  A61B2090/3983

    摘要： An obturator as part of a biopsy system enhances use with Magnetic Resonance Imaging (MRI) by indicating location of a side aperture in an encompassing cannula. The cannula (e.g., detached probe, sleeve sized to receive a core biopsy probe) includes a side aperture for taking a tissue sample. When the obturator is inserted in lieu of the biopsy device into the cannula, a notch formed in a shaft of the obturator corresponds to the side aperture. A dugout trough into the notch may further accept aqueous material to further accentuate the side aperture. In addition, a series of dimensionally varied apertures (e.g., wells, slats) that communicate through a lateral surface of the shaft and that are proximal to the side aperture receive an aqueous material to accentuate visibility in an MRI image, even in a skewed MRI slice through the cannula/obturator.

    摘要翻译： 作为活检系统的一部分的闭孔器通过指示包围套管中的侧孔的位置来增强磁共振成像（MRI）的使用。 套管（例如，分离的探针，尺寸设置成接纳芯活检探针的套管）包括用于取组织样本的侧孔。 当插入代替活检装置的闭塞器插入插管中时，形成在闭孔器的轴中的凹口对应于侧孔。 进入切口的独立槽可以进一步接受含水材料以进一步强化侧孔。 另外，通过轴的侧表面连通并且靠近侧孔的一系列尺寸不同的孔（例如，孔，板条）接收含水材料以增强MRI图像中的可视性，即使在偏斜的MRI 穿过套管/闭孔器切片。

    Two-bit per I/O line write data bus for DDR1 and DDR2 operating modes in a DRAM
    59.
    发明申请
    Two-bit per I/O line write data bus for DDR1 and DDR2 operating modes in a DRAM 有权
    在DRAM中为DDR1和DDR2工作模式写入数据总线的两位I / O线

    公开(公告)号：US20070008784A1

    公开(公告)日：2007-01-11

    申请号：US11177537

    申请日：2005-07-08

    申请人： Jon Faue ,  Steve Eaton ,  Michael Murray

    发明人： Jon Faue ,  Steve Eaton ,  Michael Murray

    IPC分类号： G11C7/10

    CPC分类号： G11C7/1078 ,  G11C7/1072 ,  G11C7/1093 ,  G11C7/1096

    摘要： A data bus circuit for an integrated circuit memory includes a 4-bit bus per I/O pad that is used to connect the memory with an I/O block, but only two bits per I/O are utilized for writing. Four bits per I/O pad are used for reading. At every falling edge of an input data strobe, the last two bits are transmitted over the bus, which eliminates the need for the precise counting of input data strobe pulses. The data bus circuit is compatible with both DDR1 and DDR2 operating modes.

    摘要翻译： 用于集成电路存储器的数据总线电路包括用于将存储器与I / O块连接的每个I / O焊盘的4位总线，但每个I / O仅使用两位用于写入。 使用四位每个I / O焊盘进行读取。 在输入数据选通的每个下降沿，最后两位通过总线发送，这样就不需要精确计数输入数据选通脉冲。 数据总线电路兼容DDR1和DDR2工作模式。