公开(公告)号：US12114492B2

公开(公告)日：2024-10-08

申请号：US17071980

申请日：2020-10-15

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  John Mark Meldrim ,  Everett A. McTeer

IPC: H10B43/27 ,  H01L21/285 ,  H10B41/27 ,  H10B43/10 ,  H10B41/10

CPC classification number: H10B41/27 ,  H01L21/28562 ,  H10B43/10 ,  H10B43/27 ,  H01L21/28518 ,  H01L21/28568 ,  H10B41/10

Abstract: Some embodiments include a method in which an assembly is formed to have voids within a stack, and to have slits adjacent the voids. Peripheral boundaries of the voids have proximal regions near the slits and distal regions adjacent the proximal regions. A material is deposited within the voids under conditions which cause the material to form to a greater thickness along the distal regions than along the proximal regions. Some embodiments include an assembly having a stack of alternating first and second levels. The second levels include conductive material. Panel structures extend through the stack. The conductive material within the second levels has outer edges with proximal regions near the panel structures and distal regions adjacent the proximal regions. Interface material is along the outer edges of the conductive material and has a different composition along the proximal regions than along the distal regions.

公开(公告)号：US12034057B2

公开(公告)日：2024-07-09

申请号：US17496715

申请日：2021-10-07

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  Rita J. Klein ,  Everett A. McTeer ,  John Mark Meldrim

IPC: H10B43/27 ,  H01L29/49 ,  H10B41/27 ,  H10B41/10 ,  H10B43/10

CPC classification number: H01L29/4966 ,  H10B41/27 ,  H10B43/27 ,  H10B41/10 ,  H10B43/10

Abstract: Some embodiments include a memory array having a vertical stack of alternating insulative levels and wordline levels. Channel material extends vertically along the stack. The wordline levels include conductive regions which have a first metal-containing material and a second metal-containing material. The first metal-containing material at least partially surrounds the second metal-containing material. The first metal-containing material has a different crystallinity than the second metal-containing material. In some embodiments the first metal-containing material is substantially amorphous, and the second metal-containing material has a mean grain size within a range of from greater than or equal to about 5 nm to less than or equal to about 200 nm. Charge-storage regions are adjacent the wordline levels. Charge-blocking regions are between the charge-storage regions and the conductive regions.

公开(公告)号：US20220238444A1

公开(公告)日：2022-07-28

申请号：US17658907

申请日：2022-04-12

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  John D. Hopkins ,  Rita J. Klein ,  Everett A. McTeer ,  Lifang Xu ,  Daniel Billingsley ,  Collin Howder

IPC: H01L23/535 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L23/522

Abstract: A microelectronic device includes a stack structure, a staircase structure, conductive pad structures, and conductive contact structures. The stack structure includes vertically alternating conductive structures and insulating structures arranged in tiers. Each of the tiers individually includes one of the conductive structures and one of the insulating structures. The staircase structure has steps made up of edges of at least some of the tiers of the stack structure. The conductive pad structures are on the steps of the staircase structure and include beta phase tungsten. The conductive contact structures are on the conductive pad structures. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.

公开(公告)号：US20210167020A1

公开(公告)日：2021-06-03

申请号：US16702222

申请日：2019-12-03

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  Lifang Xu ,  Rita J. Klein ,  Xiao Li ,  Everett A. McTeer

IPC: H01L23/532 ,  H01L23/522 ,  H01L23/00 ,  H01L21/768

Abstract: An apparatus comprising at least one contact structure. The at least one contact structure comprises a contact, an insulating material overlying the contact, and at least one contact via in the insulating material. The at least one contact structure also comprises a dielectric liner material adjacent the insulating material within the contact via, a conductive material adjacent the dielectric liner material, and a stress compensation material adjacent the conductive material and in a central portion of the at least one contact via. The stress compensation material is at least partially surrounded by the conductive material. Memory devices, electronic systems, and methods of forming the apparatus are also disclosed.

公开(公告)号：US20210151676A1

公开(公告)日：2021-05-20

申请号：US17162071

申请日：2021-01-29

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Tsz W. Chan ,  D. V. Nirmal Ramaswamy ,  Qian Tao ,  Yongjun J. Hu ,  Everett A. McTeer

IPC: H01L45/00 ,  H01L27/24

Abstract: A memory cell comprising a threshold switching material over a first electrode on a substrate. The memory cell includes a second electrode over the threshold switching material and at least one dielectric material between the threshold switching material and at least one of the first electrode and the second electrode. A memory material overlies the second electrode. The dielectric material may directly contact the threshold switching material and each of the first electrode and the second electrode. Memory cells including only one dielectric material between the threshold switching material and an electrode are disclosed. A memory device including the memory cells and methods of forming the memory cells are also described.

公开(公告)号：US10957644B2

公开(公告)日：2021-03-23

申请号：US15887064

申请日：2018-02-02

Applicant: Micron Technology, Inc.

Inventor： Christopher W. Petz ,  Everett A. McTeer

IPC: H01L23/532 ,  H01L21/768 ,  H01L21/285 ,  H01L23/528 ,  H01L21/311 ,  H01L21/3213

Abstract: Some embodiments include an integrated structure having a conductive region which contains one or more elements from Group 2 of the periodic table. Some embodiments include an integrated structure which has a conductive region over and directly against a base material. The conductive region includes one or more elements from Group 2 of the periodic table, and has a pair of opposing sidewalls along a cross-section. A capping material is over and directly against the conductive region. Protective material is along and directly against the sidewalls of the protective region.

公开(公告)号：US10943921B2

公开(公告)日：2021-03-09

申请号：US16751116

申请日：2020-01-23

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  Chet E. Carter ,  Collin Howder ,  John Mark Meldrim ,  Everett A. McTeer

IPC: H01L27/11582 ,  H01L21/3213 ,  H01L29/10 ,  H01L21/768 ,  H01L23/532 ,  H01L21/285 ,  H01L23/528 ,  H01L27/11556 ,  H01L21/28 ,  H01L29/49 ,  H01L27/11519 ,  H01L27/11565

Abstract: Some embodiments include a method of forming an integrated structure. An assembly is formed to include a stack of alternating first and second levels. The first levels have insulative material, and the second levels have voids which extend horizontally. The assembly includes channel material structures extending through the stack. A first metal-containing material is deposited within the voids to partially fill the voids. The deposited first metal-containing material is etched to remove some of the first metal-containing material from within the partially-filled voids. Second metal-containing material is then deposited to fill the voids.

公开(公告)号：US20200328284A1

公开(公告)日：2020-10-15

申请号：US16383862

申请日：2019-04-15

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  Rita J. Klein ,  Everett A. McTeer ,  John Mark Meldrim

IPC: H01L29/49 ,  H01L27/11556 ,  H01L27/11582

Abstract: Some embodiments include a memory array having a vertical stack of alternating insulative levels and wordline levels. Channel material extends vertically along the stack. The wordline levels include conductive regions which have a first metal-containing material and a second metal-containing material. The first metal-containing material at least partially surrounds the second metal-containing material. The first metal-containing material has a different crystallinity than the second metal-containing material. In some embodiments the first metal-containing material is substantially amorphous, and the second metal-containing material has a mean grain size within a range of from greater than or equal to about 5 nm to less than or equal to about 200 nm. Charge-storage regions are adjacent the wordline levels. Charge-blocking regions are between the charge-storage regions and the conductive regions.

公开(公告)号：US20200185406A1

公开(公告)日：2020-06-11

申请号：US16216088

申请日：2018-12-11

Applicant: Micron Technology, Inc.

Inventor： Haoyu Li ,  Everett A. McTeer ,  Christopher W. Petz ,  Yongjun J. Hu

IPC: H01L27/11582 ,  H01L27/11556

Abstract: A semiconductor device comprises a semiconductor material extending through a stack of alternating levels of a conductive material and an insulative material, and a material comprising cerium oxide and at least another oxide adjacent to the semiconductor material. Related electronic systems and methods are also disclosed.

公开(公告)号：US20200161332A1

公开(公告)日：2020-05-21

申请号：US16751116

申请日：2020-01-23

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  Chet E. Carter ,  Collin Howder ,  John Mark Meldrim ,  Everett A. McTeer

IPC: H01L27/11582 ,  H01L21/28 ,  H01L27/11556 ,  H01L23/528 ,  H01L21/768 ,  H01L21/285 ,  H01L23/532 ,  H01L29/10 ,  H01L21/3213

Abstract: Some embodiments include a method of forming an integrated structure. An assembly is formed to include a stack of alternating first and second levels. The first levels have insulative material, and the second levels have voids which extend horizontally. The assembly includes channel material structures extending through the stack. A first metal-containing material is deposited within the voids to partially fill the voids. The deposited first metal-containing material is etched to remove some of the first metal-containing material from within the partially-filled voids. Second metal-containing material is then deposited to fill the voids.