公开(公告)号：US20050012140A1

公开(公告)日：2005-01-20

申请号：US10891803

申请日：2004-07-14

申请人： Kwang-Shik Shin ,  Han-Soo Kim ,  Sung-Hoi Hur

发明人： Kwang-Shik Shin ,  Han-Soo Kim ,  Sung-Hoi Hur

IPC分类号： H01L21/8247 ,  G11C11/34 ,  H01L27/10 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11524 ,  H01L27/115 ,  H01L27/11521

摘要： An EEPROM includes a device isolation layer for defining a plurality of active regions, a pair of control gates extending across the active regions and a pair of selection gates patterns that extend across the active regions and are interposed between the control gate patterns. A floating gate pattern is formed on intersection regions where the control gate patterns extend across the active regions. A lower gate pattern is formed on intersection regions where the selection gate patterns extend across the active regions. An inter-gate dielectric pattern is disposed between the control gate pattern and the floating gate pattern and a dummy dielectric pattern is disposed between the selection gate pattern and the lower gate pattern. The dummy dielectric pattern is substantially parallel to the selection gate pattern, and self-aligned with one sidewall of the selection gate pattern to overlap a predetermine width of the selection gate pattern.

摘要翻译： EEPROM包括用于限定多个有源区的器件隔离层，跨越有源区延伸的一对控制栅极和跨越有源区延伸并插入在控制栅极图案之间的一对选择栅极图案。 浮动栅极图案形成在跨越有源区域的控制栅极图案延伸的交叉区域上。 在选择栅极图案跨越有源区域延伸的交叉区域上形成下部栅极图案。 栅极间电介质图案设置在控制栅极图案和浮置栅极图案之间，并且虚设电介质图案设置在选择栅极图案和下部栅极图案之间。 虚拟介质图案基本上平行于选择栅极图案，并且与选择栅极图案的一个侧壁自对准以重叠选择栅极图案的预定宽度。

公开(公告)号：US06724052B2

公开(公告)日：2004-04-20

申请号：US10194300

申请日：2002-07-15

申请人： Kang-Sik Cho ,  Hoo-Seung Cho ,  Gyu-Chul Kim ,  Yong Park ,  Han-Soo Kim

发明人： Kang-Sik Cho ,  Hoo-Seung Cho ,  Gyu-Chul Kim ,  Yong Park ,  Han-Soo Kim

IPC分类号： H01L2976

CPC分类号： H01L21/823443 ,  H01L21/28518 ,  H01L21/823425 ,  H01L29/665 ,  H01L29/66659

摘要： A semiconductor device includes a substrate of a first conductive type, and a well region of an opposite second conductive type is formed in the substrate. A first impurity region of the first conductive type extends to a first depth within the well region, and a second impurity region of the first conductive type is spaced from the first impurity region to define a channel region therebetween and extends to a second depth within the well region. Preferably, the second depth is greater than the first depth. A gate electrode is located over the channel region, and a silicide layer is formed at a third depth within the first impurity region. The third depth is less than the first depth, and a difference between the first depth and the third depth is less than or equal to a difference at which a leakage current from the silicide layer to the well region is sufficient to electrically bias the well region through the silicide layer.

摘要翻译： 半导体器件包括第一导电类型的衬底，并且在衬底中形成相对的第二导电类型的阱区。 第一导电类型的第一杂质区域延伸到阱区域内的第一深度，并且第一导电类型的第二杂质区域与第一杂质区域间隔开，以在其间限定沟道区域，并延伸到第 井区。 优选地，第二深度大于第一深度。 栅极电极位于沟道区域的上方，在第一杂质区域内的第三深度处形成硅化物层。 第三深度小于第一深度，第一深度和第三深度之间的差小于或等于从硅化物层到阱区域的漏电流足以使阱区域电偏置的差 通过硅化物层。

公开(公告)号：US06583486B2

公开(公告)日：2003-06-24

申请号：US10068175

申请日：2002-02-06

申请人： Han-Soo Kim

发明人： Han-Soo Kim

IPC分类号： H01L27095

CPC分类号： H01L21/761 ,  H01L21/823892

摘要： A semiconductor memory device comprises a semiconductor substrate having a memory cell region and a periphery circuit region. The memory cell region includes first and second conductivity type wells and an array of memory cell formed on the first and second conductivity type wells. The periphery circuit region comprises a guard ring that is formed at a location next to a second conductivity type well and to surround a side portion of the array of memory cells. The guard ring is formed with a depth different from that of the second conductivity type well.

公开(公告)号：US5796126A

公开(公告)日：1998-08-18

申请号：US623768

申请日：1996-03-29

申请人： Min-Koo Han ,  Yearn-Ik Choi ,  Jae-Hyung Kim ,  Han-Soo Kim

发明人： Min-Koo Han ,  Yearn-Ik Choi ,  Jae-Hyung Kim ,  Han-Soo Kim

IPC分类号： H01L29/872 ,  H01L21/335 ,  H01L29/47 ,  H01L29/739 ,  H01L29/78 ,  H01L29/786 ,  H01L29/812 ,  H01L29/74

CPC分类号： H01L29/7394 ,  H01L29/7398

摘要： A hybrid schottky injection field effect transistor is provided. A first diffusion region of a second conductivity type and a second diffusion region of a first conductivity type are separately formed at a main surface of a silicon layer. A third diffusion region of a first conductivity type is formed within the first diffusion region. An insulating layer covers part of the second diffusion region and the third diffusion region. A gate electrode is formed on the insulating layer and is situated over the first and third diffusion regions and the silicon layer. A cathode electrode is commonly connected to the third diffusion region and the first diffusion region. An anode electrode comprises a trench filled with electrode material and is formed in the silicon layer along side of the second diffusion area and a gate insulating layer.

摘要翻译： 提供了一种混合肖特基注入场效应晶体管。 第二导电类型的第一扩散区域和第一导电类型的第二扩散区域分别形成在硅层的主表面处。 在第一扩散区域内形成第一导电类型的第三扩散区域。 绝缘层覆盖第二扩散区域和第三扩散区域的一部分。 栅电极形成在绝缘层上，并位于第一和第三扩散区和硅层之上。 阴极电极通常连接到第三扩散区域和第一扩散区域。 阳极包括填充有电极材料的沟槽，并且沿着第二扩散区域的侧面形成在硅层中，并且栅极绝缘层。

公开(公告)号：US09383489B2

公开(公告)日：2016-07-05

申请号：US13502325

申请日：2010-10-22

申请人： Mun-Ho Kim ,  Seung-Hee Lee ,  Han-Soo Kim ,  Mi-Kyoung Kim

发明人： Mun-Ho Kim ,  Seung-Hee Lee ,  Han-Soo Kim ,  Mi-Kyoung Kim

IPC分类号： C09D163/00 ,  C09D11/30 ,  C08K5/3492 ,  C07D251/48 ,  C07D251/54 ,  G02B1/10 ,  G02B5/22 ,  C09D133/06 ,  C08G59/32 ,  C09D11/102 ,  G02B5/20

CPC分类号： G02B5/223 ,  C08G59/3209 ,  C09D11/102 ,  C09D11/30 ,  C09D133/068 ,  C09D163/00 ,  G02B5/201

摘要： The present invention relates to an inkjet composition for forming transparent films, which is highly economical and environmentally friendly and has excellent physical properties, including excellent transmittance, chemical resistance, heat resistance, adhesion, jetting stability and storage stability.

摘要翻译： 本发明涉及用于形成透明膜的喷墨组合物，它是非常经济和环保的并具有优异的物理性能，包括优异的透光率，耐化学性，耐热性，粘附性，喷射稳定性和储存稳定性。

公开(公告)号：US08277698B2

公开(公告)日：2012-10-02

申请号：US12833657

申请日：2010-07-09

申请人： Mi-Kyoung Kim ,  Sun-Hwa Kim ,  Han-Soo Kim ,  Dae-Hyun Kim

发明人： Mi-Kyoung Kim ,  Sun-Hwa Kim ,  Han-Soo Kim ,  Dae-Hyun Kim

IPC分类号： G02B5/23 ,  G02F1/1335 ,  C04B33/00

CPC分类号： C09D11/10

摘要： The present invention relates to an infrared curable ink composition for a color filter. The ink composition according to the present invention includes a melamine compound and an epoxy compound, and thus can be cured for a short time, thereby being used in the infrared curing process, and reducing the production process and time required for the color filter production. In addition, the color filter produced by the ink composition according to the present invention has excellent chemical resistance and heat resistance, thereby being applied to various electronic devices such as liquid crystal display device.

摘要翻译： 本发明涉及一种用于滤色器的红外固化油墨组合物。 根据本发明的油墨组合物包括三聚氰胺化合物和环氧化合物，因此可以短时间固化，从而用于红外线固化过程中，并且减少了生产过程和生产滤色器所需的时间。 此外，由本发明的油墨组合物制造的滤色器具有优异的耐化学性和耐热性，从而适用于液晶显示装置等各种电子装置。

公开(公告)号：US08183634B2

公开(公告)日：2012-05-22

申请号：US12536775

申请日：2009-08-06

申请人： Jun-Beom Park ,  Soon-Moon Jung ,  Han-Soo Kim ,  Jae-Hoon Jang ,  Jae-Hun Jeong ,  Jong-In Yun ,  Mi-So Hwang

发明人： Jun-Beom Park ,  Soon-Moon Jung ,  Han-Soo Kim ,  Jae-Hoon Jang ,  Jae-Hun Jeong ,  Jong-In Yun ,  Mi-So Hwang

IPC分类号： H01L27/12

CPC分类号： H01L27/0688 ,  H01L25/0657 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/11551 ,  H01L27/12 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/00

摘要： A stack-type semiconductor device and a method of manufacturing the same are provided. The stack-type semiconductor device includes an insulation layer on a single-crystalline substrate, a contact plug penetrating the insulation layer to contact the single-crystalline substrate, an upper semiconductor pattern including an impurity region and a gate structure positioned between the impurity regions on the upper semiconductor pattern. An upper surface of the contact plug contacts a lower surface of the semiconductor pattern. An operation failure of the stack-type semiconductor device is reduced since the upper semiconductor pattern is electrically connected to the single-crystalline semiconductor substrate.

摘要翻译： 提供堆叠型半导体器件及其制造方法。 堆叠型半导体器件包括在单晶衬底上的绝缘层，穿透绝缘层以接触单晶衬底的接触插塞，包括位于杂质区之间的杂质区和栅结构的上半导体图案 上半导体图案。 接触插头的上表面接触半导体图案的下表面。 由于上半导体图形与单晶半导体衬底电连接，所以堆叠型半导体器件的操作故障减小。

公开(公告)号：US20110227009A1

公开(公告)日：2011-09-22

申请号：US13048592

申请日：2011-03-15

申请人： Min-A YU ,  Han-Soo Kim ,  Sun-Hwa Kim

发明人： Min-A YU ,  Han-Soo Kim ,  Sun-Hwa Kim

IPC分类号： G02B5/23

CPC分类号： G02B5/223 ,  C09D4/06 ,  C09D11/322 ,  C09D11/36

摘要： Provided is an ink composition for manufacturing color filters. The ink composition includes an acrylic binder resin obtained by polymerizing the group of monomers containing a compound represented by Formula 1. The ink composition has good chemical resistance and adhesive properties and is used for manufacturing color filters exhibiting a high contrast ratio: (where Ra is —H, or —CH3, and Rb is an alkyl group having 6-30 carbon atoms).

摘要翻译： 提供了一种用于制造滤色器的油墨组合物。 油墨组合物包括通过聚合含有式1化合物的单体的单体而获得的丙烯酸粘合剂树脂。油墨组合物具有良好的耐化学性和粘合性，并且用于制造具有高对比度的滤色器（其中Ra为 -H或-CH 3，Rb是具有6-30个碳原子的烷基）。

公开(公告)号：US08004885B2

公开(公告)日：2011-08-23

申请号：US12418821

申请日：2009-04-06

申请人： Jong-In Yun ,  Jae-Hoon Jang ,  Soon-Moon Jung ,  Han-Soo Kim ,  Jun-Beom Park ,  Jae-Hun Jeong

发明人： Jong-In Yun ,  Jae-Hoon Jang ,  Soon-Moon Jung ,  Han-Soo Kim ,  Jun-Beom Park ,  Jae-Hun Jeong

IPC分类号： G11C16/04

CPC分类号： G11C16/3418 ,  G11C16/3427 ,  H01L27/11551

摘要： A driving method of a three-dimensional memory device having a plurality of layers is provided. One of the layers is selected. A well of the selected layer is biased with a first well voltage. A word line voltage is applied to a selected word line of the selected layer. A well of an unselected layer is biased with a second well voltage higher than the first well voltage.

摘要翻译： 提供具有多个层的三维存储器件的驱动方法。 选择其中一个图层。 所选择的层的阱被第一阱电压偏置。 字线电压被施加到所选层的选定字线。 未选择的层的阱以比第一阱电压高的第二阱电压偏置。

公开(公告)号：US20110168301A1

公开(公告)日：2011-07-14

申请号：US13120170

申请日：2009-09-23

申请人： Tae-Jin Song ,  Han-Soo Kim ,  Jai-Hyun Kwak ,  Bruno C. De Cooman

发明人： Tae-Jin Song ,  Han-Soo Kim ,  Jai-Hyun Kwak ,  Bruno C. De Cooman

IPC分类号： C23C2/28 ,  B32B15/01

CPC分类号： C22C38/02 ,  C22C38/001 ,  C22C38/04 ,  C22C38/06 ,  C22C38/20 ,  C22C38/22 ,  C22C38/28 ,  C22C38/32

摘要： The present invention relates to a hot dip galvanized steel sheet and a manufacturing method thereof. The hot dip galvanize steel sheet includes a steel sheet including a martensitic structure as a matrix, and a hot dip galvanized layer formed on the steel sheet. The steel sheet includes C of 0.05 wt % to 0.30 wt %, Mn of 0.5 wt % to 3.5 wt %, Si of 0.1 wt % to 0.8 wt %, Al of 0.01 wt % to 1.5 wt %, Cr of 0.01 wt % to 1.5 wt %, Mo of 0.01 wt % to 1.5 wt %, Ti of 0.001 wt % to 0.10 wt %, N of 5 ppm to 120 ppm, B of 3 ppm to 80 ppm, an impurity, and the remainder of Fe.

摘要翻译： 本发明涉及一种热浸镀锌钢板及其制造方法。 热镀锌钢板包括以马氏体为基体的钢板和在钢板上形成的热浸镀锌层。 该钢板包括0.05重量％至0.30重量％的C，0.5重量％至3.5重量％的Mn，0.1重量％至0.8重量％的Si，0.01重量％至1.5重量％的Al，0.01重量％的Cr至0.01重量％ 1.5重量％，Mo为0.01重量％〜1.5重量％，Ti为0.001重量％〜0.10重量％，N为5ppm〜120ppm，B为3ppm〜80ppm，杂质，余量为Fe。